lec 11 microprocessor and microcontroller.pptx

12
MICROPROCESSOR AND MICROCONTROLLER SPRING 2013 Lecture 11: Arithmetic and Logical Instructions Muhammad Saqib Bhatti

Upload: syed-haleem

Post on 18-Dec-2015

214 views

Category:

Documents


1 download

TRANSCRIPT

Microcontroller: Interfacing & Programming

Microprocessor and MicrocontrollerSpring 2013Lecture 11: Arithmetic and Logical InstructionsMuhammad Saqib BhattiAgendaUnsigned multiplicationUnsigned divisionConcept of signed numbers in 8051Logical instructionsRotate InstructionsData movement instructionsSWAPXCHXCHD

2Unsigned MultiplicationRegisters A and B are used16- bit result placed in B and ALower Byte in AHigher Byte in BOnly registers A and B can be used to contain operandIllegal to use any other addressing modeExampleMOV A, #25H; A = 25HMOV B, #65H; B = 65HMUL AB; B = 0EH and A = 99H

Lecture 1133Unsigned DivisionRegisters A and B are usedA = NumeratorB = DenominatorIf Denominator = 0 OV = 1Illegal to use any other addressing modeResult: A = QuotientB = ReminderExample:MOV A, #95H; A = 95HMOV B, #10H; B = 10HDIV AB; B = 05H and A = 09H

Lecture 1144Logical InstructionLogical AND:ANL destination, sourcePerforms bitwise AND operation on operands and saves result in destinationLogical OR:ORL destination, sourcePerforms bitwise OR operation on operands and saves result in destinationLogical XOR:XRL destination, sourcePerforms bitwise XOR operation on operands and saves result in destinationComplement:CPL ACalculates the 1s complement of accumulator and saves result back in accumulator registerAddressing modes for ANL, ORL and XRL:Immediate: ANL A, #dataANL A,#25Register: ORL A, RnORL A,R3Direct: XRL A, directXRL A,30HRegister-Indirect: ANL A, @RANL direct, #dataANL 32H, #44HXRL direct, AXRL 0F0H, ALecture 1155Rotate InstructionsRR A:Rotate bits right to leftLecture 116MSBLSB6Rotate InstructionsRL A:Rotate bits left to right

7MSBLSBRotate InstructionsRRC A:Rotate bits right to left through carry

8MSBLSBCRotate InstructionsRLC A:Rotate bits left to right through carry

9MSBLSBCTransmit Data Serially Transfer 41H seriallyTwo start bits and one stop bit is appendedMOV A, #41HSETB P2.1SETB P2.1MOV R5, #8HERE:RRC AMOV P2.1, CDJNZ R5, HERESETB P2.1 Lecture 111010Receive Data Serially MOV R5, #8HERE:MOV C, P2.7RRC ADJNZ R5, HERE Lecture 111111Data movement instructionsSWAPSWAP ALower Nibble is swapped with upper NibbleOnly A register can be used as operandXCHXCH A, ByteExchanges the byte with A registerAddressing modesRegisterDirectRegister-indirectXCHDXCHD A, @RiExchanges only lower nibble of A with lower nibble of RAM location pointed by RiLecture 111212