language workbenches, embedded software formal verification · a dsl is a focussed, processable...

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Language Workbenches, Embedded Software and Formal Verification Markus Voelter independent/itemis [email protected] www.voelter.de voelterblog.blogspot.de @markusvoelter +Markus Voelter Daniel Ratiu ForTISS GmbH [email protected] www.fortiss.org

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Page 1: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Language Workbenches, Embedded Software and

Formal Verification

Markus Voelter independent/itemis

[email protected]

www.voelter.de voelterblog.blogspot.de

@markusvoelter +Markus Voelter

Daniel Ratiu ForTISS GmbH

[email protected]

www.fortiss.org

Page 2: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 3: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

mbeddr

1

Page 4: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 5: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

An extensible version of the C programming language for Embedded Programming

C the Difference – C the Future

gefördert durch das BMBF Förderkennzeichen 01|S11014

Page 6: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

An extensible C with support for formal methods,

requirements and PLE.

Page 7: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

IDE for Everything

Page 8: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

A debugger for all of that

Page 9: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

SDK for building your own Language

Extensions!

Page 10: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

IDE for Everything

JetBrains

MPS Open Source Language Workbench

Page 11: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 12: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Challenges in embedded software

development

Page 13: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Abstraction without

Runtime Cost

Page 14: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

C considered unsafe

Page 15: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Program Annotations

Page 16: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Static Checks and

Verification

Page 17: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Product Lines and

Requirement Traces

Page 18: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Separate, hard to integrate Tools

Page 19: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 20: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Subset of Available

Extensions

Page 21: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

All of C (cleaned-up)

Page 22: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 23: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Retargettable Build Integration

Page 24: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 25: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Native Support for Unit Testing

and Logging

Page 26: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 27: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
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Physical Units

Page 29: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 30: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Components Interfaces Contracts Instances

Mocks & Stubs

Page 31: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 32: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 33: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 34: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

State Machines +

Model Checking

Page 35: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 36: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
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Decision Tables +

Consistency and Completeness

Checks

Page 38: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 39: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Support for Frama-C

+ High-level Iterators

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IDE  Support  for  Frama-­‐C    Annota3ons  

Page 41: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Generate  Frama-­‐C  Annota3ons    from  Higher-­‐level  Constructs  

Page 42: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Requirements Tracability

Page 43: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 44: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 45: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
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Product Line Variability

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Status and

Availability

Page 53: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

http://mbeddr.com

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LWES Language Workbenches

for  Embedded Systems

Developed within

gefördert durch das BMBF Förderkennzeichen 01|S11014

Page 55: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Most is Open Source (EPL); the

rest will follow this year.

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support for graphical early

2013

Page 57: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

integration in early 2013

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Language Engineering

w/ Language Workbenches

2

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Introduction

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A DSL is a focussed, processable language for describing a specific

concern when building a system in a specific domain. The abstractions

and notations used are natural/suitable for the stakeholders who

specify that particular concern.

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Concepts (abstract syntax)

(concrete) Syntax

semantics (generators)

Tools and IDE

Page 64: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

more in GPLs more in DSL Domain Size large and complex smaller and well-defined

Designed by guru or committee a few engineers and domain experts

Language Size large small

Turing-completeness almost always often not

User Community large, anonymous and widespread

small, accessible and local

In-language abstraction

sophisticated limited

Lifespan years to decades months to years (driven by context)

Evolution slow, often standardized fast-paced

Incompatible Changes almost impossible feasible

Page 65: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

C

LEGO Robot Control

Components

State Machines

Sensor Access

General Purpose

Domain Specific

Page 66: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

L

a b

c

d

e

f

g h i

j

k

m

n

o

with many first class concepts!

Big Language

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L

α β

λ ω

δ

Small Language

and poweful concepts with a few, orthogonal

Page 68: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

my L

α  

β  

a b c

d e f

g h i

j k l

Modular Language

composable modules with many optional,

Page 69: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
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an abstraction or simplification of reality

ecosurvey.gmu.edu/glossary.htm

Model

Page 71: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

an abstraction or simplification of reality

ecosurvey.gmu.edu/glossary.htm

which ones?

what should we leave out?

Model

Page 72: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

… code generation … analysis and checking … platform independence … stakeholder integration … drives design of

language!

Model Purpose

Page 73: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Programs Languages Domains

Page 74: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Domain

body of knowledge in the real world deductive

top down

existing software (family)

inductive bottom up

Page 75: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Domain

existing software (family)

inductive bottom up

Domain

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Domain Hierarchy

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Domain Hierarchy

all programs

embedded software

automotive avionics

Exten ded C

Example

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Heterogeneous

Exten ded C

Example

Heterogeneous

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Heterogeneous C

Statemachines Testing

Heterogeneous

Exten ded C

Example

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Page 81: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Domain Hierarchy

more specialized domains more specialized languages

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Reification

Dn

Page 83: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Reification

Dn

Dn+1

==

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Reification

== Language Definition

Transformation/ Generation

Page 85: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

?

Page 86: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

? Overspecification! Requires Semantic Analysis!

Page 87: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

! Declarative! Directly represents Semantics.

Linguistic Abstraction

Page 88: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Def: DSL

A DSL is a language at D that provides linguistic abstractions for common patterns and idioms of a language at D-1 when used within the domain D.

Page 89: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Def: DSL cont’d

A good DSL does not require the use of patterns and idioms to express semantically interesting concepts in D. Processing tools do not have to do “semantic recovery” on D programs.

Declarative!

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Another Example

Exten ded C

Example

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Another Example

Turing Complete! Requires Semantic Analysis!

Exten ded C

Example

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Linguistic Abstraction

Exten ded C

Example

Page 93: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Linguistic Abstraction

Exten ded C

Example

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Linguistic Abstraction

In-Language Abstraction Libraries Classes Frameworks

Page 95: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Linguistic Abstraction

In-Language Abstraction User-Definable Simpler Language

Analyzable Better IDE Support

Page 96: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Linguistic Abstraction

In-Language Abstraction User-Definable Simpler Language

Analyzable Better IDE Support

Special Treatment!

Page 97: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification
Page 98: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Semantics

Page 99: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Static Semantics

Execution Semantics

Page 100: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Static Semantics

Execution Semantics

Page 101: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Static Semantics

Constraints Type Systems

Page 102: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Unique State Names

Unreachable States

Dead End States

Exten ded C

Example

Page 103: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Unique State Names

Unreachable States

Dead End States

Easier to do on a declarative Level!

Exten ded C

Example

Page 104: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Unique State Names

Unreachable States

Dead End States

Easier to do on a declarative Level!

Thinking of all constraints is a coverage problem! Exten

ded C

Example

Page 105: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Assign fixed types

What does a type system do?

Page 106: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Assign fixed types

Derive Types

What does a type system do?

Page 107: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Assign fixed types

Derive Types

Calculate Common Types

What does a type system do?

Page 108: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Assign fixed types

Derive Types

Calculate Common Types

Check Type Consistency

What does a type system do?

Page 109: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Intent + Check

Derive

More code

Better error messages

Better Performance

More convenient

More complex checkers

Harder to understand for users

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Refrige rators

Example

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Execution Semantics

What does it all mean?

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Def: Semantics … via mapping to lower level

OB: Observable Behaviour (Test Cases)

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Def: Semantics … via mapping to lower level

LD

LD-1

Transformation Interpretation

Page 115: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Dn

Dn+1

Transformation

Page 116: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Transformation

Exten ded C

Example

Page 117: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

LD

LD-1

Transformation

Known Semantics!

Transformation

Page 118: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

LD

LD-1

Transformation Correct!?

Transformation

Page 119: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Transformation

LD

LD-1

Transformation

Tests (D)

Tests (D-1)

Run tests on both levels; all pass. Coverage Problem!

Page 120: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

LD

LD-1

Transformation

Tests Simulators

Documentation

Transformation

Page 121: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Multi-Stage

L3

L2

L1

L0

Modularization

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Multi-Stage: Reuse

L3

L2

L1

L0

Reusing Later Stages

Optimizations!

L5

Page 123: Language Workbenches, Embedded Software Formal Verification · A DSL is a focussed, processable language for ... formal verification more usable and agile? Our goal: formal verification

Multi-Stage: Reuse

L3

L2

L1

L0

L5

Exten ded C

Example

C Text

C (MPS tree)

State Machine

Components

Robot Control

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Multi-Stage: Reuse

L3

L2

L1

L0

L5

Exten ded C

Example

C Text

C (MPS tree)

State Machine

Components

Robot Control

Syntactic Correctness, Headers

C Type System

Consistency Model Checking

Efficient Mappings

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Multi-Stage: Reuse

L3

L2

L1

L0

L1b

L0b

Reusing Early Stages

Portability

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Multi-Stage: Reuse

L3

L2

L1

L0

L1b

L0b Exten ded C

Example

Java C#

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Multi-Stage: Preprocess

Adding an optional, modular

emergency stop feature

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Reduced Expressiveness

bad? maybe.

good? maybe!

Model Checking SMT Solving

Exhaustive Search, Proof!

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Language Modularity

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Behavior Language Modularity, Composition and Reuse (LMR&C)

increase efficiency of DSL development

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Behavior Language Modularity, Composition and Reuse (LMR&C)

increase efficiency of DSL development

Referencing Reuse Extension Reuse

4 ways of composition:

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Behavior Language Modularity, Composition and Reuse (LMR&C)

increase efficiency of DSL development

distinguished regarding dependencies and fragment structure

4 ways of composition:

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Behavior Dependencies:

do we have to know about the reuse when designing the languages?

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Behavior Dependencies:

do we have to know about the reuse when designing the languages?

homogeneous vs. heterogeneous („mixing languages“)

Fragment Structure:

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Behavior Dependencies & Fragment Structure:

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Behavior Dependencies & Fragment Structure:

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Referencing Referencing

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Referencing

Dependent

No containment

Referencing

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Used in Viewpoints

Referencing

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Fragment

Fragment

Fragment

Referencing

references

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Refrige rators

Example

Referencing

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Extension

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Containment

Dependent

Extension

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more specialized domains more specialized languages

Extension Extension

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Dn

Dn+1

==

Extension

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Dn

Dn+1

==

Extension

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Dn

==

Good for bottom-up (inductive) domains, and for use by technical DSLs (people)

Extension

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Behavior Drawbacks tightly bound to base potentially hard to analyze the combined program

Extension

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Exten ded C

Example

Extension

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Extension Extension

Exten ded C

Example

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Reuse Reuse

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Reuse

No containment

Independent

Reuse

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Reuse

Behavior Often the referenced language is built expecting it will be reused.

Hooks may be added.

Reuse

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Embedding

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Embedding Embedding

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Containment

Independent

Embedding

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Pension Plans

Example

Embedding

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Behavior Embedding often uses Extension to extend the embedded language to adapt it to its new context.

Embedding

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Behavior Extension and Embedding requires modular concrete syntax

Challenges - Syntax

Many tools/formalisms cannot do that

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Behavior Extension: the type system of the base language must be designed to be extensible/ overridable

Challenges – Type Systems

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Behavior Reuse and Embedding: Rules that affect the interplay can reside in the adapter language.

Challenges – Type Systems

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Behavior Referencing (I) Challenges – Trafo & Gen

Two separate, dependent single-source transformations

Can be Reused

Written specifically for the combination

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Referencing (II) Challenges – Trafo & Gen

A single multi-sourced transformation

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Referencing (III) Challenges – Trafo & Gen

A preprocessing trafo that changes the referenced frag in a way specified by the

referencing frag

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Extension Challenges – Trafo & Gen

Transformation by assimiliation, i.e. generating code in the host lang

from code expr in the extension lang.

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Exten ded C

Example

Extension Challenges – Trafo & Gen

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Reuse (I) Challenges – Trafo & Gen

Reuse of existing transformations for both fragments plus

generation of adapter code

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Reuse (II) Challenges – Trafo & Gen

composing transformations

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Reuse (III) Challenges – Trafo & Gen

generating separate artifacts plus a weaving specification

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Embedding (I) Challenges – Trafo & Gen

Assimilation (as with Extension)

a purely embeddable language may not come with a generator.

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Embedding (II) Challenges – Trafo & Gen

Adapter language can coordinate the transformations for the host and for the

emebedded languages.

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Formal Verification

3

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Can language engineering increase the adoption of

formal verification?

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Can we make formal verification

more usable and agile?

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Our goal: formal verification

for everyone

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Challenges with using formal analyses

1)  Writing the formal model

2) Specify the property to be verified

3) Interpret the analysis results

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Addressing the challenges

1)  Wrap the language of the analysis tool into higher level languages

2)  Define out-of-the-box analyses goals that can be automated

3)  Lift the analysis results at the abstraction level of the domain

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Challenges  with  Building  Formal  Analyses  Tools  

•  „  [...]  model  construc3on  problem:  the  seman.c  gap  between  the   ar.facts   produced   by   so:ware   developers   and   those  accepted  by  current  verifica.on  tools.  [...]    

    In   order   to   use   a   verifica.on   tool   on   a   real   program,   the  developer  must   extract   an   abstract  mathema3cal  model   of  the   program’s   salient   proper3es   and   specify   this   model   in  the   input   language   of   the   verifica3on   tool.   This   process   is  both  error-­‐prone  and  .me-­‐consuming  “  

ICSE  2000,  CorbeI  et.  al.,  Bandera  ...  

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Addressing the challenges

Define  sub-­‐languages  that  are  easier  to  analyze  and  embedd  them  in  more  

expressive  languages.  

Allow  developers  to  write  programs  directly  in  a  sub-­‐language  that  is  

easier  to  analyze.  

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–  Analyses  are  simpler  to  define  

–  Automa3on  degree  grows  /  analyses  are  (computa3onally)  more  feasible  

–  The  results  of  analyses  can  be  presented  in  more  adequate  form  

Adequate  Languages  Make  the  Life  Simpler  

Today’s  state  of  prac3ce:  “Write  some  program  (e.g.  C)  and  then  try  (very  hardly)  to  analyze  it.”  

The  mbeddr  approach:  “…  by  using  adequate  language  (fragments)”  

Today’s  state  of  the  art:  “Write  programs  that  can  be  analyzed  ”  

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183  

Allow  SoUware  Developers  Make  Informed  Decisions  ...  

Either  write  a  sub-­‐system  in  a  restricted  (but  verifiable  language)  or  use  the  full  power  of  a  GPL  

Get  immediate  feedback  if  you  are  (not)  in  the  verifiable  sub-­‐set  

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Characteris3cs  of  Analyzable  Languages  

•  High  modularisa3on  and  encapsula3on  –  Small  and  well-­‐defined  interfaces  

•  Clean-­‐up  or  restrict  „problema3c“  features  –  Access  to  global  state,  side-­‐effects,  etc.  

•  Raise  the  level  of  abstrac3on  –  Be  able  to  leave  out  unnecessary  details  

•  Eliminate  the  „accidental  complexity“  –  Be  able  to  directly  express  what  we  want  without  any  

„encoding“  

184  

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Code-­‐based,  Model-­‐based  and  DSLs-­‐based    Analyses  

Formal  analysis  tools  –  e.g.  model  checkers,  SMT  solvers  

GPL  Code  

GPL  Code  

Abstract  models,    -­‐  e.g.  Statecharts  

Abstrac.on  

Program  abstrac.on  

Challenges:  -­‐  program  abstrac.on  -­‐   iden.fica.on  of  invariants  -­‐   figh.ng  accidental    complexity  

Genera.on  

Challenges:  -­‐ integrate  with  exis.ng  systems  -­‐ for  many  tasks  the  models  are  not  enough  expressive  

C  code  

DSL1   DSL2  ...  

DSL3  

Clean,  easy  to    analyze  DSLs   m

2m  transf.  

code  gen.  

Challenges:  -­‐ Find  adequate  language    fragments  and  corresponding    analyses  

mbeddr  Agile  Formal  Analyses  ©  Daniel  Ra.u  

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Paradigm Change

… for analyses users:

decide which parts of programs will be analyzed and use adequate language fragments that allow analysis

... for analyses developers: it is easier to extend/restrict languages than to extend

analyses to deal with intricacies of all language features

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Verifying State Machines

Referencing

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Model Checking

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Model Checking

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Unreachable States Dead End States

Live States

Out of the box verification conditions

Transitions Nondeterminism

Dead Transitions

Variables out-of-bounds

Check the sanity of the code

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Have a (temporal) scope: Global

Before R

After Q

Between Q and R

After Q Until R

User Defined Properties

Define Business-Domain Specific Verification Conditions

… that restrict a certain basic property:

P not P S responds to P

R   R  

Q   Q  

Q   Q  R   R  Q   Q  

Q   Q  R  Q  

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Model Checking

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Model Checking

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Model Checking

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Exten ded C

Example

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Restricted State Machines: „float“ vars. are not allowed

Example

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Verifying Decision Tables

Referencing

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Exten ded C

Example

Decision Tables

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Completeness:  did  we  cover  all  cases?  

Consistency:  are  there  overlapping  cases?  

Decision Tables

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Easy  to  answer  using  an  SMT  solver    

SMT  =  Sa3sfiability  Modulo  Theories    -­‐  extension  of  boolean  sa.sfiability  with          addi.onal  theories  like  linear  arithme.c    

Decision Tables

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Decision Tables

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Decision Tables

Language  restric3on:    non-­‐linear  expressions  are  not  allowed  

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Iden3fy  language  fragments  relevant  to    developers  that  can  be  easily  analyzed  

Ensure  equivalence  with  the  transla3on  to  C    or,  at  least,  increase  the  confidence    

that  they  are  „close  enough“  for  a  certain  analysis  goal  

New Challenges

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The End. Most of this material is part of

Markus‘ upcoming (early 2013) book DSL Engineering. Stay in touch, it may become a free

eBook www.voelter.de

voelterblog.blogspot.de @markusvoelter +Markus Voelter