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    Academic Planner

    JIF 316ELECTRONICS II

    Academic Session 2014/2015

    Video Conferencing

    DateSession

    Regional

    Centre A

    Regional

    Centre B

    Time

    1

    2

    3

    4

    [Students need to fill the dates and times of video conferencing sessions. Please refer tothe video conferencing time-table for Academic Session 2014/2015.]

    PUSAT PENGAJIAN

    PENDIDIKAN JARAK JAUH

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    JIF 316/3 - ELECTRONICS II

    Course Manager: Mr Ooi Poh Kok & Dr Chuah Lee Siang

    Course synopsis

    Boolean algebra. De Morgan theorem. Duality theorem. Number systems andcodes. Logic circuit analysis and design. Karnaugh Map. Sequential logiccircuits. R-S flip-flop. J-K flip-flop. Applications and examples of logic circuits.Memory (ROM and RAM). Digital devices.

    Materials for this course can be found in the book by:Thomas L. Floyd, Digital Fundamentals, 9th Edition, Pearson EducationInternational, 2006. Other references are also listed at the end of thisacademic planner.

    There will be FIVE video conferencing sessions throughout the academicyear. The video conferencing session provides a unique opportunity forstudents to interact with the course manager as well as other students. Theyshould come fully prepared so that they can participate in the discussion. Thefirst session will focus on the requirements of the course, number systemsand Boolean algebra. The topics to be discussed in the subsequent sessionswill to be decided later by both the course manager and the students. Pleaselog on to the learning portal to keep yourself updated as important informationwill be posted on the portal from time to time

    Assignments

    There will be TWO assignments for this course. Please send completedassignments to the General Office of PJJ. The first assignment is giventogether with this Academic Planner. The second assignment will be givenduring the Intensive Course.

    Deadlines: 1st assignment: 31 October 20142nd assignment: 28 February 2015

    Continuous Examination

    The Continuous Examination will be held during the Intensive Course.

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    CONTRIBUTIONS OF COURSE WORK AND EXAMINATIONS.

    The duration of the final examination for this course will be THREE hours. Itwill be based on all the topics covered in the course.

    The contributions of course work and the examinations are as follow:

    Final Exam: 70%Assignments: 10%Continuous examination: 20%

    REFERENCES

    Malvino, A.P. and Brown, J.A. 1992. Digital Computer Electronics. ThirdEdition, McGraw-Hill, Singapore.

    Malvino, A.P. and Leach, D.P. 1986. Digital Principles and Applications.

    Fourth Edition. McGraw-Hill, New York.

    Kleitz, W. 1999. Digital Electronics. Fifth Edition. Prentice Hall Inc., NewJersey, U.S.A.

    Ray Ryan and Lisa A. Doyle, 1993. Digital electronic. McGraw-Hill,International Edition.

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    SCHOOL OF DISTANCE EDUCATIONUNIVERSITI SAINS MALAYSIA

    Academic Session 2014/2015

    JIF 316 ELECTRONICS II

    Assignment 1

    Deadline for submit ting this assignment: 31 October 2014

    1. What is a logic gate?

    2. Determine the decimal numbers represented by the following numbers:

    (a) 1101012

    (b) 1011012

    (c) 1100.10112

    (d) 00110101BCD

    3. Convert (a) (AB60)16 and (b) (F6D9)16 to octal numbers and decimalnumbers.

    4. Draw the logic circuit represented by each of the following expressions:

    (a) A+B+C

    (b) ABC

    5. Construct a truth table for each of the following Boolean expressions:

    (a) A+B

    (b) AB

    (c) AB+BC

    6. What is a Karnaugh map? Give an example on how a Karnaugh mapcan be used to obtain the output expression of a circuit.

    7. What is the duality theorem?

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    ASSIGNMENT 2

    INSTRUCTIONS:

    i. Answer all questions.

    ii. The deadline of the submission is on 28 February 2015.

    1. (a) What are flip flops?

    (b) In principle, a basic flip-flop can be constructed by connecting two

    inverters in series as shown below. Describe briefly how the flip-flop

    functions.

    2. Obtain the truth table for the R S flip-flop below.

    3. (a) Explain what is meant by clock cycle time.

    (b) What is the clock cycle time for a system that uses a 500 kHz clock?

    (c) If the total propagation delay through a master-slave flip-flop is 1 109s,

    what is the maximum clock frequency that can be used with this flip-flop?

    A B

    Q

    S

    R

    Q

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    4. Explain the basic operation of a multiplexer. How can a multiplexer handle

    more data inputs.

    5. Describe briefly the following:

    (i) ROM ; (ii) EPROM ; (iii) PROM ; (iv) RAM ; (v) SDRAM

    (vi) DRAM

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