interra design services · cad flows & eda digital library & memory software skills – rtl...
TRANSCRIPT
www.interrasystems.com
• Interra Overview
• Expertise Snapshot
• Library Development & Memory Design Expertise
• CAD Development Expertise
• Digital Expertise
• Software Services
• Interra Features
Contents
2 © Interra Systems. Confidential
Interra Overview
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“To be the most sought after engineering service provider in the semiconductor industry by delivering high quality technology
services and solutions that focus on customers’ success”
Founded in 1995 by Professionals Headquartered in Cupertino, CA
R&D Center at Noida and Design Center at Bangalore Strong Management and Engineering Team
300+ Employees and Growing Innovative Business Models
Expertise in Setting up ODCs and Executing Turnkey Projects
Engineering Services Library & Memory CAD Flow Development Digital Design Software Services
Products Memory Development System
EDA Objects Digital Video/Audio Stream Analysis
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Expertise Snapshot
Expertise Snapshot
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CAD Flows & EDA Digital Library & Memory Software
Skills – RTL to GDSII Flow Development
– Custom Design Flow – Design Signoff Flows – Regression and QA
Flows – GUI Development – Web Based Tools – EDA Software – Translators, Parsers
– RTL Design – Functional Verification – Physical Design
– Design Implementation – Functional Verification – Layout Implementation – Characterization – Logic Verification – Compilerization (MC2) – Backend Verification
Flows – Output View
Verification – QC Release Flow – Release to Customer – Silicon Correlation
– Embedded Software – Robotics – Display Systems
– Device drivers – Printers
– Application development – Printers – ECRs
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Library Development &
Memory Design Expertise
Library Development Expertise
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Design & Implementation
•Feasibility Analysis
•PPAY Analysis: Specification to Architecture
•Schematic Capture
Front-End Modeling
•Behavioral Model Development
•Test Bench Development for Design Validation
Design Validation
•Functional Verification
•Co-simulation of Design
Physical Implementation
•Physical layout implementation of leaf cells
•Top-level integration of instances
•Physical Verification
•Characterization Support
Characterization
•Extensive Characterization
•Validation of Data
•Support of Tools through Different Views
•Customization of Characterization Flows
IP Release
•QC & Regression Checks of IP
•Validation of all Views of IP
•Technical Support of Released IP
Memory Design Expertise
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Memory Characterization & Validation •Flows & Methodologies
•Automation of Flow
•Validation of Characterized Data & Memory Compilers
Advanced Node Design •Robust Designs for Advanced Nodes such as 40nm, 28nm & 20nm
•Sigma Based Design Methodologies at Cell Level & Top Level of Designs
Physical Implementation •IC Layout Designs in Multiple IP Verticals
•Compilers and Physical Layout
Memory Modeling & Functional Verification •IP Modeling Flow & Verification
•Memory Modeling
•Power Aware Models for Memories & Std Cells
•Compilers Development & Automation of Flows
•Functional Verification Including Design Validation at IP Level
•Logic Verification / Co-simulation of IP
•Symbolic Simulation of Memories
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CAD Flow Development
Expertise
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RTL to GDSII Flow Development
Design Signoff Flows
Regression and QA Flows
GUI Development
Web Based Tools
EDA Software
Translators, Parser
Flow Development
• Strong expertise • Exposure to multiple flows • Ability to form small to medium size team
in short time • Capability to start immediately • In-house advisory available
Design Flow Capabilities
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Front End
Specs Modeling
RTL Compile
Fault Coverage ATPG RTL Rule Check
Synthesis Scan Insertion & Handoff
Equivalence Check
Estimate Power
Power Analysis
Optimize Power
RTL Clock Gating
Swap VT Flow
Back End
Place & Route Floor Planning
Timing Analysis
ECO Physical Verification
Power Analysis
Reliability Analysis DFM / DFY
Mixed Signal Design
CDC
Spec
Finalize Release Date & Define Scope
Project Plan, Resource Plan, Training Plan &
Resource Allocation
Create Work Breakdown Structure
Tracking of Tasks Allocated
Release of Flow / Software to Customer
Deployment & Support
Flow Development Life Cycle
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Digital Expertise
Verification Expertise
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• Experienced in major third party EDA tools (Cadence, Magma, Synopsys, Atoptech)
• Expertise in setting up flow & methodology
• Experience with 22nm, 28nm, 32nm, 45nm, 65nm, 90nm
• Complexity from 100K gates to 5M+ gates
Physical Design Expertise
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Software Services
Software Expertise
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Device drivers for on board devices like EEPROM, Display drivers,
charge monitors
Board bring up service
Embedded software development for Electromechanical products
C, C++ PIC, ATMEL, ARM
HITEC C, GCC, MPLAB, Eclipse
C, C++, STL, WinSDK, WinDDK, Win32, GDI, WinDbg, SoftICE
Laser, Thermal , DMP & POS systems
Device drivers for external peripherals
C, C++, C#, MFC, QT, Visual Studio, Eclipse
Application protocol development
Development of Test automation framework
Application development for printer configurations, POS
systems
Device Drivers Application Development Embedded Systems
Color Conversion, Image Compression
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Interra Features
• Dedicated Technical Account Manager for each customer provides benefit of – – Single focal point for project management
– Maximum control with minimal overhead
• Flexibility to provide small to large teams with varying experience levels provide optimal control on cost
• Expertise in setting up and effectively operating ODC
• Strong technical competence across the domain
Interra Advantage
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© Interra Systems. Confidential 19 © Interra Systems
Contact Details Ganesh R Manager – Business Development Interra Systems India Pvt Ltd Kalyani Platina, No. 24, Phase I, 2nd Floor, EPIP Zone II, Whitefield, Bangalore – 560066 India [email protected] 0806735000 +917760755511
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