i3 multicore processor

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INTEL i3 PROCESSOR AMOL T. BAREWAR. M. Tech ( 1 st sem). ID no.=120151

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Page 1: I3 multicore processor

INTEL i3 PROCESSOR

AMOL T. BAREWAR.M. Tech ( 1st sem).ID no.=120151

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1. Introduction to processor

2. Brief introduction about i3 processor

5. Some features of i3

OVERVIEW

3. Multi core architecture

2

4. Comparison between i3 and multi core

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Introduction of a processor

Before discussing about i3 processor, let a small introduction of processor.

A processor is the logic circuitry that responds to and processes the basic instructions that drive a computer.

The term processor has generally replaced the

term central processing unit (CPU). The processor in a personal computer or embedded in small devices is often called a microprocessor.

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Brief introduction about i3 processor The only question I have is if there's any

advantage to using a Core i3 over a Core2Duo.

The Core i3 is a 3.2 GHz dual core chip, and it's quite a big improvement over the Core2Duo. It's a good 700 MHz faster, much faster bus with significantly faster RAM.

The first Core i3 processors were launched on January 7, 2010.

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Single-core CPU chipthe single core

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Multi-core CPU chip

The cores fit on a single processor socket .Also called CMP (Chip Multi-Processor

Task level and Tread level parallelism.

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Some features of i3

Intel® Hyper-Threading Technology (Intel® HT Technology).Intel® Virtualization Technology (Intel® VT).

Intel® Smart Cache.

Execute Disable Bit.

Intel Smart Memory Access.

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Intel Hyper-Threading Technology

Single core can run multiple thread.

Simultaneous multi threading.

Increase throughput and efficiency.

Turbo Bust Technology.

Thermal Design Power(TDP)

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In multithreading can’t simultaneously use the same functional unit

BTB and I-TLB

Decoder

Trace Cache

Rename/Alloc

Uop queues

Schedulers

Integer Floating Point

L1 D-Cache D-TLB

uCode ROMBTBL2

Cach

e a

nd

Con

trol

Bu

s

Thread 1 Thread 2

This scenario isimpossible with SMTon a single core(assuming a single integer unit)

IMPOSSIBLE

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SMT Multi-core: all four threads can run concurrently

BTB and I-TLB

Decoder

Trace Cache

Rename/Alloc

Uop queues

Schedulers

Integer Floating Point

L1 D-Cache D-TLB

uCode ROM

BTBL2

Cach

e a

nd

Con

trol

Bu

s

BTB and I-TLB

Decoder

Trace Cache

Rename/Alloc

Uop queues

Schedulers

Integer Floating Point

L1 D-Cache D-TLB

uCode ROM

BTBL2

Cach

e a

nd

Con

trol

Bu

s

Thread 1Thread 3 Thread 2 Thread 4

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Intel® Virtualization Technology (Intel® VT)

Speeding up the transfer of platform control between the guest operating systems (OSs) and the virtual machine manager (VMM)/hypervisor.

Enabling the VMM to uniquely assign I/O devices to guest OSs

Optimizing the network for virtualization with adapter-based acceleration

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Server Virtualization

Desktop Virtualization

Intel® VT Flex Priority

Intel® VT Flex Migration

Its also provide help to run 32bit O.S. on 64 bit

Types of Hypervisor

Type 1: oracle VM server for SPARC

Type2:VMWare workstation , Virtual Box

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Intel® Smart Cache

Smart Cache is a level 2 or level 3 cache method for multiple execution cores invented by Intel.

It shares the cache among cores

It decrease the cache miss rate.

It provide peak transfer rate of 96GB/sec .

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Smart Memory Access

Improve the performance.

It also include Memory disambiguation.

It aim to locate data as close as possible to reduce memory latency time.

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Execute Disable Bit.

Malicious buffer overflow attacks pose a significant security threat to businesses.

These attacks cost businesses precious productivity time, which can equal significant financial loss.

It allows the processor to classify where application code can execute and where it cannot in the memory.

When a malicious worm attempts to insert code in the buffer, the processor disables code execution.

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REFERENCES

http://www.intel.com/content/www/us/en/processors/core/core-i3-processor.html

http://www.intel.com/products/processor/corei3/specifications.htm

http://www.intel.com/technology/xdbit/index.htm

http://en.wikipedia.org/wiki/Hypervisor

http://www.realworldtech.com/merom/9/

http://en.wikipedia.org/wiki/Memory_disambiguation