ht66fb576/574/572 rgb led pwm function application … · ht66fb576/574/572 rgb led pwm function...

HT66FB576/574/572 RGB LED PWM Function Application Guidelines

AN0444E V1.00 1/12 December 11, 2016


D/N: AN0444E

Introduction The HOLTEK HT66FB576/574/572 RGB LED 8-bit USB Flash MCUs are specially

designed for RGB LED product applications as they have the ability to control up to

128/64/40 RGB LEDs respectively in a matrix scan configuration. Providing stable

constant current outputs for driving the RGB LEDs directly, these devices also include a

set of hardware circuits which can automatically calculate the LED PWM duty values and

support a display frame refresh rate of up to 450Hz. These features allow users to

develop their application in a rapid way, ensure superior LED display effects and also

reduce product costs since there is no need for external PWM driver ICs. This application

note mainly introduces the related registers and operation procedures of the

HT66FB576/574/572 RGB LED PWM function.

Functional Description The HOLTEK HT66FB576/574/572 RGB LED 8-bit USB Flash MCUs provide users with

a set of RGB LED PWM registers including a LED PWM constant current source control

register CCS and up to 112 relevant LED PWM control registers such as LCIO0, LCIO1

and etc. These devices also provide two LED PWM dedicated data memory sections

which are used to record the data associated with the hardware automatic calculation.

Additionally the COM7~COM0 and CCO47~ CCO0 ports, which are LED PWM dedicated

output pins, are provided to help users rapidly implement their applications.

Part No. VDD Program Memory

Data Memory

LED PWM Memory

Data EEPROM I/O RGB LED

PWM Max RGB

LED Support

HT66FB572

2.2V~5.5V

8K×16

1024×8

512×8

256×8

34 15 40

HT66FB574 16K×16 512×8 38 24 64

HT66FB576 32K×16 1024×8 52 48 128

HT66FB576/574/572 Selection Table

This section will give descriptions of the constant current source registers and LED PWM

function control registers, the RGB LED PWM architecture, LED PWM automatic mode

and manual mode operations, LED PWM waveforms as well as a hardware circuit

description. For the purpose of this application note the following description will take the

HT66FB576 device as an example.


AN0444E V1.00 2/12 December 11, 2016

RGB LED PWM Architecture Description

The HT66FB576 RGB LED PWM functional architecture, which is shown in fig.1, is

composed of 16 RGB LED PWM modules, a two pages LED PWM RAM, a register

transfer unit and an LED COM output unit.

Each RGB PWM module includes four PWM control circuits used for the Colour A/Colour

B/Colour C as well as intensity control. Colour A, Colour B and Colour C can

corresponded directly with Red/Green/Blue (RGB) colours according to the users’

requirements. The device provides 3(n+1) PWM CCO outputs where n is determined by

the selected module number. A maximum of 48 sets of 6-bit PWM CCO outputs can

provide up to 26M(218) colours. The PWM modules clock source frequency can be

selected to be either 12MHz, 16MHz or 24MHz, selected using the PWMCK[1:0] bits in

the PWMCTL0 register.

The PWM intensity control frequency is 64 times that of the colour PWM frequency. For

each colour level set by the duty cycle of the colour PWM signals, its brightness can be

adjusted by modulating the PWM signal intensity. This allows the colour level to remain at

the same ratio for red, green and blue, while dimming or increasing the overall brightness.

The LED PWM Waveform section will give more information.

The LED COM output unit outputs the external enabling COMm control signals, which are

used together with the PWM CCO outputs in a matrix scan method to implement

(m+1)×(n+1) RGB LED applications.

There is a two page 512-byte LED PWM dedicated data memory, LED_RAM_A and

LED_RAM_B. These two data memory sections can be alternately used for directing the

hardware display operations. When one memory section is being used, the data for the

next frame display can be written into the other memory, thus greatly reducing the

demands on firmware execution speed. LED_RAM_A is located at 80H~FFH in Sector 8

~ Sector B of the Data Memory while LED_RAM_B is located at 80H~FFH in Sector C ~

Sector F. Together with the LED colour and brightness transfer unit and the related

registers, the hardware can implement automatic calculation of the PWM duty cycle.

There are two interrupts, UDINT and LEDINT which can be used during the program

design procedure. The hardware automatically accesses the LED PWM memory data

and when a frame of data is completed, it will generate an LEDINT interrupt signal.

The hardware circuit also provides a function which can automatically increase or

decrease the PWM duty value to achieve various RGB LED display effects, such as that

for breathing lamps, colourful light automatic transformation etc. thus reducing the

firmware workload. In PWM Up or Down mode, which is decided by the UDS bit, the

PWM duty in the LED RAM is increased or decreased by the offset value. If the duty value

reaches the HLMD (high limit) or LLMD (low limit) register value, a UDINT interrupt signal

will be generated.


AN0444E V1.00 3/12 December 11, 2016

Module 0

Module n

6-bit PWM

Intensity

/64

LEDRAM_A

LEDRAM_B

MnCCE

LED Color and Intensity PWMTransfer Unit

HLMOS & LCIO & LFCR Register

UDS & COMDIR & LDCOME & CCOLPO & LDCOM[2:0]

fPWM_16M

fPWM_24M

fPWM_12M

MnCBE

MnCAELMnCAR [5:0]

MnIE

LED COM Output

PWMN[1:0]

6-bit PWMColor C

PWMControl

6-bit PWMColor B

PWMControl

6-bit PWMColor A

PWMControl

RGB3n

PWMILM & PWMALM & PWMBLM & PWMCLM & LLMD Register

PWMIHM & PWMAHM & PWMBHM & PWMCHM & HLMD Register

LMnCBR [5:0]

LMnCCR [5:0]

PWMN[1:0]

PWMN[1:0]

LMnIR [5:0]

RGB3n+1

RGB3n+2

PWMCK[1:0] RAMCK[1:0]

LEDCOM m

LEDRegister A

LEDCOM 0

LEDCOM m

LEDRegister B

LEDCOM 0

COMm

LEDINT(To LED PWM interrupt)

UDINT(To LED Up/Down interrupt)

LED RAM

SFR Fig1. RGB LED PWM Block Diagram – n=0~F, m=0~7


AN0444E V1.00 4/12 December 11, 2016

Constant Current Source and LED PWM Control Register Description

The HT66FB576 RGB LED PWM function includes both constant current source and LED

PWM control functions, whose registers are all located in Data Memory Sector 2. The

constant current function can be controlled by the CCS register to output a constant current.

The LED PWM function can operate in two modes, manual mode and automatic mode,

which are selected and configured by the PWMCTL0 and PWMCTL1 registers.

In manual mode, the LMnIR, LMnCAR, LMnCBR and LMnCCR registers are used to

control fixed PWM duty outputs.

In the automatic mode, using the prestored data in the LED_RAM_A and LED_RAM_B

memory in Sector 8 ~ Sector F, the hardware increases or decreases the duty values of

the RGB colour and intensity PWM. In the Value Up and Down modes, the duty values

are compared with the high limit and low limit values controlled by HLMD&LLMD registers

and the values of their respective high/low limit register pairs, PWMILM & PWMIHM,

PWMALM & PWMAHM, PWMBLM & PWMBHM and PWMCLM & PWMCHM and the

offset values which are defined in the LCIO0, LCIO1 and LFCR registers. The RACmE0 &

RACmE1, RBCmE0 & RBCmE1 registers can enable or disable the corresponding RGB

LED outputs.

The HT66FB576 constant current source and LED PWM control registers are listed in the

following table. Refer to its Data Sheet for more details.

Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 LCIO0 CBPWM3 CBPWM2 CBPWM1 CBPWM0 CAPWM3 CAPWM2 CAPWM1 CAPWM0 LCIO1 IPWM3 IPWM2 IPWM1 IPWM0 CCPWM3 CCPWM2 CCPWM1 CCPWM0 LFCR LFCR7 LFCR6 LFCR5 LFCR4 LFCR3 LFCR2 LFCR1 LFCR0

RACmE0 RACm7 RACm6 RACm5 RACm4 RACm3 RACm2 RACm1 RACm0 RACmE1 RACmF RACmE RACmD RACmC RACmB RACmA RACm9 RACm8 RBCmE0 RBCm7 RBCm6 RBCm5 RBCm4 RBCm3 RBCm2 RBCm1 RBCm0 RBCmE1 RBCmF RBCmE RBCmD RBCmC RBCmB RBCmA RBCm9 RBCm8

LMnIR MnIE － MnID5 MnID4 MnID3 MnID2 MnID1 MnID0

LMnCAR MnCAE － MnCAD5 MnCAD4 MnCAD3 MnCAD2 MnCAD1 MnCAD0

LMnCBR MnCBE － MnCBD5 MnCBD4 MnCBD3 MnCBD2 MnCBD1 MnCBD0

LMnCCR MnCCE － MnCCD5 MnCCD4 MnCCD3 MnCCD2 MnCCD1 MnCCD0 PWMCTL0 PWMN1 PWMN0 PWMCK1 PWMCK0 LDCOME LDCOM2 LDCOM1 LDCOM0 PWMCTL1 UCLPD CCOLPO COMDIR UDS D3 D2 PWMGE PSEL PWMILM －－ ILM5 ILM4 ILM3 ILM2 ILM1 ILM0

PWMALM －－ CALM5 CALM4 CALM3 CALM2 CALM1 CALM0

PWMBLM －－ CBLM5 CBLM4 CBLM3 CBLM2 CBLM1 CBLM0

PWMCLM －－ CCLM5 CCLM4 CCLM3 CCLM2 CCLM1 CCLM0

PWMIHM －－ IHM5 IHM4 IHM3 IHM2 IHM1 IHM0

PWMAHM －－ CAHM5 CAHM4 CAHM3 CAHM2 CAHM1 CAHM0

PWMBHM －－ CBHM5 CBHM4 CBHM3 CBHM2 CBHM1 CBHM0

PWMCHM －－ CCHM5 CCHM4 CCHM3 CCHM2 CCHM1 CCHM0 HLMOS HMOS3 HMOS2 HMOS1 HMOS0 LMOS3 LMOS2 LMOS1 LMOS0 HLMD －－ HLMD5 HLMD4 HLMD3 HLMD2 HLMD1 HLMD0

LLMD －－ LLMD5 LLMD4 LLMD3 LLMD2 LLMD1 LLMD0

CCS CCEN MC2 MC1 MC0 －－ CCG1 CCG0

Constant Current and LED PWM Control Register List - n=0~F, m=0~7


AN0444E V1.00 5/12 December 11, 2016

LED PWM Automatic Mode Operation Description

Operating in the LED PWM Automatic Mode, the device will use the following registers

LCIO0, LCIO1, LFCR, RACmE0, RACmE1, RBCmE0, RBCmE1, PWMCTL0, PWMCTL1,

PWMILM, PWMALM, PWMBLM, PWMCLM, PWMIHM, PWMAHM, PWMBHM, PWMCHM,

HLMOS, HLMD and LLMD. A two page 512-byte LED PWM dedicated Memory known as

LED_RAM_A and LED_RAM_B are used for the automatic mode operations. The PWM

output control flow chart is shown below.

The number of LED COM outputs is determined by the LDCOM[2:0]( PWMCTL0 Bit 2~0)

bits. The used COMm ports must be in continuous numbers starting from COM0. For

example, if three COM outputs are needed, then they must be output from the

COM0~COM2 ports. Every 3 CCO outputs as a group controls an RGB LED, e.g. CCO[2:0]

and CCO[5:3] each can control an LED. The points mentioned above should be noted

during circuit design.

The required PWM duty cycle value and PWM mode control data can be written into the

LED_RAM_A and LED_RAM_B memory first after which the PSEL(PWMCTL1.0) bit can

be setup to select which Data Memory is to be used in the Automatic mode. If the other

memory is selected as the data memory for the next frame, the hardware will continue to

operate with the data in the current memory until the data at the end address is processed,

that is until the current frame has completed. After this the hardware will process the data in

the selected LED_RAM memory.

The following content will illustrate the data format in the LED PWM dedicated Data

Memory, and the relationship between the PWM duty and the offset value in the value up,

value down and breathing modes.

Configure how many LED COM output by LDCOM[2:0]

Start

Configure PWM source by PWMCK[1:0]

End

Configure PWM output number per each COM by PWMN[1:0]Configure how may LED frame to update LED RAM data by LFCR registerConfigure the corresponding Color PWM and Intensity PWM offset data by LCIO0, LCIO1 & HLMOS RegisterConfigure the Limit register HLMD, LLMDConfigure the corresponding Limit register PWMxHM, PWMxLM where x= I, A, B & C in order to decide which offset register LCIO0 & LCIO1 or HLMOS is in operation.Store application data to LED RAMConfigure which LED RAM and PWM enable Register is in action by PSEL bit

Enable LED hardware Unit by set LDCOME bit and PWMGE bit

STEP 1

STEP 2

STEP 3

STEP 4

PWM Output Control Flow Chart


AN0444E V1.00 6/12 December 11, 2016

Flowchart Description

STEP1: Configure the PWM clock source frequency by setting the PWMCK[1:0] bits

STEP2: Configure how many LED COM outputs are used using the LDCOM[2:0] bits

STEP3: Settings

(1) Configure the PWM cycle output number per each LED COM using the

PWMN[1:0] bit – a recommended value is 10, i.e. one time PWM output per

LED COM.

(2) Configure the interval regarding how many LED frames are between updating

the PWM values in the automatic mode.

(3) Setup the corresponding Colour and Intensity PWM offset values using the

LCIO0, LCIO1 and HLMOS registers.

(4) Setup the Colour and Intensity limit values by setting the HLMD and LLMD

registers.

(5) Setup the corresponding duty range using the PWMxHM and PWMxLM

registers where x=I, A, B or C

(6) Write the required data into the LED PWM dedicated data memory.

(7) Select the LED PWM memory to be used by hardware using the PSEL bit.

STEP4: Set the LDCOME and PWMGE bits to enable the hardware unit for the LED

PWM automatic calculation.

In the automatic mode, the LED PWMs can control the RGB LEDs in a matrix scan

method and generate 3×(n+1) SEG and (m+1) COM outputs in total. The LED PWM

timing diagram is shown below.

An LED frame is a period time that the hardware outputs are low (if the COMDIR bit is 0)

from COM0 to COMm. When COMm is low, the CCO outputs the corresponding PWM

duty cycle according to the related register settings and the data in the LED PWM

dedicated Data Memory.

COM0

LED COMTime Slot

LED frame Interrupt request flag

EnMble tOe corresponding PWM register Mnd output PWM cycle

COM 1

COM m

COM m-1

LED COM Cycle

COM 1

COM m

COM m-1

COM 0

CCO[2:0]

CCO[5:3]

CCO[47:45]

About 10us between COMm-1 Mnd COMm for Non-overlMp

T

T

LED PWM Timing Diagram - m=7


AN0444E V1.00 7/12 December 11, 2016

LED PWM Dedicated Memory Data Format Description

For the LED PWM automatic mode operation, the device provides two pages of an

512-byte LED PWM dedicated data memory, known as LED_RAM_A and LED_RAM_B,

which are used to record the PWM duty data and mode status. Each memory section

stores 4×(n+1)×(m+1) bytes of data. The LED_RAM_A is located at 80H~FFH in Sector 8

~ Sector B of the Data Memory while the LED_RAM_B is located at 80H~FFH in Sector C

~ Sector F. Each LED RAM is subdivided into 8 columns, Column0~Column7. The LED

RAM allocation is shown as follows.

The data stored in the LED RAM are in units of bytes and the definition of each byte is as

follows:

Bit 7~6 Define the PWM mode

00: Output fixed PWM value

01: After setting the PWM duty output, the duty value will increment or

decrement according to the corresponding offset value. The result will be

stored back to the LED RAM. The increment or decrement operation is

determined by the UDS (PWMCTL1.4) bit.

10: The PWM value up in the breathing mode plus the corresponding offset

value is stored back into the LED Data Memory.

11: The PWM value down in the breathing mode minus the corresponding offset

value is stored back into the LED Data Memory.

In the breathing mode, if the duty value in the LED Data Memory is increased to

the high limit value set by the HLMD[5:0] bit field, the hardware will automatically

change the PWM mode to “the PWM value down in breathing mode”. Similarly,

if the duty cycle data in the LED Data Memory is decreased to the low limit value

set by the LLMD[5:0] bit field, the hardware will automatically change the PWM

mode to the “PWM value up in breathing mode”.

Bit 5~0 Define PWM duty initial value


AN0444E V1.00 8/12 December 11, 2016

PWMI_CmM0PWMCA_CmM0PWMCB_CmM0PWMCC_CmM0

PWMI_CmMFPWMCA_CmMFPWMCB_CmMFPWMCC_CmMF

Column 0

Column 1

Column n

Column 6

Column 7

Column 0

Column 1

Column 6

LED_RAM_A

LED_RAM_B

Column 7

Data format

Start address : RAM Sector 8 [80H]

End address : RAM Sector B [FFH]

Start address : RAM Sector C [80H]

End address : RAM Sector F [FFH]

Cm= C0,C1,C2…….C7

LED RAM Allocation

In each Column, there are 4× (n+1) bytes of data which is recorded in the following way.

PWM Column m data: Store the mode and the duty data of Colour A, Colour B, Colour C

and the intensity PWMs, which are used for the COMm and Module n controlled RGB

LEDs.

PWMI_CmM0: The duty values of the intensity PWM for the COMm and Module 0

controlled RGB LEDs.

PWMCA_CmM0: The duty values of the Colour A PWM for the COMm and Module 0


PWMCB_CmM0: The duty values of the Colour B PWM for the COMm and Module 0


PWMCC_CmM0: The duty values of the Colour C PWM for the COMm and Module 0


:

:

PWMI_CmMF: The duty values of the intensity PWM for the COMm and Module F


PWMCA_CmMF: The duty values of the Colour A PWM for the COMm and Module F


PWMCB_CmMF: The duty values of the Colour B PWM for the COMm and Module F


PWMCC_CmMF: The duty values of the Colour C PWM for the COMm and Module F



AN0444E V1.00 9/12 December 11, 2016

Value Up /Down and Breathing Mode PWM Duty and Offset Value Description

In LED PWM automatic mode of value up, value down or breathing mode applications,

the hardware will increment or decrement the offset data from the PWM duty value and

then write the results back into the corresponding LED RAM. The relevant registers

include PWMxLM(x=I/A/B/C), PWMxHM(x=I/A/B/C), HLMOS, HLMD and LLMD.

In order to meet the needs of different LED displays, the device provides three ways to

setup the offset value, based on which range the PWM duty value is in to change the

variations of the colour and the intensity value. It offers users greater flexibility in

applications which are required to change the LED display colour and brightness. The

following figure illustrates the offset value settings for different PWM duty values.

The following conditions must be noted when setting up the offset data to increment or

decrement the PWM duty values of the colour PWMs or intensity PWM. Since the hardware

has no mistake-proof function, the relationship between these values should be noted.

(1) When the PWM duty values for Intensity, Colour A/B/C are between HLMD[5:0] and

PWMxHM[5:0](x=I/A/B/C), their offset values can be set to the same value as

HMOS[3:0]. This allows the brightness and the colour to change smoothly with a

smaller offset value when the colour and the intensity are both weak.

(2) When the PWM duty values for Intensity, Colour A/B/C are between the

PWMxHM[5:0] (x=I/A/B/C) and PWMxLM[5:0] (x=I/A/B/C), the offset values can be

set independently using their respective offset value setting bit field IPWM[3:0],

CAPWM[3:0], CBPWM[3:0] and CCPWM[3:0]. This is commonly used in the main

display phase, where the degree of the brightness and colour change can be set

based on the application requirements.

(3) When the PWM duty values for Intensity, Colour A/B/C are between the

PWMxLM[5:0] (x=I/A/B/C) and LLMD[5:0], their offset values can be set to the same

value as LMOS[3:0]. This allows the brightness and the colour to change smoothly

with a larger offset value when the colour and the intensity are both strong where a

small change is difficult to notice.

PWM duty Low Limit data for Intensity, Color A/B/C by LLMD[5:0]

PWM duty High Limit data for Intensity, Color A/B/C by HLMD[5:0]

PWM duty High data for Intensity& Color A/B/C duty offset modify by PWMxHM[5:0](x=I/A/B/C)

PWM duty Low data for Intensity& Color A/B/C duty offset modify by PWMxLM[5:0](x=I/A/B/C)

Duty offset of Intensity& Color A/B/C = HMOS[3:0]

Duty offset of Intensity=IPWM[3:0]Duty offset of Color A =CAPWM[3:0]Duty offset of Color B =CBPWM[3:0]Duty offset of Color C =CAPWM[3:0]

Duty offset of Intensity& Color A/B/C = LMOS[3:0]

PWM Duty Value vs. Duty Offset


AN0444E V1.00 10/12 December 11, 2016

LED PWM Manual Mode Operation Description

If the LDCOME (PWMCTL0.3) bit is set as ‟0”, the LED PWM will operate in the manual

mode and its relevant registers including LMnIR, LMnCAR, LMnCBR, LMnCCR(n=0~F),

PWMCTL0 and PWMCTL1 must be setup correctly. In the manual mode, users need to set

the PWM duty value and disable/enable the PWM outputs using the application program.

The COMm output function should be configured by the related pin-shared I/O registers.

In the manual mode, the LED_RAM memory and some registers related to the automatic

mode are invalid.

LED PWM Waveform Description

The LED PWMs includes the intensity PWM and the colour PWMs. The frequency of the

intensity PWM is 64 times that of the colour PWM. For each colour level set by the duty

cycle of the RGB colour PWMs, its brightness can be adjusted by modulating the intensity

PWM duty cycle. This allows the colour level to remain at the same ratio between red,

green and blue, while reducing or increasing the overall brightness.

The following example shows a colour PWM waveform, an intensity PWM waveform and

the output RGB PWM waveform. In this example, during each LED COM cycle, there are

two PWM cycles. The colour PWM duty is 2 while the intensity PWM duty is 1, which

ensure that during the colour PWM duty cycle, there is an intensity PWM for brightness

adjustment. This allows the colour level to remain at the same ratio between red, green

and blue when the brightness changes.

Module 6-bit Color PWM(Duty Value=2)

Module 6-bit Intensity PWM

Module RGB PWM Output Waveform

Module6-bit Color PWM period

1 64 164

Module 6-bit Intensity PWM period

Color PWM duty cycles

Intensity PWM duty cycles=1

COM Output Waveform(each COM = 2 PWM cycle)

Module 6-bit Intensity PWM period

Intensity PWM duty cycles=164

Module RGB PWM Output Waveform


AN0444E V1.00 11/12 December 11, 2016

Hardware Circuit Unit Description

The hardware circuit unit related to the LED PWM function includes the CCVDD, CCVSS,

LEDVSS, REXT, COM7~0 and CCO47~0 pins. The COM7~0 & CCO47~0 pins are for the

COM & SEG outputs for the RGB LED matrix scan. The REXT resistor is required for

constant current control with a recommended value of 1.8 kohm. The constant current value

which is 4-level selectable by the CCG[1:0] bits can be fine-tuned using the REXT resistor.

The CCVDD& CCVSS pins are the power pins for the constant current control circuit.

For applications, a capacitor should be connected between the power pins. This should

be located as close to the device as possible to maximise power decoupling. With regard

to interference between CCVDD and CCVSS, it is recommended to consult the following

application circuit. In the circuit the COM outputs are active low (COMDIR=0).

VDD

VDD

8 X 16 RGB LED

HT66FB576

RGB LED Matrix Circuit

REXT

VDD

PMOSx8VDDAVDD

VSSAVSS

UBUS

RESET

LEDVSSCCVSS

REXTCCVDD

CCO0

COM0

COM7

CCO47

..

.VDD

. . . . . . .

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

..

CCO0CCO1CCO2

. . . . .

..

.

CCO3CCO4CCO5

CCO6CCO7CCO8

CCO39CCO40CCO41

CCO42CCO43CCO44

CCO45CCO46CCO47

..

..

..

..

..

..

..

..

CCO0CCO1CCO2

CCO3CCO4CCO5

CCO6CCO7CCO8

CCO39CCO40CCO41

CCO42CCO43CCO44

CCO45CCO46CCO47

. . . . . . .

. . . .

..

..

..

..

..

..

..

..

CCO0CCO1CCO2

CCO3CCO4CCO5

CCO6CCO7CCO8

CCO39CCO40CCO41

CCO42CCO43CCO44

CCO45CCO46CCO47

Recommended Application Circuit


AN0444E V1.00 12/12 December 11, 2016

Conclusion This application note has summarised some considerations and provided advice on using

the HT66FB576 RGB LED PWM function to assist users to use the RGB LED PWM

function more flexibly and develop their products as rapidly as possible.

Versions and Revision Date Author Issue and Revision

2016.09.12 王冠中 First Version

Reference Files For more information, refer to the Holtek official website http://www.holtek.com.tw.

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