high resolution optical lithography or high throughput electron beam lithography: the technical...

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Microelectronic Engineering xxx (2014) xxx–xxx

MEE 9629 No. of Pages 13, Model 5G

27 November 2014

Contents lists available at ScienceDirect

Microelectronic Engineering

journal homepage: www.elsevier .com/locate /mee

Review Article

High resolution optical lithography or high throughput electronbeam lithography: The technical struggle from the microto the nano-fabrication evolution

http://dx.doi.org/10.1016/j.mee.2014.11.0150167-9317/� 2014 Published by Elsevier B.V.

E-mail address: [email protected]

Please cite this article in press as: S. Okazaki, Microelectron. Eng. (2014), http://dx.doi.org/10.1016/j.mee.2014.11.015

Shinji OkazakiGigaphoton Inc., 400 Yokokurashinden, Oyama, Tochigi 323-8558, Japan

33343536373839404142

a r t i c l e i n f o

Article history:Received 20 June 2014Received in revised form 16 October 2014Accepted 18 November 2014Available online xxxx

Keywords:Optical lithographyResolutionResolution enhancement technologiesElectron beamLithographyThroughputShot numberMulti-beams

a b s t r a c t

The development of integrated circuits has been stimulated by the miniaturization of the device featuresize on a chip. The development of lithographic technologies such as optical lithography and electronbeam lithography made important contributions to this miniaturization. Resolution improvement isthe most critical issue in the development of optical lithography. On the other hand, in the developmentof the electron beam lithography, the resolution excellent, but improvement in the throughput capabilityis the most critical issue. This paper describes the history of resolution improvement efforts in opticallithography and throughput improvement efforts in electron beam lithography through the developmenthistory of dynamic random access memories (DRAMs).

� 2014 Published by Elsevier B.V.

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1. Introduction This means that the integration level has become 10 million times 67
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Advances in ultra large scale integration (ULSI) technology havebeen facilitated by the miniaturization of the feature size of deviceson an Si chip [1,2]. This miniaturization has been promoted byMoore’s law and guided by Denaard’s scaling theory [3,4]. Becauseof this miniaturization, the integration level of ULSI has becomevery high over the past 40 years. Micro-electronic Engineeringhas published many papers this miniaturization.

Fig. 1 shows the miniaturization trend of ULSI devices and theintegration level of DRAMs (dynamic random access memories).Not only the integration level of ULSI devices, but also the perfor-mance of devices has improved drastically [5].

In the first 30 years, the miniaturization of ULSI was led by thedevelopment of DRAM devices [6]. This paper discusses the devel-opment of lithographic technology mainly through the perspectiveof the miniaturization of DRAM devices.

At the beginning of the 1970’s, the minimum feature size ofULSI devices was approximately 10 lm or larger. The integrationlevel in the DRAM devices was approximately 1 kb DRAMs. Cur-rently the minimum feature size of the leading edge DRAM isbelow 30 nm and the integration level of the DRAM is over 4 Gb.

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larger than that of the DRAMs in the 1970’s.Various kinds of lithographic technologies were developed over

the past 40 years [7–9]. Fig. 2 shows the evolution of lithographyduring this period. First, optical lithography was used in the con-tact printing scheme. In this scheme, the resolution limit wasthought to be approximately 2–3 lm. There were also problemsrelated to defects. In the contact printing scheme, the photomaskand the resist coated wafer must be contacted. In such conditions,the particles in the environment could enter the resist layer andbecome defects [10,11]. To overcome this resolution limit and pre-vent defects, a projection exposure scheme with a scanning expo-sure scheme was introduced. At this point, there were no strictview of obtaining sub-micron patterns with optical lithography.

First, the one to one projection scheme with a full wafer scansystem was introduced in the middle of the 1970’s. In this system,a whole wafer had to be covered, and the numerical aperture (NA)could not be made large enough to obtain a higher resolution. Thenwe developed the reduction projection exposure scheme at the endof the 1970’s. With the development of the reduction projectionexposure system, the actual resolution improvement had begun[12].

Under such circumstance, we also tried to develop several newlithographic technologies as alternatives to optical lithography.Electron beam lithography is one of the candidates for post optical

http://dx.doi.org/10.1016/j.mee.2014.11.015

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1970 1980 1990 2000 2010

10,000

1,000

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10 1k

Year

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imum

hal

f Pitc

h Si

ze (n

m)

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apac

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its)

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Fig. 1. Miniaturization trends of the DRAM/Flash devices and the Bit CapacityTrends of a DRAM/Flash Chips from 1970 to 2014. First 30 years, DRAM devices ledthe miniaturization. In recent years, NAND Flash memory devices succeeded theminiaturization trend of DRAM devices.

2 S. Okazaki / Microelectronic Engineering xxx (2014) xxx–xxx


27 November 2014

lithography. However, it was used for very limited applicationssuch as the fabrication of very fine device for research purposesand for the fabrication of ASICs (application specific integratedcircuits) and special logic devices used for the mainframe compu-ters in the QTAT (quick turn-around time) lines [13–15]. It shouldbe noted that the use of electron beam lithography for the fabrica-tion of photo-masks began to be widely employed during thisperiod [16].

X-ray proximity printing and ion beam lithography were alsoproposed as candidates of post optical lithography [17,18]. How-ever, the development activities of X-ray lithography could notbe continued because of resolution limit. The development of ionbeam lithography also did not succeed owing to the limitedthroughput capability. Therefore, optical lithography and electron

Pattern Generator

ReticleX

Step and Repeater

Contact Exposure1 Projection

g Line i Line,KrF Stepper KrF, ArF,

Scanner

EB Direc

Φ

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EB Mask Writer

ReticleMask

5X, X

MaskX

AAAAAAAA

BBBBBBBB

CCCCCCCCC

CCCCC

AAAAAAAA

B

A

Fig. 2. Evolution of lithography. Various kinds of exposure schemes such as optical, EB,schemes have been used for ULSI fabrication and EB has been mainly used for mask fab

Please cite this article in press as: S. Okazaki, Microelectron. Eng. (2014), http

beam lithography continued to be developed. These efforts madeimportant contribution to the developments of ULSIs. In this paper,the details of the developments of optical lithography and electronbeam lithography will be discussed.

2. The development of optical lithography

As mentioned above, we have been using optical lithography forthe fabrication of ULSIs in the industrial environment for morethan four decades [19]. During this period, many declarations ofthe demise of optical lithography were made, but each time thetechnology was salvaged by the introduction of various resolutionimprovement techniques such as changes in the exposure scheme,improvements in optical systems, exposure wavelength reductionand resolution enhancement technologies. The details of theseresolution improvements are described below.

2.1. The prelude to reduction projection optical lithography

Fig. 3 shows the resolution improvement history of opticallithography. In the first stage, we used the contact printing schemefor the fabrication of large scale integration (LSI) chips. In thisscheme, a one to one contact mask was used. The masks were fab-ricated by employing the photo-repeater from the 10X reticle [20].The reticles were fabricated by the pattern generators. By employ-ing this one to one mask, a contact printer, and negative tone resistmaterials, we fabricated DRAMs for several generations such as1 kb, 4 kb, 16 kb and 64 kb. We could delineate patterns down toseveral micron ranges by using this contact printing system. In thissystem, defect generation was the major issue. Because of thecontact between the wafer and the mask, we could not eliminate

EB Mask Writer

t Writing

ArF-ImmersionEUV Scanner

X-Ray Proximity PrintingNano- Imprint

Φ

Φ

ReticleMask

X Mask

1X

C

DDDDDDDDDD

DDDDDDDDDD

D C

Φ

X-ray, and imprint were proposed. In the industrial environment, optical exposurerication.

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Miniaturization Trends of ULSIx0.7/3 Years

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1:1Projection

Fig. 3. Resolution improvements history of optical lithography in accordance withthe miniaturization trend of ULSIs. ArF/I: ArF water immersion, DFM: design formanufacturability, SMO: source mask optimization, MPT: multiple patterningtechnology. NA improvements, exposure wavelength reduction, various kinds ofexposure scheme changes and resolution enhancement technologies have beenemployed to cope with the requirements of the miniaturization.

S. Okazaki / Microelectronic Engineering xxx (2014) xxx–xxx 3


27 November 2014

the defects. Separating the mask from the wafer was the key toresolving this issue.

To solve this problem, the one to one projection exposurescheme was introduced. With this projection system, we couldseparate the mask and the wafer, and significantly reduce thedefect.

The resolution capability of the projection exposure system, isgiven by Rayleigh’s equation [21,22].

R ¼ k1 � k=NA ð1Þ
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Exposure Wavelength

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Optical Glass

Quartz

CaF2

100 200 (nm)

ArF KrF XeCl i h g

Absorption O2 and H2O

EUV

Vacuum

13

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UV Excimer Laser Mercury Lamp

Lens

Ar2 F2

(13.5) (157) (193) (248) (365) (436)

Fig. 4. Choice of exposure wavelengths in projection exposure systems. Mercurylamps are used for g-line and i-line exposure. In DUV region, KrF and ArF excimerlaser lights are used. EUV light with 13.5 nm exposure wavelength is underdevelopment.

DOF ¼ k2 � k=NA2 ð2Þ

Here R is the resolution, DOF is the depth of focus of features at theresolution limit, k is the exposure wavelength, NA is the numericalaperture of the projection optics and k1, k2 are constants deter-mined by various factors such as the resist materials, process condi-tions and exposure schemes.

According to this equation, a higher HA or a shorter wavelengthlight is required to obtain a higher resolution. The resolution cap-ability of the 1:1 projection system was around 2 microns.However, it is very difficult to obtain higher NA optics in the 1:1projection system. Reducing the exposure wavelength was alsotried [23–25]. However, no good light source in the deep ultra-vio-let (DUV) region was available at that time. When excimer laserlight was developed, its use in the exposure system was proposed[26–29]. However, the development of the resist materials was notsatisfactory, which limited the use of DUV light.

Simultaneously the reduction projection exposure scheme wasinvestigated. As mentioned later, the resist materials suitable forDUV exposure had not matured yet, and so the reduction projec-tion scheme was developed first.

By employing reduction projection exposure with a step andrepeat system, we could obtain higher NA optics. We called thissystem Stepper. The introduction of the stepper, facilitated theminiaturization of ULSI devices. The stepper is developed by theconversion of the photo repeater with an alignment function, andso the first commercial system was called DSW (direct step onwafer). In the first stage of the stepper introduction, the lightsource was the g-line of a high pressure mercury lamp and theexposure wavelength was 436 nm. The NA was 0.28 and the reso-lution capability was approximately 1 lm.


2.2. Numerical aperture improvements and exposure wavelengthreduction trend

Actual resolution improvement began with the introduction ofa reduction projection system at the end of the 1970’s. At thebeginning of the 1980’s, the first resolution improvement wasachieved higher resolution was required to satisfy the require-ments for larger memory capacities and higher clock frequencies.To cope with this requirement, the higher NA systems were pur-sued. The NA was improved from 0.28 at the end of the 1970’s toover 0.5 in the middle of the 1980’s. However the higher NA sys-tem loses depth of focus rapidly.

At that time the leading edge ULSI devices were DRAMs. In thedevelopment of DRAMs, two types of memory cell structure wereproposed: the stacked capacitor cell (STC) type and the trenchcapacitor cell type [30,31]. Both cell structures were intended tosave the cell area with the use of the three dimensional (3D) struc-ture. With such 3D structure cell, we can obtain smaller chip sizeand lowered the chip cost. In the case of the trench capacitor type,there were no significant surface steps on the wafer. However, inthe STC cell structure, there were big surface steps on the wafer.Accordingly, in the fabrication process of the STC cell, a very largedepth of focus was required to delineate fine patterns over thelarge steps. As a result, we had to introduce shorter wavelengthlight instead of the higher NA system.

Fig. 4 shows the exposure wavelength reduction trend in opticallithography. As shown in this figure, we introduced i-line (365 nm)exposure next to g-line (436 nm) at the end of the 1980’s [32,33].There were also several attempts for introducing KrF excimer laserlight (248 nm) instead of i-line light. The reduction projectionexposure scheme using KrF excimer laser light was proposed byDr. G. M. Dubroecq of Thomson CSF in 1982 and the full field step-per system was developed by Dr. V. Pol of ATT in 1986 [26,27]. Sev-eral similar efforts continued [28,29]. However, the developmentof resist materials suitable for KrF excimer laser exposure hadnot matured yet in the middle of 1980’s. On the other hand,, resistmaterials for i-line exposure were available because they are basedon similar chemistry as the materials for g-line exposure.

The projection exposure systems for i-line are also similar tothose for g-line systems. The projection optics of g-line and i-lineprojection exposure systems were achromatic lens systems. Byemploying i-line, we could delineate sub-micron patterns with arelatively large depth of focus.

The requirements for smaller patterns continued. To delineatepatterns smaller than 0.5 lm, we had to introduce some newtechnologies such as light with a much shorter wavelength or reso-lution enhancement technology: the latter will be discussed later.Here, we focus on the reduction of the exposure wavelength.

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Field Size of Scanner Optics

Maximum Field Size of Scanner: 26mmX 33mm

Field Size of Stepper Optics

Slit Size of ScannerExposure Area of Stepper(Stepper Field)

Exposure Area of Scanner(Scan Field)

Horizontal Size is Limited byMask Size and Magnification

Fig. 5. Comparison of stepper field size and scanner field size. With scanner,smaller optics can cover even larger field size.



27 November 2014

After the development of chemically amplified resist materialsthe excimer laser era began in the beginning of the 1990’s. Thedetails of the chemically amplified resist will be discussed later.First, we introduced KrF excimer laser light (248 nm). The projec-tion optics of the KrF excimer stepper are quite different fromthose of g-line and i-line. As only quartz material can be used inthe wavelength region of KrF excimer laser light, the monochro-matic lens system with line narrowed laser light had to be usedto avoid the effects of chromatic aberration.

The requirements for miniaturization continued to obtainhigher integration, then we had to introduce light with a muchshorter wavelength. As a result, we introduced ArF excimer laserlight (193 nm) [34]. In the case of ArF exposure, the projectionexposure system is also a monochromatic system that uses mainlyquartz material.

By using shorter wavelength light, we can avoid using thehigher NA system. However, the required resolution was very fine,and the DOF was very small in the ArF system. At the same time,the surface topography of the ULSI devices was very large. A newplanarization technology was required, not only to delineate finepatterns, but also to deposit thin films conformably over such largetopography wafer surface. To cope with this requirement, chemicaland mechanical polishing (CMP) technology was developed[35,36]. The CMP process made the surface profile very smooth,after which we were able to introduce ArF exposure with the rela-tively high NA system.

As the demand for even higher resolution continued, we tried toreduce the exposure wavelength from 193 nm to 157 nm [37,38].The F2 laser generates 157 nm light. However the lens materials,mask materials, other optical materials such as pellicle materials,and resist materials were limited. The development of such mate-rials takes a very long time and so we abandoned the use of 157 nmlight, and instead introduced the ArF immersion system.

2.3. Liquid immersion exposure

The liquid immersion system has been widely used for obtain-ing higher resolution in the optical microscope since the 19th cen-tury. The ideas of immersion exposure were proposed at the end of1970’s [39]. However, those ideas involved putting almost entireexposure systems in water, which was thought to be impractical.In 2003, Dr. Burn J. Lin of TSMC pointed out that water immersionwith ArF exposure is a more practical approach than 157 nm lightto overcome the resolution limit of ArF exposure [40,41].Dr. S. Owa of Nikon and his group proposed a practical immersionsystem called local-fill [42]. In the local-fill system, water is filledonly between the lens and the wafer, and almost the entire expo-sure system remain out of the water. This idea looks very practical,and ASML also developed a similar system [43].

With the introduction of the ArF immersion system, we couldobtain an effective exposure wavelength smaller than 157 nm.The refractive index of water at ArF light is 1.44. The effectivewavelength of light in a fluid having a refractive index of n is givenby kvac/n where kvac is the wavelength in the vacuum. Then wecould obtain an effective exposure wavelength of 134 nm and nor-mal ArF resist materials can be used. To obtain a higher NA, variousliquids and lens materials having higher refractive indexes weredeveloped. However, all those development efforts failed, becauseof the difficulty in the development of new optical materials. Cur-rently, the NA is 1.35 in the most advanced immersion system. ThisNA seems to be the highest one for the scanner application.

2.4. Exposure system development

As described before, at the beginning of the reduction projec-tion exposure, we introduced the step and repeat exposure system


called the Stepper [44]. In the stepper system, the entire mask pat-terns are projected onto the wafer by reducing the magnification.After exposing the mask image once, the wafer stage moved onestep to the next position and exposed the mask image again. Theentire wafer was exposed by repeating this procedure. The systemwas thus called the Stepper. In the first system, the reduction ratiowas 10–1. The requirement for a larger chip size drove the reduc-tion ratio transition from 10:1 to 5:1.

To obtain a larger chip size and a sophisticated correction func-tion for better overlay and better focus control, the scanner expo-sure system was introduced [45]. At the same time, the reductionratio was changed from 5:1 to 4:1. Fig. 5 shows the comparison ofthe stepper optics and scanner optics. By the scanning the stripefield, we could obtain a larger scanning field size with an evensmaller lens system. The maximum width of the scanner field isgiven by the mask size and the magnification ratio.

2.5. Resist material evolution

At the stage of contact printing, Cyclo-rubber based negativetone resists with solvent development were widely used. Theyshow good adhesion to the wafer surface and are very resistantto the wet etching process. As those materials are soft, they are sui-table for contact printing; however the resolution capability ispoor. To overcome this problem alkaline aqueous developmentmaterials were introduced. Novolac resin based positive resistmaterials with diazo-naphtho-quinone (DNQ) were introduced[46].

In general, the Novolac resin is soluble in an alkaline aqueoussolution. Adding DNQ, suppresses the solution of Novolac in analkaline aqueous solution. Upon exposure to UV light, DNQ decom-poses and promotes the dissolution of Novolac to an alkalineaqueous solution. We were able to apply this chemical reactionin g-line and i-line resist materials.

However, we could not apply this system to KrF and ArF system.Novolac resin is not transparent to KrF light. Also DNQ is not sen-sitive to KrF light. So we had to develop a new resist chemistry forKrF exposure.

A chemically amplified resist (CAR) system was developed thatshows very good characteristics under KrF exposure. Dr. H. Ito and,Dr. C. G. Willson and their group developed CAR [47]. In this sys-tem, t-BOC protected polyhydroxystyrene (PHS) and a photo acidgenerator (PAG) were used. Upon exposing KrF light, photo acidswere generated, and they attacked, the t-BOC unit at the followingpost exposure baking stage. As the t-BOC unit blocks the dissolu-tion of PHS in an alkaline aqueous solution, after the decomposi-tion of t-BOC, the PHS resin becomes soluble in an alkalineaqueous solution.

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Table 1Exposure Wavelengths and Corresponding Resist Materials.

Exposure wavelength Photon energy Base resin chemical structure

g-Linei-Line

436 nm365 nm

2.84 eV3.40 eV

Novolac resin

KrF 248 nm 5.00 eV Poly hydro-oxy styrene

ArF 193 nm 6.42 eV Adamantan-methacrylate

F2 157 nm 7.90 eV Fluorinated polymer

Fig. 6. Schematic view of reduction projection optical system and the parts wherevarious resolution enhancement technologies can be applied. Light source:modified illumination. Mask: phase shifting. Between lens and a wafer: immersion.On a wafer: multiple patterning.



27 November 2014

The CAR system made it possible to use KrF exposure and todelineate 0.25 lm patterns. The features of CAR are high resolutioncapability and high sensitivity. Several new issues occurred duringthe use of the CAR system, one of which is the post exposure delayeffect (PED) [48]. By exposure to high energy beams such as deepUV light or the electron beam, acids are generated. The quantityof the generated acid is very small and stays near the area of expo-sure. Such small amounts of acid tend to get neutralized by theenvironmental alkaline species. So after the generation of the acidsby the DUV or EB irradiation, the resist layer must be baked as soonas possible. This baking process is called post exposure baking(PEB). The delay of the baking causes various problems such as sen-sitivity variation, line width variation and the generation of a slowdissolution layer at the top of the resist surface. We call this phe-nomenon the post exposure delay (PED) [48]. The substrate condi-tion also affects the shape of the resist patterns [49,50]. To dealwith this phenomenon, Dr. H. Ito and his group developed theenvironmentally stable chemical amplified positive (ESCAP) resist[51].

The use of the CAR system has been extended to ArF exposureand ArF immersion exposure. In the ArF application, the base resinwas changed from PHS to polymer materials without BenzeneRings such as the materials made up of a combination of adaman-tan and methacrylate [52,53]. Table 1 summarizes the evolution ofresist materials development.

2.6. Suppression of the light interference effects

In resist pattern delineation by optical lithography, the suppres-sion of the light interference effects in the resist layer is a veryimportant issue. The reflected lights from the substrate affect onthe light intensity profiles in the resist layer. The standing waveeffects are the results of this interference. To minimize the lightreflection from the substrate, various kinds of anti-reflectionschemes were proposed.

The most popular one is the bottom anti-reflective coatingscheme, called BARC. Putting a relatively thick light absorbing layerunder the resist layer, we can eliminate the reflective light effec-tively [54,55]. With using the interference effect, we can also mini-mize the reflective light by the deposition of a thin interferencelayer at the bottom of the resist layer. So we call this scheme thebottom anti-reflective layer (BARL) [56].

Not only the reflected light from the substrate, but also thereflected light is reflected at the surface of the resist layer and


reflected at the bottom again. Such multiple interference effectsalso change the absorbed energy. To prevent such a reflection atthe surface of the resist layer, the top anti-reflective coating (TARC)was also developed [57,58].

2.7. Resolution enhancement technologies

During the conventional exposure, the k1 factor is approxi-mately 0.8–0.5. The theoretical limit of the k1 factor is 0.25. Toobtain a smaller than 0.5 value for the k1 factor, we have to applysome kind of resolution enhancement technologies. There are sev-eral types of resolution enhancement technologies, that can beapplied at various parts of the optical system [59]. Fig. 6 shows aschematic view of a typical optical exposure system. The exposuresystem consists of several sub-systems, and resolution enhance-ment ideas can be applied at various points. At the light source,we can apply modified illumination technology. At the mask, wecan apply phase shifting technology and OPC (Optical Proximityeffect Correction) [60,61]. Between the lens and the wafer, wecan apply the immersion system.

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Annular Illumination Small σ IlluminationMedium σ Illumination

With ConventionalIllumination

With Annular Illumination With Phase Shift Mask

No Image

Fig. 8. Resolution enhancement technologies. Comparison of illumination sourceshapes, mask and corresponding diffracted light rays in lens systems are shown.With conventional exposure, no image is obtained because the pattern pitch issmaller than resolution limit. Using annular illumination and phase shifting, highresolution images are obtained.



27 November 2014

On the surface of the wafers, we can also apply multiple pat-terning technology, with which we can obtain k1 factor value thatare smaller than the theoretical limit of 0.25. The details of theresolution enhancement technology will be discussed below.

2.7.1. Phase shifting technologyPhase shifting technology was independently invented by

Dr. Mark Levenson and Dr. Masato Shibuya [62,63]. However, thistechnology was not widely recognized as an effective resolutionenhancement technology for optical lithography. In 1989Dr. T. Terasawa showed sub-wavelength patterns using the phaseshifting technology under i-line exposure, after which phase shift-ing technology became widely recognized [64]. In the case of grat-ing patterns, the k1 factor can approach the theoretical limit by theapplication of phase shifting technology under high coherent illu-mination. The problem with this technology was the restrictionsin the pattern layout. In this technology, the phase of a piece ofgrating pattern must be 180� different from the adjacent gratingpatterns.

In the case of isolated small clear patterns such as contact holepatterns, we can apply an attenuated phase shifting technology.The mask of conventional contact patterns is composed of manysmall clear apertures surrounding by an opaque region. In the atte-nuated phase shifting mask, the surrounding layer is not opaque,but slightly transparent with an opposite phase. By using the atte-nuated phase shift mask, we can obtain better resolution than thatobtained with the conventional mask. This technology wasinvented by Professor H. Smith of MIT for X-ray lithography [65],but its actual application to optical lithography was proposed byMr. Norio Hasegawa of Hitachi Central Research Laboratory.

2.7.2. Modified illuminationAnother resolution enhancement technique is modified illumi-

nation. Fig. 7 shows various modified illumination schemes. Thebasic idea of modified illumination is annular illumination. Thiswas proposed by Dr. T. Horiuchi of NTT Atsugi Laboratory in1985 at the domestic meeting of Japan Society of Applied Physics[66]. This technology was also reported in 1989 by Dr. C. Mackand Dr. D. L. Fehrs et al at the KTI Microelectronics seminar[67,68]. They applied annular illumination to obtain higher resolu-tion than that obtain with conventional illumination. In thisscheme, the illumination shape is ring shape and the oblique illu-mination condition can be obtained in every direction in the x–yfield.

On the other hand, by quadrupole illumination, the resolutionof only the x direction and y direction patterns can be improved.This idea was called C-QUEST, and was proposed by Dr. M. Noguchiof Canon and was also independently proposed by Dr. S. Shiraishiof Nikon, who called it Shrinc [69,70]. The extreme scheme is thedipole illumination. In this case, the resolution of only the patternswith a direction perpendicular to the direction of dipole illumina-tion arranged is enhanced. By applying quadrupole illumination or

(a) Normal Illumina�on

(b) Annular Illumina�on

(c) QuadrIllumina

“C-QUEST”, “

Fig. 7. Various source shapes for the resolution enhancement. (a) Conventional illuminDipole illumination for the patterns parallel to y-axis. (e) Dipole illumination for the pa


di-pole illumination, we could obtain an ultimate resolution that isclose to the theoretical limit. Fig. 8 summarizes the effects of reso-lution improvements in the resolution enhancement technologies.

The actual ULSI patterns have more complicated shapes, andannular illumination is very useful. Depending on the complex pat-tern shapes, correspondingly complex illumination shapes are alsoadopted in recent illumination systems. In fact, not only illumina-tion shapes, but also mask pattern shapes are co-optimized toobtain the ultimate resolution improvement; this is the so-calledSMO (Source Mask Optimization). The details of SMO will be dis-cussed in the next section.

2.7.3. OPC and SMOWhen approaching the resolution limit, pattern deformation

became a serious problem owing to the lack of the fidelity of thepattern shape. This phenomenon is called the optical proximityeffect [71]. To overcome this deformation, various techniques areintroduced such as resizing the original mask patterns, and addingassisted features to the original mask patterns [71]. The firstattempt of OPC was to maintain the area of the storage node ofthe DRAM capacitor, by modifying the shape of the storage nodepattern. To keep the designed pattern edges in the right position,we positioned serifs at the corner of the patterns, hammer headpatterns at the ends of the lines, and sub resolution assisted fea-tures around the patterns [72,73].

The development of the simulation technologies also has a verylong history. They are based on the simulation of optical intensityprofiles in the resist layer and the resist development processsimulation for obtaining resist profiles on the wafer. To optimize

upole �on Shrinc”

(d) Dipole Illumina�on

for Y direc�on

(e) Dipole Illumina�on

for X direc�on

ation. (b) Annular illumination. (c) Quadrupole illumination (C-QUEST, Shrinc). (d)tterns parallel to x-axis.

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Fig. 9. Process flow of pitch splitting type double patterning. (a) Cross sectional view (in the case of line and space patterns is shown). (b) Plain view (examples of 2D layoutare shown).



27 November 2014

the shape of the mask patterns, optical intensity profile simulationis very useful. Thus various simulation based OPC systems weredeveloped.

In the advanced mask design system, simulation based OPC sys-tems are widely used. OPC systems produce very complex maskpatterns leading to very long mask writing time. As a result, themask cost became very high.

The most extreme case of this technology is inverse lithographytechnology (ILT) [74]. In ILT, from the required optical intensityprofile, the optimized mask patterns are calculated. In this system,the patterns tend to become very complex.

In the most advanced system, not only masks but also illumina-tion condition are co-optimized to obtain both higher resolutionand fidelity. We call this source and mask co-optimization (SMO)[75]. Not only the shape of the mask structure, but also the shapeof the illumination shapes becomes very complex. To cope with thevery complex illumination shapes, the free-form illumination sys-tem called the Flex-ray system was developed [76].

2.7.4. Multiple patterning technologyIn spite of using ArF immersion systems with various types of

resolution enhancement technologies, we could not overcomethe resolution limit. According to Rayleigh’s equation, in the caseof ArF immersion with an NA of 1.35, the resolution limit isobtained at a k1 factor of 0.25. In this case, the half pitch of39 nm is the limit. However the requirements of the minimum fea-ture size became smaller than 39 nm. To overcome this limit, thereare two solutions. One is waiting for the development of next gen-eration lithography such as EUV lithography or other post opticallithography. The other solution is optical lithography, but toenhance it with special tricks.

The ULSI industry selected the latter solution. The multiple pat-terning technologies are the tricks that are employed. Becausethese technologies are experimental, such tricks were often testedthe laboratories or universities.

The first technology is pitch split type multiple-patterning[77,78]. Fig. 9 shows the process flow and layout patterns of pitchsplitting type multi-patterning. The method is very simple andapplicable to various types of patterns. The example of pitch dou-bling will be shown. The wafer is prepared with a sacrificial layeron it. The coating resists on the layer and delineates the periodical


patterns first. In this stage the pitch of the pattern is double therequired one. Then, the delineated patterns are slimmed and trans-ferred to the sacrificial layer. The coating resists on the layer againand exposes the periodical patterns again with an offset of half thepattern pitch, after which the delineated resist patterns areslimmed again. Finally, by transferring the delineated resist pat-terns and the patterns in the sacrificial layer simultaneously tothe substrate, we can obtain the pitch doubling patterns. In thismethod, very precise overlay control is required, because the sizeof the space patterns is given by the sum of the delineated patternsizes and overlay error. For this reason, improvements in overlayaccuracy in the advanced exposure system are urgently required[79].

The next technology is sidewall spacer type multiple patterningtechnology, which is based on edge patterning technology [80–82].This technology can be applied to the line and space type patterns[83]. It can also be applied to the fabrication of the basic structuresof Fin FETs. Fin FETs require a very thin fin structure. The side wallpatterning is suitable for obtaining very thin channel widths [84].

Fig. 10 shows the cross sectional view of the patterning scheme.First, we prepare the Si wafer with a resist coat. Then we exposethe line and space patterns and develop them. Next the delineatedpatterns are slimmed such that the ratio of line and space is equalto 1:3. At this point, the line width is equal to 1/4 of the patternpitch. Then, we deposit a sacrificial film with thickness equals to1/4 of the pattern pitch. After the deposition of the film, we etchthe film, removing it without removing the sidewall layers. At thispoint, the separation between the sidewall and the adjacent pat-tern is also 1/4 of the pattern pitch. After removing the first resistlayer, the sidewall patterns with a thickness of 1/4 of the patternpitch are remaining with a pitch of 1/2 of the original pattern pitch.As the sidewall layers are formed on every part of the patterns, weapply the second exposure to trim the excess areas. By transferringthe sidewall patterns to the substrate, we could obtain pitch dou-bling patterns. As, there is no need to use a very accurate overlayexposure system, we are able to apply this method first in theindustrial environment.

The most advanced miniaturization technology is applied to thegate pattern delineation of NAND Flash memories [85]. The gatepatterns of NAND Flash memory are mostly composed of lineand space patterns. Therefore sidewall spacer type multiple pat-

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Fig. 10. Process flow of sidewall spacer type double patterning. Variations of linesand spaces depends on various parameters. Variations of L1 depend on spacer filmthickness variation and etching variation of left sidewall. Variations of L2 depend onspacer film thickness variation and etching variation of right sidewall. Variations ofS1 depend on variations in lithography process and etching variation. Variations ofS2 is depend on variations in lithography process, spacer film thickness variationand etching variation.



27 November 2014

terning technology can be applied in the pattern delineation of thegate patterns of NAND Flash memory in the industrial environ-ment. The minimum half pitch of the gait patterns in the leadingedge NAND Flash memory devices, is now approximately 19 nm.To obtain this minimum half pitch pattern, we can use double pat-terning technology. Because we can delineate 38 nm half pitch pat-terns by ArF immersion exposure and by applying doublepatterning, 19 nm half pitch patterns can be obtained. However,smaller than 19 nm half pitch patterns cannot be obtained by thedouble patterning, so quadruple patterning technology must beapplied to 15–16 nm half pitch patterns. Currently, leading edgeFlash memory suppliers are establishing quadruple patterningtechnology for 15–16 nm Flash memory device fabrication.

Not only the gate patterns of the leading edge NAND FlashMemories, but also the fin layers of the most advanced processordevices utilize very fine lines and spaces pattern structures.

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Patterned AreaNon Patterned Area Random

Scan direction of electron beam

(a) Raster Scan (b) Vector Scan

Exposure way by scanning the beam at constant direction and switching it on and off

Exposure way by deflecting the beam At the location of the patterns and scan The area of the pattern

Stag

e M

ovem

ent

Fig. 11. Comparison of scanning schemes in electron beam writing. (a) Raster scansystem and (b) vector scan system.

2.8. One dimensional design and complementary lithography

As the resolution limit in optical lithography was approached,the pattern layout design itself was also forced to change. In thefirst stage of the ULSI development, the role of lithography wasto create patterns identical to the designed pattern on a chip. How-ever, depending on the miniaturization, the shape of the delineatedpatterns deviates from the designed pattern. Then, we applied OPCto correct the proximity effects.

The required minimum feature size becomes smaller than theexposure wavelength itself. General two dimensional patterns can-not be reproduced on a chip, so we had to ask the designers to notuse 2D patterns and instead use one dimensional pattern baseddesign. Only line and space pattern based designs can be acceptedin such a low k era [86,87].

To cope with this situation, the combined use of line and spacepatterns and cutting patterns to create memory patterns and logicpatterns was proposed as complementary lithography byDr. Y. Borodovsky of Intel in 2005 [88]. Complementary lithogra-phy promotes the use of multiple patterning technologies. Forthe cutting pattern delineations, we have to use the multiple


exposure scheme if optical lithography is used. By using EUV litho-graphy and electron beam lithography for the cutting pattern deli-neations, we can avoid the multiple exposure.

3. Development of electron beam lithography

Electron beam lithography is a pattern writing technologybased on the scanning of a focused electron beam [89]. At theinception of this technology, the beam size of the focused electronbeam was small compared to the minimum feature size of thedevice patterns, so the resolution capability was not an issue.The major issue was the throughput. Because of the patterningstrategy, it uses a fine single electron beam. Even at the beginningof electron beam lithography, the scan speed was slow and thenumber of patterns was very large. Then the history of the devel-opment of electron beam lithography became the history ofthroughput improvements.

Another distinct feature of electron beam lithography is thecapability of mask less lithography (ML2). In the most advancedoptical lithography, we need very complicated OPC’d masks. Thecost of such a complicated mask is prohibitive [90]. To avoid thisexpense, the use of electron beam lithography for wafer writingis very suitable for small scale production such as ASICs.

3.1. Evolution of the beam shape

The beam size of the focused electron beam can be very fine.Using the focused electron beam, we could delineate very fine pat-terns. To obtain very small devices experimentally, electron beamlithography was the most convenient technology. However, if wewant to apply this technology to industry, the throughput capabil-ity becomes a problem. Throughput capability improvementappears to be an eternal theme of electron beam lithography.

There are two writing procedures in the electron beam system,a raster scan system similar to the TV scan system, and a vectorscan system. Fig. 11 compares both exposure schemes. Fig. 11(a)shows the raster scan system. The electron beam scans a fixeddirection, such as horizontal, in the deflection field with a certainpitch. By controlling the beam on and off condition, we can writepatterns. With this system, the writing time could be constantand not dependent on the pattern density. Raster scan systemsfor mask writing applications, have been widely used all over theworld.

If we want to obtain a much finer resolution, the scan pitchmust be small, however, the writing time then increases rapidly.

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Electron Gun(LaB6)

Wafer

Fig. 13. Electron optics of variable shaped beam system. Two apertures with asquare shaped opening are set in a column. Beam shape can be controlled by a beamshaping deflector locating between first and second apertures.



27 November 2014

To overcome this problem the vector scan system was developed,which is shown in Fig. 11(b). In this system the electron beamscans only the area where the pattern is located. The writing timedoes not depend on the pattern size but on the pattern density. Inthe vector scan system, the total writing time T is given by the fol-lowing equation,

T ¼ N � ðD=J þ TsetÞ þ Toh ð3Þ

where T is the total exposure time, N is the total shot number, D isthe resist sensitivity, J is the current density, Tset is the settling timefor the beam deflection, and Toh is the overhead time such as thewafer exchange time, evacuation time, pattern alignment timeand so on.

As shown in the above equation, the reduction of the exposureshot number N is the key to reducing the total exposure time.Fig. 12 shows the evolution of the beam shape in electron beamlithography. Here, the exposure shot is defined as the static elec-tron beam exposure with a certain time required for a certain dose.Firstly, we used a very fine focused electron beam. As the mini-mum feature size of the device patterns was larger than the beamsize, we had to fill the patterns with fine electron beam exposureshots. In this case, 96 exposure shots were required to fill thepattern.

Generally, there is a minimum feature size in the device pat-terns, so we can prepare a shaped beam tailored to that feature size[91]. This was called the shaped beam system. With this system,the shot number of the number of the electron beam exposuredecreased drastically. In the case of Fig. 12, six exposure shots wererequired for filling the pattern. The shaped beam system was goodfor a specific application, but it was not suitable for general appli-cations. As the minimum feature size changes frequently, we wereforced to develop a more flexible system.

A variable shaped beam system that could handle various appli-cations was developed later [92–94]. With this system, we couldchange the size of the electron beam and reduce the writing timedrastically. Fig. 13 shows the mechanism of the variable shapedbeam system. In the electron column, there are two square aper-tures and a set of beam shaping deflectors between these two aper-tures. Changing the overlapping condition of the shadows of thefirst aperture on the second aperture, we can vary the size of theelectron beam.

However, even though with the variable shaped beam system,the writing time could not be sufficiently reduced, becauseadvanced ULSIs require very fine minimum feature sizes and thenumber of the ULSI patterns on the wafer became very large. The

(b) Fixed Beam Sys(a) Point Beam System

96 Shots 6 Shots

Fixed Beam Point Beam

(d) Cell Projection System

1 Shot

1 Beam from Cell Aperture

Fig. 12. Comparison of shot number in various exposure schemes. With conventional psystem, 6 shots are required, with variable shaped beam system, only. 3 shots are requiremultiple parallel beam system, all 96 shots are written at the same time.


throughput capability of the variable shaped beam system was stilllow. To overcome the problem, a character/cell projection systemwas developed [95–98]. Fig. 14 shows the electron optics of thischaracter/cell projection system. There are many patterns on aULSI chip, however, there are many patterns that are arrayed per-iodically. In the memory chip, almost 90% or more of all the pat-terns are periodically arrayed. Even in the microprocessor chip,more than 70% of the patterns are composed of static randomaccess memory (SRAM) patterns. Utilizing such periodicallyarrayed patterns, we can reduce the number of exposure shots.In the character/cell projection system, such periodically arrayedpatterns are prepared on the second aperture. By selecting suchperiodically arrayed patterns, we can greatly reduce the exposureshots.

3.2. Proximity effect correction

The proximity effects in electron beam lithography have alonger history than those of optical lithography. Fig. 15(a) showsthe designed pattern and Fig. 15(b) shows the deposited energydistributions in electron beam lithography. As shown in this figure,there are two types of proximity effects. One is the inter proximityeffect. As shown in this figure, a very crowded contact pattern area,the deposited energy distributions become larger than thedesigned size (see Fig. 16).

tem (c) Variable Shaped Beam System

3 Shots

Variable Shaped Beam

(e) Multiple Parallel Beam

Many Beams at 1 Exposure

96 Shots at 1 Exposure

oint beam, 96 shots are required for write the illustrated pattern. With fixed beamd. With character/cell projection system, it can be written in 1 shot. With the use of

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Fig. 14. Electron optics of character/cell projection system. Periodically arrayedpatterns are prepared on the second aperture plate.

Fig. 16. Evolution of beam shape in electron beam lithography systems. Relation-ships between relative throughput capabilities and various beam schemes.



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The other one is the intra proximity effect. As shown in Fig. 15,the deposited energy distribution of an isolated fine hole patternbecomes much finer than the designed size. To correct for theproximity effects, various kinds of proximity effects correction pro-cedures were proposed, for example, the dose correction methodand the size correction method.

The deposited electron energy in the resist layer is composed ofthe energy associated with the forward scattering electrons andthe energy associated with the backscattering electrons. The scat-tering range of the forward scattering is inverse proportional tothe accelerating voltage, that is a higher acceleration voltageresults in a smaller scattering range. On the other hand, the scat-tering range of the backward scattering increases with an increasein the accelerating voltage. However, the deposited energy leveldecreases with an increase in the accelerating voltage. As a result,the characteristics of the proximity effects exhibit different aspectsdepending on the acceleration voltage.

In the low accelerating voltage case such as 1–10 kV, the elec-tron scattering range is mainly defined by the forward scatteringrange. Simple proximity correction methods such as dose controlcan be applied. In the middle accelerating voltage case such as10–40 kV, the backward scattering range and the deposited energylevel could not be ignored, and very complex proximity correction

Fig. 15. Proximity effects in electron beam lithography. Comparison of designed (writtendeposited energy distribution (plain view) and (c) cross sectional view of electron scatt


procedures are required. To cope with this requirement, variousproximity correction procedures were proposed [99–103]. Theseprocedures require precise calculation of the deposited energy dis-tribution. Enormous computing power was required to calculate allthe patterns on a chip.

In the high accelerating voltage case such as 50 kV and above,the backward scattering range becomes very large, but the depos-ited energy level becomes very low. A relatively simple proximitycorrection procedure can be applied. In this range, the depositedenergy level of the backward scattering electrons is proportionalto the pattern density itself. By controlling the dose in accordancewith the pattern density, we can easily correct the proximityeffects [104,105].

3.3. Choice of accelerating voltage

As the forward scattering range of the incident electron ofhigher accelerating voltage is small, the higher accelerating voltageoffers higher resolution. At the first stage of electron beam litho-graphy, relatively low acceleration voltages such as 10–20 kV

) patterns and deposited energy distributions. (a) Designed pattern (plain view), (b)ering and deposited energy distribution in resist layer.

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27 November 2014

acceleration were often used. Depending on the miniaturizationproceeds, the accelerating voltage becomes higher. Currently,many electron beam systems employ accelerating voltage of50 kV and higher. Even in the mask writing system, almost allthe mask writers now use 50 kV acceleration.

A high accelerating voltage lowers the resist sensitivity. Fromthe throughput standpoint, a lower accelerating voltage is favor-able. However, a lower accelerating voltage lowers the resolution.To overcome this drawback, the use of a thin imaging layer is effec-tive. One of the most advanced multiple electron beam systems,MAPPER (the details will be given later), utilizes an accelerationvoltage of 5 kV. The use of the multiple layer resist scheme isrecommended in the use of MAPPER to obtain higher resolution.

The multiple layer resist scheme also helps prevent pattern col-lapse. For this reason, we often use the multiple layer resist schemein most leading edge patterning processes.

3.4. Single beam system to multiple beam system

As mentioned before, the eternal theme of electron beam litho-graphy is throughput improvement. So far I have described howthroughput capability can be improved in the single beam scheme.If we prepare multiple beams and utilize them simultaneously, wecan greatly improve the throughput capability. In fact, the charac-ter/cell projection system utilized multiple beams by separatingsingle beams from one another using apertures. Some multiplebeam systems utilize this idea intensively.

There are several ideas, for realizing multiple beams, but majorapproaches are twofold. One approach employs a single gun andapertures to separate a beam from multiple beams. The otherapproach uses multiple guns and multiple columns.

Fig. 13 shows the evolution of throughput capability improve-ment. Recently, several new ideas for multiple beam exposure havebeen proposed. The first is MAPPER, which utilizes a blanking aper-ture array system with a low accelerating voltage (5 kV) [106,107].The number of beams is more than 13,000. In Mapper’s case, theyare planning to use the multilayer resist scheme to obtain a higherresolution. The second approach is the PML2 system, which alsoutilizes a blanking aperture array system with a low acceleratingvoltage for blanking [108]. After the blanking plate, an accelerationof up to 50 kV employed to obtain a higher resolution. The numberof beams is more than 1 million. First, PML2 was developed fordirect writing, but recently it has been planned to apply this sys-tem for mask writing. The mask writer is called eMET [109]. Thethird approach is REBL, which utilizes the reflection beam scheme.With a CMOS digital pattern generator, several millions of beamscan be simultaneously controlled [110,111].

The multi column system is another way to obtain a largerthroughput. With the development of a very thin electron columnfor the character/cell projection scheme, we can obtain a largerthroughput than with the conventional single column system[112].

Table 2Examples of electron beam resists.

Resist Tone Resolution (nm)

PMMA Positive <10PBS Positive 200–300ZEP520 Positive 10–20FEP171 Positive 80COP Negative 500–1000PGMA Negative 300–500SAL Negative 50–100NEB22 Negative 40–50Calixarene Negative 10–20


3.5. Resist material evolution in electron beam lithography

In the first stage of electron beam lithography development,resist materials with a solvent based developer were used. Themost widely used resist material in electron beam lithography ispolymethyl methacrylate (PMMA). In the case of optical lithogra-phy, positive resist materials were widely used owing to theirsuperiority in regard to resolution capability; whereas in electronbeam lithography, both positive and negative tone resist materialswere used to minimize the writing time. For contact hole pattern-ing, a positive tone resist is selected to delineate contact holepatterns. For gate pattern delineation, a negative tone resist is usedto write gate patterns. Exposure area minimization is the basis fordetermining the tone of resist materials.

PMMA is the traditional, most popular resist material for scien-tific work and applied work. It exhibits excellent resolution cap-ability, but the sensitivity is very low. Various kinds of electronsensitive resist materials have been developed. Table 2 shows thetypical resist materials used in electron beam lithography.

As mentioned when discussing the development of opticallithography, CAR exhibits high resolution and high sensitivity. Inthe case of electron beam lithography, it also exhibits high sensi-tivity and high resolution simultaneously. In fact, the first commer-cialized CAR was the negative tone electron beam resist SAL 601[113]. A higher resist sensitivity facilitates a higher throughput.Various kinds of CARs for electron beams have been developedfor mask making and direct writing applications.

On the other hand, extremely high resolution capabilities arealso pursued for scientific applications. Slow but high resolutionresist materials are also important for scientific work. Calixarenesare one of the materials employed for this purpose.

3.6. Mask writing technology

In the development of optical lithography, the role of the maskis very important.

The patterns on the mask are the basis of the patterns on awafer. The critical dimension (CD) and pattern placement accuracyare dependent on the mask patterns. To fabricate optical masks,electron beam mask writers are widely used, but optical beamwriters are also used [114,115]. However, advanced masks havevery complicated OPC patterns [114,115]. Such OPC patternsusually have very fine structures, and the typical examples aresub-resolution assist features (SRAFs). To delineate such fine struc-tures, the electron beam writer is preferable.

At the first stage, the masks (reticles) were fabricated by themechanical pattern generator. Then the electron beam mask writerEBES was developed by Bell Laboratories at the end of 1970’s [116].The system utilizes the point beam with the raster scan system ona continuous moving stage and 10 keV beam acceleration. TheEBES was commercialized as MEBES and has been used all overthe world from the beginning of 1980’s [117].

Sensitivity (mC/cm2) Developer Remarks

100–200 Solvent5–10 Solvent30–50 Solvent20–30 Aqueous Alkaline CAR1–5 Solvent5–10 Solvent3–10 Aqueous Alkaline CAR30–80 Aqueous Alkaline CAR3000–15,000 Solvent

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Depending on the pattern miniaturization, the number of pat-terns on a mask increased significantly and the writing time ofthe raster scan system became very long. On the other hand, a vec-tor scan system with variably shaped beam scheme, the writingtime can be significantly reduced [118]. As a result, vector scanelectron beam mask writers rapidly become popular all over theworld for advanced mask fabrication.

At the first stage of vector scan mask writer development, arelatively low acceleration voltage and a step and repeat stage sys-tem were adopted [119]. However, to obtain higher resolution andhigher throughput, a higher acceleration voltage and the continu-ous movement stage were introduced [120].

Even at the mask writing time, the increase in the pattern num-ber becomes astronomically large. The total writing time for themost advanced mask exceeds 24 h. A reduction in the writing timeis required. To achieve this requirement, the multiple beam systemis now under development as mentioned above.

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4. Summary

Optical lithography has been widely used for the fabrication ofULSI devices in the past 40 years. The major challenge of opticallithography is improvement of the resolution capability. Furtherthe minimum feature size became more than one thousandth. Tomake this miniaturization possible, various technologies weredeveloped. NA improvements, exposure wavelength reduction,and various types of resolution enhancement techniques are exam-ples of these technologies. Currently, we employ multiple pattern-ing technologies with ArF immersion lithography to satisfy theminiaturization requirements.

Electron beam lithography also has been used for mask makingand small scale device production. The major challenge of electronbeam lithography is the improvements in the throughput capabil-ity. It was very difficult to obtain a higher resolution and a higherthroughput simultaneously by a single fine beam. To overcome thisproblem, the variable shaped beam system and character/cell pro-jection systems were developed. However, the throughput capabil-ity of the most advanced system has not yet reached the requiredlevel. Even with the most advanced single beam system, severaldays will be required for writing most advanced DRAM deviceson a whole 300 mm wafer. To overcome the problem, multiplebeam systems have been under development. However, therequired throughput has not yet been obtained, and further inten-sive development activities are continuing.

Miniaturization requirements for semiconductor devices areunderway. Extreme ultraviolet (EUV) lithography seems to be themost promising candidates for post optical lithography. Until thefurther development and advent of EUV lithography, we have toimprove optical lithography for several more years.

Electron beam lithography is still a very important technologyfor the fabrication of extremely fine device and small scale produc-tion of ULSI devices. Not only high resolution capability, but alsothe mask less function is required for the foundry business. Insmall scale production applications, the development of higherthroughput electron beam lithography will be very helpful forreducing the cost of ULSI fabrication.

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