george engel / brad noble vlsi design research laboratory dr. engel dr. noble room 3047

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George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

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Page 1: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

George Engel / Brad NobleVLSI Design Research Laboratory

Dr. Engel

Dr. Noble

Room 3047

Page 2: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

Analog and Digital Electronics

Everest BiomedicalInstruments

Building relationships!

Page 3: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

The lab is well equipped with two SUN workstations, two HP workstations, a personal computer, several million dollars worth of CAD software, a large HP plotter, and a wide variety of test equipment including a modest setup for probing microchips.

VLSI Design Research Laboratory

Room 3047

Page 4: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

FPGA Development

$250,000 donation from Xilinx

Page 5: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

Printed Circuit Board Capability

Page 6: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

Integrated Circuit (IC) Design

 

Credit card reader IC for Magtek

Page 7: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047
Page 8: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

Typical IC Fabrication Costs

Page 9: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

IC prototype for a local company!

We did it all!

BECS Technolgy, Inc.

 

Dr. Brad NobleDr. George EngelPranay Koka

Page 10: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

HINP32C (Heavy-Ion Nuclear Physics, 32 Channel) is a 32 channel integrated circuit (IC) for use in a series of experiments in low- and intermediate-energy nuclear physics. The IC is fabricated in the AMIS 0.5 m, N-well, double-poly, triple-metal, high-resistance C5N process through MOSIS. The die is 6 mm x 6 mm.

VLSI Design Research Laboratory

Room 3047

Page 11: George Engel / Brad Noble VLSI Design Research Laboratory Dr. Engel Dr. Noble Room 3047

Questions?????

VLSI Design Research Laboratory

Room 3047