freescale powerpoint template - nxp semiconductors · 2016. 11. 1. · digital front-end lte...

TM

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire,

ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis, mobileGT, PowerQUICC,

Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of

Freescale Semiconductor, Inc., Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack,

CoreNet, Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge,

QUICC Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink,

Vybrid and Xtrinsic are trademarks of Freescale Semiconductor, Inc. All other product or

service names are the property of their respective owners. © 2012 Freescale

Semiconductor, Inc.

TM 2

Freescale, the Freescale logo, AltiVec, C-5, CodeTEST, CodeWarrior, ColdFire, ColdFire+, C-Ware, the Energy Efficient Solutions logo, Kinetis,

mobileGT, PowerQUICC, Processor Expert, QorIQ, Qorivva, StarCore, Symphony and VortiQa are trademarks of Freescale Semiconductor, Inc.,

Reg. U.S. Pat. & Tm. Off. Airfast, BeeKit, BeeStack, CoreNet, Flexis, Layerscape, MagniV, MXC, Platform in a Package, QorIQ Qonverge, QUICC

Engine, Ready Play, SafeAssure, the SafeAssure logo, SMARTMOS, TurboLink, Vybrid and Xtrinsic are trademarks of Freescale Semiconductor,

Inc. All other product or service names are the property of their respective owners. © 2012 Freescale Semiconductor, Inc.

• LTE L1 promises data rate of 3/1.5Gbps (DL/UL)

− This peak rate is not guaranteed and is not per UE

− Raw data rate is smaller

• A lot of processing necessary in order to achieve this rate

• LTE uses advanced technologies

− OFDMA over DL

− SC-FDMA over UL

− Advanced modulation and coding

− MIMO

TM 3






• Technical challenges raised by LTE L1 implementation

− How do these transpose into platform features

• Freescale platforms

• Freescale baseband strategy

− Products

− R&D

• Typical project implementation

− Design

− Implementation

− Testing and QA

− Benchmarking

− Integration and SIT

• Quiz

• Survey

TM 4






• Parallel tasks

• Repetitive tasks, executed at high rate

• Large amount of stored data

− Intermediary points

• Peripherals

− High-rate interface towards RF card

30.72MHz x 8 antennas x 32 bits/sample = 7.8Gbps (!!)

− Control interfaces

− Dump data

• Close integration to L2

TM 5






CRC Turbo Rate Matching Scrambling Mod

Map

Layer Map Std Precoding PRB Mapping NonStd

Precoding

Sync/Reference gen

IFFT CP

010011011

TB from L2

Time domain signal to

Digital Front-end LTE resource grid time

fre

q

CB0:

CB0:

CB0:

CB0:

TM 6






TM 7






• Scaled down version of B4860

• Smaller number of users

Feature B4420 B4860

StarCore 2 6

MAPLE-B3 Approx. ½ of PEs

of B4860

Power cores 2 4

TM 8






WCDMA LTE LTE-A Dual

mode

TM 9






Customer

Features

Product

manager Management

Workflow

Brainstorming

Specifications

Design

Team

Feedback

Test team

Team leader

Implementation Team

Team leader

Quality

assurance

Testing

Review

Review

Coordination

Criteria

Bugs

Coordination

TM 10






L1 Application

Mapping Subcarrier

mapping

Measurements L1 Kernels L1

Framework

Operating System

Hardware

Accelerator

Equalization

Turbo

decoding

FFT

Viterbi

decoding

Peripherals

TM 11






3GPP

standard Literature Brainstorming

Design

Reference

code

IDE Coding Assembly

Implementation

Configuration

management

Testing

Cross-reference

tests Static and

dynamic

analysis

Benchmarking Code review

SW bugs

TM 12






Unit Unit tester

Reference code

Input test

vectors

Output

test

vectors

Output

vectors

Automated test

framework

TM 13






• Stands for Quality Assurance

− ISO, CMMI Certifications

• Enforces the software process

− Testing levels

Code review

Bug tracking systems

Collects metrics

− Documentation

TM 14






• Severity levels

− According to impact on customer

• Traceability matrix

− Track where a bug occurs during the software process

− A bug should be discovered:

As early as possible in the process

Design Implementation Unit test Int testing

Design 10 4 2 1

Implementation 5 2 5

Unit testing 6 1

Int testing 1

TM 15






• Required for: -Improve execution speed/cycles consumption

-Minimize memory consumption

• Decide what function to optimize: by profiling

• Types:

-Core cycles optimizations; cache optimizations …

for (i=0;i<length;i+=8) { __ld_8l(px, &x0, &x1, &x2, &x3, &x4, &x5, &x6, &x7); px+=8; __ld_8l(py, &y0, &y1, &y2, &y3, &y4, &y5, &y6, &y7); py+=8; __maccxd_cpp_2x(y0,y1,x0,x1,&sum_r0,&sum_i0); //x0 * y0' + x1 * y1’ __maccxd_cpp_2x(y2,y3,x2,x3,&sum_r1,&sum_i1); //x2 * y2' + x3 * y3' __maccxd_cpp_2x(y4,y5,x4,x5,&sum_r2,&sum_i2); //x4 * y4' + x5 * y5' __maccxd_cpp_2x(y6,y7,x6,x7,&sum_r3,&sum_i3); //x6 * y6' + x7 * y7' }

LOOPSTART0 [ maccxd.cpp.2x d8:d9,d0:d1,d16:d17 maccxd.cpp.2x d10:d11,d2:d3,d18:d19 maccxd.cpp.2x d12:d13,d4:d5,d20:d21 maccxd.cpp.2x d14:d15,d6:d7,d22:d23 ld.8l (r0)+,d0::d7 ld.8l (r1)+,d8::d15 ] LOOPEND0

TM 16






• 15 mins to answer 10 questions

TM 17






• Help us get to you and your areas of interest

freescale powerpoint template - nxp semiconductors · 2016. 11. 1. · digital front-end lte...

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