flow control - diit.unict.it€¦ · flow control flow control can be viewed as a problem of...
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Maurizio Palesi1
Flow Control
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Maurizio Palesi2
Flow Control Flow Control determines how the resources of a
network, such as channel bandwidth and buffer capacity are allocated to packets traversing a network
Goal is to use resources as efficient as possible to allow a high throughput
An efficient flow control is a prerequisite to achieve a good network performance
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Maurizio Palesi3
Flow Control Flow Control can be viewed as a problem of
Resource allocation
Contention resolution
Resources in form of channels, buffers and state must be allocated to each packet
If two packets compete for the same channel flow control can only assign the channel to one packet, but must also deal with the other packet
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Maurizio Palesi4
Flow Control Flow Control can be divided into
Bufferless flow controlPackets are either dropped or misrouted
Buffered flow controlPackets that cannot be routed via the desired channel are
stored in buffers
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Maurizio Palesi5
Circuit Switching
Circuit-Switching is a bufferless flow control, where several channels are reserved to form a circuit
A request (R) propagates from source to destination, which is answered by an acknowledgement (A)
Then data is sent (here two five flit packets (D)) and a tail flit (T) is sent to deallocate the channels
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Maurizio Palesi6
Circuit Switching
Circuit-switching does not suffer from dropping or misrouting packets However there are two weaknesses
High latency: T0 = 3 H tr + L/b (ignoring wire latency)
Low throughput, since channel is used to a large fraction of time for signaling and not for delivery of the payload
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Maurizio Palesi7
Buffered Flow Control More efficient flow control can be achieved by adding
buffersWith sufficient buffers packets do not need to be
misrouted or dropped, since packets can wait for the outgoing channel to be ready
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Maurizio Palesi8
Buffered Flow Control Two main approaches
Packet-Buffer Flow ControlStore-And-Forward
Cut-Through
Flit-Buffer Flow ControlWormhole Flow Control
Virtual Channel Flow Control
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Maurizio Palesi9
Data Units
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Maurizio Palesi10
Store and Forward Flow Control
Each node along a route waits until a packet is completely received (stored) and then the packet is forwarded to the next node
Two resources are neededPacket-sized buffer in the switchExclusive use of the outgoing channel T0 = H (tr + L/b)
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Maurizio Palesi11
Cut-Through Flow Control
Transmission on the next channel starts directly when the new header flit is received (otherwise it behaves like Store-Forward)Channel is released after tail flit T0 = H tr + L/b
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Maurizio Palesi12
Cut-Through Flow Control
ShortcomingsVery inefficient use of buffer space
As buffers are allocated in units of packets Often we need multiple indipendent buffer sets to reduce blocking or
provide deadlock avoidance
By allocating buffers in units of packets contention latency is increased E.g., High-priority packet colliding with a low-priority packet
– Must wait the entire low-priority packet to be transmitted before it can acquire the channel
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Maurizio Palesi13
Wormhole Flow Control Wormhole flow control operates like cut-through, but with
channel and buffers allocated to flits rather than packets Three resources are needed
A virtual channel for the packet Body flits of a packet use the VC acquired by the head flit
One flit bufferOne flit channel bandwidth
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Maurizio Palesi14
Wormhole - Example
H
IP
IPClock Cycle 0
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Maurizio Palesi15
Wormhole - Example
IP
IP
HH
B
Clock Cycle 1
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Maurizio Palesi16
Wormhole - Example
IP
IP
HB
H
B
B
Clock Cycle 2
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Maurizio Palesi17
Wormhole - Example
IP
IP
HB B
T
H
B
Clock Cycle 3
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Maurizio Palesi18
Wormhole - Example
IP
IP
HB T
B
BClock Cycle 4
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Maurizio Palesi19
Wormhole - Example
IP
IP
BB
T
B
H
Clock Cycle 5
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Maurizio Palesi20
Wormhole - Example
IP
IP
BT
T
B H
Clock Cycle 6
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Maurizio Palesi21
Wormhole - Example
IP
IP
T B B
H
Clock Cycle 7
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Maurizio Palesi22
Wormhole - Example
IP
IP
T B
B
Clock Cycle 8
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Maurizio Palesi23
Wormhole - Example
IP
IP
T
B
Clock Cycle 9
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Maurizio Palesi24
Wormhole - Example
IP
IP
T
Clock Cycle 10
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Maurizio Palesi25
Wormhole - Example
IP
IPClock Cycle 11
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Maurizio Palesi26
Wormhole - Example
IP
IP
L1
L2
L3
L4
L5
Blue packet Injected at CC 0
Delivered at CC 7
Latency 7 clock cycles
Green packet Injected at CC 1
Delivered at CC 11
Latency 10 clock cycles
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Maurizio Palesi27
Wormhole Flow Control Comparison to cut-through
Wormhole flow control makes far more efficient use of buffer space
Throughput maybe less, since wormhole flow control may block a channels mid-packets
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Maurizio Palesi28
Wormhole Flow Control
The main advantage of wormhole to cut-through is that buffers in the routers do not need to be able to hold full packets, but only need to store a number of flits
This allows to use smaller and faster routers
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Maurizio Palesi29
Virtual Channel Flow Control
In virtual channel flow-control several channels are associated with a single physical channel
This allows to use the bandwidth that otherwise is left idle when a packet blocks the channel
Unlike wormhole flow control subsequent flits are not guaranteed bandwidth, since they have to compete for bandwidth with other flits
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Maurizio Palesi30
Concept of Virtual Channels
A physical channel is shared by several virtual channels Naturally the speed of each virtual channel connection is
reduced
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Maurizio Palesi31
Virtual Channel Flow Control
There are several virtual channels for each physical channel
Packet A can use a second virtual channel and thus proceed over channel p and q
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Maurizio Palesi32
Virtual Channels - Example
IP
IP
H
Clock Cycle 0
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Maurizio Palesi33
Virtual Channels - Example
IP
IP
B
HH
Clock Cycle 1
VC0 → E
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Maurizio Palesi34
Virtual Channels - Example
IP
IP
B
B
H
H
B
Clock Cycle 2
VC0 → E
VC0 → E
VC0 → S
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Maurizio Palesi35
Virtual Channels - Example
IP
IP
B
H
H
B
B
B
T
Clock Cycle 3
VC0 → E
VC0 → E
VC0 → SVC1 → E
VC0 → L
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Maurizio Palesi36
Virtual Channels - Example
IP
IP
B
B
H
B
B
T
T
Clock Cycle 4
VC0 → E
VC0 → E
VC0 → SVC1 → E
VC0 → L
VC1 → L
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Maurizio Palesi37
Virtual Channels - Example
IP
IP
BT
B
B
B
T
Clock Cycle 5
VC0 → E
VC0 → E VC0 → L
VC1 → LVC0 → SVC1 → E
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Maurizio Palesi38
Virtual Channels - Example
IP
IP
T
B
B
B
T
Clock Cycle 6
VC0 → E
VC0 → E VC0 → L
VC1 → LVC0 → SVC1 → E
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Maurizio Palesi39
Virtual Channels - Example
IP
IP
T
B
B
T
Clock Cycle 7
VC0 → E VC0 → L
VC1 → LVC0 → SVC1 → E
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Maurizio Palesi40
Virtual Channels - Example
IP
IP
B
T
T
Clock Cycle 8
VC0 → L
VC1 → LVC1 → E
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Maurizio Palesi41
Virtual Channels - Example
IP
IPT
T
Clock Cycle 9
VC1 → L
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Maurizio Palesi42
Virtual Channels - Example
IP
IP
T
Clock Cycle 10
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Maurizio Palesi43
Virtual Channels - Example
IP
IPClock Cycle 11
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Maurizio Palesi44
Virtual Channels - Example
IP
IP
L1
L2
L3
L4
L5
Blue packet Injected at CC 0
Delivered at CC 10
Latency 10 clock cycles
Green packet Injected at CC 1
Delivered at CC 11
Latency 10 clock cycles