flicker noise up-conversion due to harmonic distortion in van der

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IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS 1

Flicker Noise Up-Conversion due to HarmonicDistortion in Van der Pol CMOS Oscillators

Andrea Bonfanti, Member, IEEE, Federico Pepe, Student Member, IEEE, Carlo Samori, Senior Member, IEEE, andAndrea L. Lacaita, Fellow, IEEE

Abstract—Harmonic content modulation of the oscillator outputvoltage waveform can contribute to flicker noise up-conversion inLC-tuned oscillators. The paper reports a quantitative analysis ofthe effect in Van der Pol oscillators using the framework of the im-pulse sensitivity function (ISF). It is shown that most of the up-con-version efficiency results from the first harmonic of the ISF, whichis not perfectly in quadrature to the output voltage waveform, andfrom the first harmonic of the transistor current, which is slightlylagging the voltage waveform. A closed-form expression ofphase noise in voltage-limited LC-tuned oscillator is derived thatis in good agreement with circuit simulations. The paper also showsthat the values of both phase shifts are determined by the non-lin-earity of the active element and are linked to the relevant oscillatorparameters, i.e., excess gain and tank quality factor.

Index Terms—Distortion, flicker noise, impulse sensitivity func-tion (ISF), oscillator non-linearity, phase noise, total harmonic dis-tortion (THD), up-conversion, voltage controlled oscillator.

I. INTRODUCTION

P HASE noise of voltage controlled oscillators (VCOs) is akey figure in the design of wireless communication sys-

tems and in the last decade extensive efforts have been de-voted to completely understand how noise sources reflect intophase noise of fully integrated VCOs. Close-in phase noise inCMOS LC-tuned VCOs is dominated by up-conversion of theflicker noise. The effect is exacerbated by the adoption of deeplyscaled sub-micron CMOS technologies that feature noise cornerfrequencies in the MHz-range. Even when the VCO is insidea phase-locked loop (PLL), the phase noise remains anissue since the loop bandwidth is typically in the 100–200 kHzrange to minimize the noise contributions of charge-pump, ref-erence and - modulator [1]. For example, transmitters ofthe so-called 3 GPP (GSM/GPRS/EDGE/WCDMA) systemsrequire a phase noise of about at 400 kHz [1].In practice, considering a safety margin for large scale pro-duction, a stringent figure of about at 400-kHzoffset should be targeted. To reach such a low level, flicker noiseup-conversion has to be accurately minimized [2]–[19]. Threemajor up-conversion mechanisms have been identified so far,namely:1) amplitude to phase noise conversion due to non-linear var-actors [3]–[6];

Manuscript received June 14, 2011; revised September 06, 2011; acceptedOctober 24, 2011. This paper was recommended by Associate Editor I. M. Fi-lanovsky.A. Bonfanti, F. Pepe, and C. Samori are with Dipartimento di Elettronica e In-

formazione, Politecnico di Milano, 20133 Milano, Italy (e-mail: [email protected])A. L. Lacaita is with Dipartimento di Elettronica e Informazione, Politecnico

di Milano, 20133 Milano, Italy, and also with IFN-CNR, 20133 Milano, Italy.Digital Object Identifier 10.1109/TCSI.2011.2177132

2) modulation of the current flowing through the tail capaci-tance in a current-biased VCO topology [7], [8];

3) modulation of the harmonic content of the output voltagewaveform [8]–[14].

Along these years some minimizing solutions have been pro-posed. The adoption of a bank of digitally switchable capacitorscan drastically reduce the AM-PM conversion due to the non-linear capacitances, without impairing the overall VCO tuningrange [17]. The second cause can be minimized by either re-moving the bias current generator [5], [17]–[19] and/or adoptinga resonant filter at the tail [15]. The up-conversion due to themodulation of the harmonic content is instead more difficult tohandle since it is strictly related to the non-linear nature of os-cillators.The effect is known since 1933 when Janusz Groszkowski

published his pioneering work on frequency stability in oscilla-tors [20]. Groszkowski found that the steady-state oscillationfrequency does not perfectly match the resonance frequencyof the tank. Since the active element drives the tank with anon-harmonic current signal, a frequency shift of the oscilla-tion frequency arises. The shift is needed to guarantee that theaverage reactive power delivered to the resonant tank in the os-cillation period is zero. In fact, the high frequency harmonicsof the current signal flow into the tank capacitor, which is a lowimpedance load on the high frequency side of the resonance, de-livering a net capacitive reactive power. The first harmonic ofthe current should therefore lag the voltage in order to deliverthe inductive power needed to keep the balance. In [20] the os-cillation frequency was found to be

(1)

where is the tank resonance frequency and is theamplitude of the -th voltage harmonic. Due to (1), any timenoise modulates the amplitude of the voltage harmonics, a fre-quency modulation is generated ultimately resulting into phasenoise.The concept that harmonic distortion may cause phase noise

degradation in oscillators has been highlighted many times inliterature. For example Vittoz et al. [12], describing the adop-tion of an automatic gain control circuit (AGC) in a crystal os-cillator, state that non-linearities have a “devastating effect onstability” and propose “to limit the amplitude of oscillation” toreduce the effect of distortion. The same idea can be found in[11], where the authors adopt an AGC loop to make possible aquasi-linear operation of the VCO, thus reducing harmonic dis-tortion and improving phase noise performance. Among most

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2 IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS

recent papers, Jerng and Sodini [9] propose to reduce the devicewidth of the differential-pair transistors in a current-biased os-cillator to increase the overdrive voltage and to extend the linearrange of the switching devices. In this way the harmonic dis-tortion is reduced with benefits in terms of phase noise arisingfrom both the switching pair and the flicker noise up-conver-sion of the bias current. These authors refer to the effect as aform of “indirect frequency modulation”. Also in [10] dampingresistors at the source side of the differential pair transistors areintroduced to linearize the transconductor and to suppressnoise up-conversion.Despite distortion has been always considered a fundamental

cause of phase noise generation, only recently Bevilacqua andAndreani [14] started to develop quantitative frameworks bystudying the noise up-conversion of the bias current due tonon-linearities in both Colpitts and differential-pair LC-tunedoscillators. Moving further along this investigation path, thispaper provides a quantitative analysis of the flicker noiseup-conversion arising from the cross-coupled pair in a Van derPol oscillator. For the first time a quantitative link betweennoise up-conversion and non-linearities is addressed taking alsointo account the cyclostationary nature of the noise sources.The paper is organized as follows. Section II describes the

motivations to study a Van der Pol topology. Section III is de-voted to disclose the parameters involved into the flicker noiseup-conversion mechanism in the circuit topology under investi-gation. The quantitative model is validated against circuit sim-ulations in Section IV. Section V explains why and how theup-conversion factor is due to the distortion generated by theactive element, thus providing quantitative links to key designparameters of the oscillator. In Section VI a closed-form expres-sion of phase noise is derivedmatching accurately the sim-ulation results for low degree of distortion. Finally, conclusionsare drawn in Section VII.

II. THE CASE STUDY

Fig. 1 shows a differential LC-tuned oscillator implementinga Van der Pol topology that has been taken as case study in thiswork. With respect to the well-known current-biased differen-tial topology, the circuit does not feature a bias current gener-ator thus removing dominant contributions to both and

phase noise [4], [21]. Moreover the varactors have beenreplaced by a linear capacitor to avoid further AM-PM con-version. Since the topology has very few noise sources, it pro-vides the proper environment to study the up-conversionmecha-nism only due to non-linearity of the switching active elementswithout the presence of other terms. In designing the circuit,NMOS and PMOS transistors have been sized to set the outputnodes to half the supply voltage. The choice maximizes the os-cillation swing. By assuming the same threshold voltage forboth types of transistor ( ), the condi-tion leads to set the same transconductance for both NMOS andPMOS transistors, which translates into. In the following the width will always refer to the width

of the NMOS transistors while the width of the PMOS transis-tors will be always considered adjusted accordingly to retainthe 2.2-ratio. The circuit was simulated in a 65-nm CMOS tech-nology with 1.2-V supply. The oscillator central frequency wasset to 2 GHz by using a tank with ,and a quality factor (i.e., ). Once the tank

Fig. 1. Differential double cross-coupled oscillator implementing a Van der PolVCO.

Fig. 2. Excess gain, , as a function of transistor width. Trianglesrefer to evaluated as in (3) and considering

.

has been sized, the only free parameter left to the designer is thesmall signal loop gain, or excess gain [11], [22], defined as

(2)

being the small signal transconductance of the doublecross-coupled transconductor. The excess gain is usually setbetween 2 and 4 to guarantee oscillator start-up even in pres-ence of process spread and variability of the tank quality factor[11]. In practice, when this topology is adopted to synthesize aVCO, the excess gain is set by choosing the transistors’ widths,while the lengths may be kept at the minimum value not tonarrow the achievable tuning range. Assuming a square-lawtransistor characteristic and considering that at the start-up theoverdrive voltage is , the overall transconduc-tance is given by the sum of the NMOS and the PMOS pairtransconductance, that is

(3)

It follows that the excess gain varies linearly with the transistorwidth, as shown in Fig. 2. As ranges from 25 to 145the excess gain spans from 1.5 to about 9. On the other hand,the larger the transistor width, the larger the excess gain and thehigher the voltage harmonic distortion.Fig. 3 shows the simulated Total Harmonic Distortion (THD)

[22], [23] of the differential output voltage, together with theoscillation frequency, as a function of the excess gain. By in-creasing the harmonic distortion of the output voltage, the os-cillation frequency shifts down with respect to the resonance

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BONFANTI et al.: FLICKER NOISE UP-CONVERSION DUE TO HARMONIC DISTORTION IN VAN DER POL CMOS OSCILLATORS 3

Fig. 3. Oscillation frequency and Total Harmonic Distortion [22], [23] for theVCO in Fig. 1 varying the excess gain . Triangles refer to the oscillationfrequency estimated taking into account the effect of distortion (see (1)).

Fig. 4. Phase noise at 10-MHz (a) and 1-kHz (b) frequency offset as a functionof the excess gain . phase noise at 1 kHz was evaluated adopting bothBSIM4 and SPICE2 flicker noise model.

frequency, in agreement with the Groszkowski effect. In Fig. 3triangles refer to the estimate derived from (1), having care totake into account also the slight dependence of the resonancefrequency on transistor width due to the variations of the gateand drain parasitic capacitances.Let us now consider the circuit phase noise, quoted as Single

Sideband to Carrier Ratio (SSCR) [24] in the following. Fig. 4shows the dependence of the and the phase noise onthe excess gain, , evaluated at 10 MHz and 1 kHz, respec-tively. While at 10 MHz phase noise is dominated by contribu-tions of the stationary noise source (i.e., the tank loss resistance)and of the cyclostationary white noise sources of the transis-tors, at 1-kHz their contributions are negligible, independentlyof the excess gain, thus making possible to isolate the term dueto flicker noise up-conversion. Results using both BSIM4 andSPICE2 flicker noise model are shown (Fig. 4(b)). It turns outthat the larger the transistors and thus the excess gain , thehigher both and phase noise contributions. Now thequestion is whether the rise of the phase noise is due to an in-crease of noise sources intensity and/or to an increasing effi-ciency of the folding and conversion mechanisms pumping upnoise within the oscillator bandwidth. As far as the phasenoise is considered, its dependence on has been ascribed tothe increasing loading provided by the transistors to the tank. Astheir width gets larger, the devices operate in the linear regionfor a larger portion of the oscillation cycle, loading the resonatorand leading to “a degradation of the resonator quality factor”[25]. In other terms, the rise of the phase noise is mainly

ascribed to an increase of the noise power. On the other hand,the steeper rise ( in Fig. 4(b)) of the phase noisehas been so far qualitatively attributed to the growing oscillatornon-linearity [9]. The aim of the following sections will be toprovide a quantitative justification of this idea.

III. THE UP-CONVERSION MECHANISM

The contribution of each single noise source to the oscillatorphase noise may be computed using the Impulse SensitivityFunction (ISF) [26]. For each noise generator the ISF can bedefined as a dimensionless function, , that provides theasymptotic shift of the oscillator waveform phase caused by theinjection of a current noise pulse with unity amplitude, at thegenerator terminals, when the oscillation phase is . Underthis frame, the phase fluctuation generated by a noise source,

, can be written as

(4)

where is the maximum charge displacement taking placeduring the oscillation period across the tank capacitor. Let usnow refer to the circuit in Fig. 1. The noise injected by eachswitching transistor (e.g., the n-MOSFET at the bottom left) willaffect the oscillator phase noise via , the latter beingthe ISF for a noise generator applied between its drain nodeand ground. On the other hand, the noise source in (4), ,will be the cyclostationary noise generated by the dependenceof the transistor flicker noise current on its periodically varyingoperating point.Before deriving both functions by circuit simulations, some

simplified arguments may help in highlighting some of their keyfeatures that will be then confirmed by numerical results. Let usassume that the output voltage waveform is given by

. In this case, the ISF of a noise source placed acrossthe tank can be well approximated by a harmonic function inquadrature to the differential voltage [26], [27]

(5)

On the other hand, a noise current pulse injected by the noisegenerator across the n-MOSFET at the bottom left in Fig. 1will cause some signal to flow through the tank. More precisely,since the tank capacitor behaves as a short-circuit and the im-pedances of the two branches ( - and - ) are almostthe same for any operating bias point along the oscillator cycle,about half of current pulse injected at the drain node is expectedto flow through the tank. It follows that should be wellapproximated by half the ISF across the tank, that is

(6)

Fig. 5 shows the ISF derived by simulating the circuit in Fig. 1for a particular value of the excess, (see Appendix Afor details about ISF simulation methodology). The comparisonwith the approximation given by (6) is good. However, someslight discrepancies may be noticed. First of all the simulatedfunction is distorted. This result is not a surprise since any dis-tortion of the output voltage waveform will also reflect on theISF [28]. In addition it can be seen that the simulated ISF slightlyleads the harmonic estimate given by (6). The same phase shift

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Fig. 5. Simulated and estimated dependence of the ISF, , for a currentnoise generator at the node as in Fig. 1 derived for .

appears on (not shown). A better approximation forthe first harmonic of can therefore be given by:

(7)

where is a positive phase shift. This term is by far the mostdominant one. However, in the following sections the impact ofthe higher order harmonics arising from distortion will be alsoaddressed.Let us now consider the noise generator, , in (4). As far

as the transistor operates in small signal regime, noise processesare described by a power spectral density that depends on somedevice parameters. A simple model equation for the termis provided by [29] and adopted by the SPICE2 flicker noisemodel. According to this model the power spectral density ofthe current noise may be written as

(8)

where is a process dependent constant, the transistorchannel current, the MOS channel length and the ex-ponent a constant typically ranging between 1 and 2. Morerefined models, as BSIM3 or BSIM4, are numerically imple-mented in circuit simulators. In all cases the power spectral den-sity varies according to some device parameters whose value de-pends on the transistor bias point. In a large signal time-variantregime, these parameters are periodically modulated and thenoise processes become cyclostationary. In numerical simula-tions cyclostationary processes are therefore described startingfrom a stationary noise and then considering the intermixing ofthe noise components arising from the large signal variationsof the device parameters. The process is schematically depictedin Fig. 6. Referring to the flicker noise model given by (8), thenoise components are considered as generated by the product[30]:

(9)

where

(10)

is a noise tone with frequency and phase randomlydistributed over the 0- interval, while the amplitude, , is

Fig. 6. Schematic block diagram describing the generation of phase noisefrom the modulation through of a stationary source .

Fig. 7. Cyclostationary current noise tones resulting from a slow frequencytone ).

chosen to account for the stationary part of the unilateral powerspectral density:

(11)

The periodic modulating function is instead given by

(12)

Even if this approach seems to work well to describe the be-havior of cyclostationary white noise sources (shot or thermalnoise) in linear time-variant circuits, there is a general belief thatfor long-term correlation noises, like flicker noise, this approachmay be questionable [31]. Moreover, experimental measure-ments have demonstrated that stationary-based noise models,like SPICE2 and BSIM3, are not accurate enough in cyclosta-tionary regime [32]–[34]. However, since the purpose of thispaper is to grasp a physical insight of the up-conversion mech-anism and to quantitatively justify the SpectreRF simulation re-sults, we follow the procedure described above sticking to thesimple model in (8).Referring to the noise generator in Fig. 1, the contribution to

the output phase arising from the low-frequency tone cantherefore be written as

(13)

Note that the product generates correlated noisecomponents at offsets as schematically depictedin Fig. 7. These components translate via the ISF, , tophase noise.Let us now try to gain a more quantitative insight into the

outcome of (13). Since is a periodic function, canbe expanded in a Fourier series as

(14)

with Eulerian components given by

(15)

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Taking for the first dominant harmonic term given by(7), it turns out that the current tones significantly contributingto phase modulation are only those at

(16)

These tones are multiplied by the first harmonic of ,

(17)

and the integral in (13) leads to a phase modulation at a fre-quency given by

(18)Taking , the amplitude of the phase modulation istherefore written as

(19)

Since the Single Sideband to Carrier Ratio is given by ,it results:

(20)

Considering the contribution of both PMOS and NMOS transis-tors, the power spectral density of the process results:

(21)

where the initial factor of 2 derives from adding the uncorrelatednoise contributions of the two transistors within each cross

coupled pair. Thus, the overall phase noise can be written as

(22)

Equations (21) and (22) assume that the modulating functionis the same for NMOS and PMOS transistors. The exten-

sion to a more general case can be easily derived. From a con-ceptual standpoint, (22) highlights that the noise up-conver-sion depends on the values of two key phase shifts:• the phase shifting the ISF first harmonic from beingprecisely in quadrature to the voltage waveform;

• the phase of the first harmonic of the modulating func-tion, , with respect to the voltage waveform.

In the next section both phase shifts will be evaluated and thephase noise estimate given by (22) will be compared to simula-tion results.

IV. CIRCUIT SIMULATIONS AND THEORY VALIDATION

The close-in phase noise of the oscillator topology inFig. 1 has been simulated for different excess gain . On the

Fig. 8. as a function of excess gain . Triangles refer to the phase estimategiven by (47).

same circuits the two phases and have been evaluatedthrough linear time variant SpectreRF simulations. The phasehas been estimated by periodic AC (PAC) analysis. The ex-

traction relies on the following procedure. As a current tone isinjected across the tank resonator at , the output voltageshows two correlated tones at . They are generated bya phase modulation that can be written as:

(23)

where, in the last step, has been taken equal to. It follows that the phases of the output

voltage tones are given by:

(24)

More often, in the simulation environment, the output voltageat the fundamental frequency turns out to have an initial

phase, , with respect to the origin of the time scale, dependingon the start-up dynamics. In this more general case the phasesof the two output tones are given by

(25)

Therefore, can be extracted from the phase of the outputvoltage tone at . Fig. 8 shows the dependence ofon the excess gain. By increasing using larger transistors,the phase grows.Regarding the phase , it can be derived from a periodic

steady state (PSS) simulation. Since the modulating functionis (with in the considered tech-

nology) it can be evaluated using a Verilog-A block computingstarting from the simulated waveform of the cur-

rent flowing through a transistor (e.g., in Fig. 1). Some caremust be devoted to estimate the actual transistor channel cur-rent. In fact, the only accessible node is the transistor drain butthe drain current also includes components due to drain-sub-strate (or drain-well) and gate-drain parasitic capacitances thatcannot be neglected at 2-GHz frequency. To overcome this lim-itation the oscillator has been scaled in order to lower the oper-ating frequency, by retaining the same quality factor, the same

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Fig. 9. Phase of the first harmonics of , and modulating

function, . Triangles refer to the estimate of first harmonic phaseusing (39).

tank resistance and thus the same current waveform for the sametransistor width. Since

(26)

scaling is performed by increasing the tank capacitance andinductance of the same factor. By lowering the operating fre-quency in theMHz range the capacitive components of the draincurrent become negligible thus making possible to get the timedependence of the channel current from the drain node. The pro-cedure is accurate enough provided that phase delay due to finitegate resistance and finite cut-off frequency ( ) of the transis-tors is negligible. In the case under investigation this is reason-able since is larger than 300 GHz and the oscillation fre-quency is 2 GHz, while the gate delay was estimated to be lessthan 200 fs, independently of the considered transistor width.Fig. 9 shows the phases of harmonics of ,

and modulating function, , versus theoscillator excess gain. The reason to consider , ratherthan , is related to the relationship between tank andtransistors’ current. In fact, referring to Fig. 1, it is

(27)

where and are the currents flowing in the PMOSand in the NMOS , respectively. Clearly, the phase

of - , which is plotted in Fig. 9, is negative sincelags the voltage and thus lags the

differential output .For an excess gain greater than 4, corresponding to NMOS

transistor width larger than 65 , the oscillation amplitude ishigher than the power supply, thus making the transistor current

to be negative for a fraction of the period (the current flowsfrom source to drain in the NMOS ). This is why the phase offirst harmonic of deviates from the phase ofwhile the power raising operator has a minor effect.Fig. 10 (dashed line) shows the phase noise at 1-kHz offset

estimated by using (22), taking into account the contributionsof all devices. The noise coefficients areand for NMOS and PMOS transistors, re-spectively, and . The result is in good agree-ment, within 3 dB, with the values obtained from a SpectreRF

Fig. 10. phase noise at 1-kHz offset. Dashed line and triangles refer tothe analyses based on first harmonic (see (22)) and all harmonics of , respec-tively. Diamonds refer to the rough estimate given by (51).

periodic noise (PNOISE) simulation. Note that the maximumdiscrepancy occurs for large transistor widths where the contri-bution of the higher order harmonics of the ISF is expected tobe larger.In order to refine the estimate, can be written as [35]

(28)

Thus, a slow noise tone as in (10) generates a phase modu-lation of the differential output voltage with an amplitude equalto

(29)

where is the differential oscillation amplitude, which, for anon-harmonic output voltage, differs from (see (19)). Equa-tion (29) reduces to (19) if can be approximated by its firstharmonic term and taking . From (29) thephase noise can be expressed as:

(30)

where is the power spectral density of the noise sta-tionary process , as in (21). The phases and canbe evaluated by means of the same simulation methods adoptedto estimate the first harmonic terms of and of the modulatingfunction.Fig. 10 (triangles) shows the phase noise estimation

taking into account all the harmonic terms and the con-tribution of both NMOS and PMOS pairs. The discrepancy isnow reduced to less than 0.5 dB with respect to the simulatedphase noise at 1-kHz offset. Fig. 11 shows the contribution tothe output noise due to the most relevant terms in the bracketsof (30). In addition to the dominant term generated by the firstharmonic of , the contribution due to the third harmonicis important. Its rising dependence is not due to the phase

, which is always around zero degrees thus giving

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Fig. 11. Contributions to output noise due to -harmonic of drain-referredISF, .

Fig. 12. Behavioral model of a Van der Pol oscillator. is a generic noisecurrent tone.

. It is instead the amplitude of the thirdharmonic of that changes by a factor of 10 as the excessgain ranges from 1.5 to 9 and the oscillator is driven in a highlynon-linear regime. The contributions due to the DC and the 2nd harmonic of are more than one order of magnitude lowerand negative. This result is not surprising. Since low frequencynoise is up-converted around the oscillation frequency and itsharmonics, all the contributions are correlated and they maylead to a partial cancellation. The next section will be nowdevoted to investigate the link between the up-conversionmechanism and oscillator non-linearity. The two phase shifts,and , will be quantitatively related to oscillator design

parameters, like excess gain and tank quality factor.

V. LINKING UP-CONVERSION TO DISTORTION

A Van der Pol oscillator can be schematically represented asa LC tank with a loss resistor R and a third order non-lineartransconductor, , providing the energy tobalance, at steady state, its losses (Fig. 12).In the circuit in Fig. 1 the transconductor is synthesized by a

double cross-coupled pair. Its non-linear - curves are reportedin Fig. 13 for two different values of the transistor width togetherwith the fitting third order polynomial curves. The first coeffi-cient, , is the small signal transconductance, that is .It can be also shown that .In order to simplify the analysis let us consider only the first

and third harmonic of output voltage. The voltage waveformwill therefore be taken as:

(31)

Fig. 13. - characteristic of the double cross-coupled pair LC oscil-lator sketched in Fig. 1 for ( ) and( ). Dashed lines refer to third order polynomial approximations.

where and are both positive. The phase relationship be-tween first and third voltage harmonic will be justified in thefollowing. Starting from (31) the output current of the transcon-ductor at the fundamental frequency, , is computed as

(32)where e are the in-phase and in-quadrature terms, respec-tively, of the first harmonic of the current. Due to the quadraturecomponent a phase shift is generated between and the firstharmonic of the voltage . More precisely lags with respectto . Since the ratio is the tank impedance evaluatedat the oscillation frequency, (32) suggests that oscillation fre-quency deviates from resonance, being .By equating resulting from (32) to the current flowing into thetank, both for the in-phase part and for the in-quadrature term,the amplitude and the shift of the oscillation frequency re-spect to can be derived as:

(33)

(34)

Note that this is a simplified version of the rigorous analysisalready performed by Groszkowski [20]. In order to derive aclosed form expression for , the transconductor output cur-rent at is needed. By taking , this term turns outto be:

(35)

Equation (35) justifies the approximation of the output voltagegiven in (31). Since the third harmonic of the current flowsmainly into the tank capacitor, whose impedance is ,

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Fig. 14. Oscillation frequency as a function of the excess gain.

Fig. 15. Dependence on the excess gain of the THD and of the 1 st and 3 rdvoltage harmonic amplitudes.

it results in a third harmonic of the output voltage in quadraturegiven by

(36)

More detailed balance equations are given in Appendix B,where it turns out that is better approximated by a slightlydifferent value as in (59). It follows that the total harmonicdistortion of the oscillator is:

(37)

Equation (37) suggests that the harmonic distortion is only func-tion of excess gain and quality factor. From (34) and from theamplitude of the third harmonic in (36), the shift of the oscilla-tion frequency results

(38)

Moreover, from (32), the phase of the first harmonic of the thecurrent is given by:

(39)

The compact equations derived above have been compared tothe steady-state solution of the behavioral model in Fig. 12obtained by a PSS simulation in a Cadence environment.Figs. 14–16 show the oscillation frequency, the amplitudes

Fig. 16. Phase of the first harmonic of the current as a function of theexcess gain.

and together with the total harmonic distortion and thephase , respectively, as a function of the excess gain. Thesmall signal transconductance, , has been changed from 10mA/V to 60 mA/V, while the other model parameters havebeen taken as: , , and

.1 Note that although the analysis was carried outonly considering the first and the third harmonic of the outputvoltage, the accuracy is very good even up to an excess gain of9.The next step is to link the tank current to the transistor cur-

rent and then to the modulating function. To this purpose notethat the current entering the noise model is the MOS channelcurrent. Since NMOS and PMOS transistors are sized to be elec-trically equivalent and the phase of the transistor current atis only function of the voltage distortion, while other sources ofdelay are negligible, it results

(40)

and then from (27)

(41)

Equation (41) states that the phase of the first harmonic ofcan be approximated by . Clearly, it is not possible

to find a closed-form expression of , since the modulatingfunction is related to MOS channel current by twonon-linear operators: absolute value and power raising. How-ever, for low excess gain, i.e., for quasi-harmonic current,is well approximated by the phase of , as evident inFig. 9. The following analysis will therefore be limited to thisrange, that is adequate for most of the applications.Let us now derive a compact expression for the phase ,

which plays a key role in the up-conversion process (see (22)).The first step will be to demonstrate the following statement: ifa small current tone at the oscillation frequency of the unper-turbed system, , is injected into the tank with an initial phase, a particular phase, , exists so that the output voltage does

not exhibit phase variation (while the oscillation frequency re-mains whatever the phase [36], [37]); this phase is equalto the phase shift, , of the first harmonic of the ISF.1In a real oscillator the parameter is function of while it was kept con-

stant in the behavioral simulations. However, this does not invalidate the ob-tained results, since simulations confirm that THD and current phase are onlyfunction of the excess gain and thus of .

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Let us consider a Van der Pol oscillator whose steady-state so-lution has a first harmonic given by . There-fore, the first harmonic of the ISF may be taken as:

(42)

Let us now inject across the tank a current tone at the oscil-lation frequency of the unperturbed system,(Fig. 12). The first harmonic of the output voltage is perturbedboth in amplitude and phase, thus becoming

where and at steady state.Since the tone is injected at an offset from the carrier,the condition is no longer valid as well as (4). Thisis a particular case of injection locking condition and the outputvoltage phase has to be evaluated solving the following differ-ential equation [37]:

(43)

Since the output phase has to be constant, i.e., , itfollows that

(44)

If , the phase of the first harmonic of the output voltageis left unperturbed. In this case, only amplitude variation takesplace and the output waveform can be written as

(45)

By writing the proper harmonic balance equations for thevoltage and the current components, and canbe linked to the parameters of the Van der Pol oscillator. Theresults are detailed derived in Appendix B. They lead to

(46)

(47)

Equation (46) represents the effect of the non-linearity on theamplitude variation. The larger the excess gain the larger thenon-linearity and the smaller the amplitude variation due to theinjected current tone. Equation (47) is the excess phase of ISFfirst harmonic. Note that the term is equal to ,being the Van der Pol parameter [38]. This is the reason whythe phase shift has been denoted as . Equation (47) suggeststhat the phase is only function of the excess gain, , andof the tank quality factor, . Fig. 17 compares the excess phaseevaluated through SpectreRF periodic AC simulations on thebehavioral oscillator of Fig. 12 with the same method describedin Section IV and the result given by (47). The estimates andthe simulation results are in good agreement and only for highexcess gain the discrepancy becomes evident. In the same way,(39) and (47) can be used to estimate the transistor current phase

Fig. 17. Excess phase of the ISF first harmonic as a function of the excessgain.

and for the circuit in Fig. 1. Figs. 8 and 9 show that the modelprovides an accurate prediction of circuit performance.

VI. DISCUSSIONS

In Section III it was demonstrated that close-in phasenoise is linked to the phases and , both depending on theamount of non-linearity of the oscillator. Equations (20), (39)and (47) highlight that flicker noise up-conversion is reduced incase of:1) low excess gain, i.e., low distortion of the voltage output;2) high tank quality factor (for a fixed excess gain), i.e., strongattenuation of high order voltage harmonics.

Under these conditions the transistor flicker noise generatesonly amplitude noise since and . In practicedistortion cannot be neglected since some excess gain is neededto guarantee the oscillation start-up and the quality factor offully integrated resonators is not large enough to filter out highorder harmonics, causing and .It’s worth nothing that up-conversion arises since noise

current tones modulate the amplitude of the voltage harmonics,changing the oscillation frequency as in (34) and thus causingphase noise. This induced phase modulation increases with theexcess gain as can be qualitatively explained with the help ofthe phasor diagram in Fig. 18 representing the first harmonicof the voltage waveform, , and the first harmonic of thetransconductor current, . In the more general case, due to theGroszkowski effect, the current lags the voltage by a phase .The oscillation frequency is shifted from the tank resonanceand is also the phase of the tank impedance at that frequency.Let us now consider the injection of two current noise tones at

an offset from the fundamental frequency with the samephase of the current (Fig. 18(a)). This situation representsthe conversion of a slow frequency tone of the flicker noise intocorrelated current noise around the fundamental frequency dueto the cyclostationary regime of the transistors, when iswell approximated by the phase of the current , . These twotones generate a modulation of the current in-phase to the outputvoltage, i.e., by . The in-quadraturemodulation is instead (Fig. 18(b)).However, this is not the steady state condition. It should be takeninto account that, due to oscillator non-linearities, the systemreacts to reduce the amplitude modulation of the voltage ,

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Fig. 18. Injection of two current tones at an offset from the fundamentalfrequency (a) results in an in-phase and in-quadrature modulation of the cur-rent (b). The non-linearity of the system reduces the in-phase modulation in-creasing the in-quadrature modulation (c). The resulting effect is that the higherthe excess gain the larger the modulation of the phase , (d), i.e., of the os-cillation frequency.

(see (46)), thus reducing the in-phase current modulation and in-creasing the in-quadrature current modulation (Fig. 18(c)). Thephase, , is therefore changed (Fig. 18(d)) as well as the oscil-

lation frequency according to its dependence on tank impedancephase. It turns out that the higher the excess gain, the higher thenonlinearities, the larger the frequency modulation induced onthe output voltage.Let us now try to derive a closed form expression of the

phase noise starting from (22) and considering an excess gainnot larger than 4, which is almost always verified in practice.In this range . Assuming that in Fig. 1 is muchlarger than the MOS channel resistances, the tank current at thefundamental frequency is:

(48)

and, based on (41), the first harmonic of the transistor currenthas an amplitude

(49)

while the amplitude of the first harmonic of the modulatingfunction may be taken as:

(50)

With , as in the considered technology, the up-convertedflicker noise can be estimated as

(51)

By taking and increasing the excess gain from 1.5to 4, the phase noise of the reference oscillator is expected toincrease from to . This estimatematches very closely the simulation results (see rough estimatein Fig. 10). Equation (51) also suggests that phase noisecan be reduced by decreasing the excess gain and/or improvingthe quality factor. Note that the phase noise is proportional to

even if both and are proportional to , thussuggesting a dependence of phase noise. The reason forthis additional dependence on is that also the transistorchannel current depends on the tank loss resistance .The larger the tank quality factor, the smaller the current andalso the flicker noise intensity.Finally, the reader may wonder whether this flicker noise

up-conversion mechanism is dominant or not in a real oscillatorthat makes use of varactors to tune the oscillation frequency.The AM-PM conversion due to non-linear capacitances may bequantified by using a conversion coefficient, , repre-senting the sensitivity of the oscillation frequency to amplitudevariations of the output voltage [3]–[5]. The phase noise re-sulting from this AM-PM conversion mechanism can be writtenas

(52)

where is the power spectral density of the amplitudenoise at an offset from the carrier. This amplitude noise ismainly due to current flicker noise that is up-converted aroundthe fundamental frequency by the time-varying operating pointof the transistors. The value of the conversion coefficient canbe estimated for both CMOS and bipolar varactors followingthe arguments in [3]–[5]. In both cases the coefficient is propor-tional to the oscillator gain, , where

is the control voltage of the VCO. It turns out that theAM-PM conversion due to varactors is expected to be the dom-inant for large VCO gains. Fig. 19 shows a Van der Pol VCOusing diode varactors to tune the frequency. The capaci-tors are adopted in order to remove another phase noisegeneration mechanism, i.e., the common mode voltage to phasemodulation effect (CM-PM, see [5]). The VCO gain is changedby varying the voltage . For a fair comparison the os-cillation frequency is always kept at 2 GHz. Fig. 20 shows thesimulated phase noise at 1-kHz offset for two different valuesof VCO gain as a function of the excess gain. The up-convertedflicker noise is now determined by both AM-PM conversion dueto varactors and harmonic content modulation. The former con-tribution is dominant for small values of and large oscil-lator gains, and it decreases for high excess gain since ampli-tude noise is reduced. Moreover, the presence of non-linear ca-pacitances in the tank slightly increases the voltage harmonicdistortion causing a small increment of phase noise alsofor large excess gains (see Fig. 20). However, while the varactorcontribution may be reduced by minimizing the varactor sensi-tivity ( ) and using a bank of digitally switched capacitorsnot to impair the tuning range, the contribution arising from thetransconductor non-linearity is unavoidable since it is intrinsi-cally related to the non-linear nature of oscillators.

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Fig. 19. Van der Pol VCO with variable capacitors.

Fig. 20. Phase noise at 1-kHz offset for two different values of the oscillatorgain ( ) as function of the excess gain.

VII. CONCLUSIONS

In this work, the up-conversion of flicker noise due tovoltage harmonic content variation in Van der Pol oscillator hasbeen discussed and quantitatively assessed. The phase noiseup-conversion mechanism has been quantified and linked to theoscillator non-linearity. Design equations have been derivedand compared to simulation results adopting a stationary-basedflicker noise model.

APPENDIX A

The appendix describes the simulation method implementedin a Cadence environment to compute the ISF of a current noisesource. The traditional approach adopts transient simulationsand follows the ISF definition as introduced by Hajimiri et al.[26]. A short current pulse, with amplitude small enough to justperturb the oscillation steady-state, is applied at the nodes wherethe current noise source is injecting its noise. When the initialtransient is over, the variation of the oscillation phase is read.Repeating the procedure by changing the pulse injection timeover the oscillation period, the periodic ISF is computed. De-spite its simplicity, this procedure is time-consuming. In addi-tion, since the injected charge has to be small, the results maybe affected by numerical noise. The alternative adopted in thiswork is to derive the ISF by using PAC (periodic AC analysis)or PXF (periodic transfer function) SpectreRF simulations.

Let us consider the ISF to be evaluated

(53)

where and are the magnitude and the phase ofthe -th harmonic term, respectively. Let us also write theoutput voltage component at the fundamental frequency as

. In this frame, a small currenttone at an offset around the -th harmonic of the outputvoltage, , causes a phase modulation at

of the output voltage at the fundamental frequency. In fact,the corresponding output phase results

(54)

Note that only the -th harmonic term of the ISF contributesto determine the output phase . Thus, the output voltage atthe fundamental frequency, ,shows two correlated terms at , that is

(55)

The magnitude and the phase of the resulting voltage tone atare

(56)

These equations pose the basis of the numerical methodology toderive the ISF function by PAC analysis. A current tone at 1-kHzoffset from the -th harmonic of the oscillation frequency is in-jected at the nodes of interest. PAC simulation is performed andand can be easily derived from the resulting magnitude

and phase of the output voltage at using (56). In theabove mentioned equations is the phase of the output voltageand can be estimated through a PSS (Periodic Steady State) sim-ulation, while C is the total tank capacitance. Finally, note thatthe PAC analysis is a linear time-variant analysis. Thus, a cur-rent tone of 1 A can be injected without altering the oscillatorbehavior but simplifying the evaluation of and . Usu-ally, in a LC tank oscillator, the evaluation of the first 5-6 termsof the ISF is enough to get a good accuracy of the phase noiseestimate.

APPENDIX B

This appendix describes the mathematical derivation of theexcess phase, , for a third order Van der Pol oscillator. Let ussuppose that the oscillator is unperturbed and the output voltage

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is as in (31). Balancing both the in-phase and in-quadrature cur-rents of the resonant tank and of the transconductor at the fun-damental frequency, we get

(57)

being the amplitude of the third harmonic voltage that canbe evaluated balancing the current at

(58)

It results

(59)

Note that (59) is a refinement of (36). Now, let us perturb the os-cillator with a current tone and suppose thatit perturbs only the first harmonic amplitude (and conse-quently ) but not the phase, as discussed in Section V. Thesolution of the system for the first harmonic would be

as in (45). Balancing again in-phase andin-quadrature currents at the fundamental frequency and takinginto account (59), it results

(60)Since we are dealing with a small current tone, it is possible tolinearize (60) deriving

(61)Removing from (61) the unperturbed part given by (57), it turnsout

(62)

Finally, from (62) the expression for and can be derivedas in (46) and (47).

ACKNOWLEDGMENT

The authors would like to thank S. Levantino and P. Maffez-zoni for fruitful discussions.

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Andrea Bonfanti (M’09), was born in Besana Bri-anza (Milan), Italy, in 1972. He received the Laureadegree in electrical engineering and the Ph.D. degreein electronics and communications from the Politec-nico di Milano, Italy, in 1999 and 2003, respectively.During his Ph.D. program, he studied the up-conver-sion of flicker noise into phase noise in bipolar andCMOS LC-tuned oscillator.From 2003 to 2008 he was a Postdoctoral Re-

searcher at the Politecnico di Milano involved inthe study and design of fully-integrated oscillators,

RF frequency synthesizers, - A-D converters and low-power analog andmixed-signal circuits for neural signal processing. During this period he was aconsultant for ST-Microelectronics (Agrate Brianza, Italy), Accent (Vimercate,Italy), and CEFRIEL (Center of Excellence for Research, Innovation and In-dustrial Labs Partnership, Milano, Italy). From 2008 to 2009 he had a post-docposition at Italian Institute of Technology (IIT, Genova, Italy) where he wasinvolved in the design of integrated circuits for neural signals acquisition in theframework of the Brain Machine Interface Project. Currently, he is an AssistantProfessor in the Department of Electronics Engineering, Politecnico di Milano.He is coauthor of approximately 30 papers published in journals or presentedto international conferences.

Federico Pepe (S’11) was born in Avellino, Italy, in1985. He received the M.S. degree in electrical en-gineering from Politecnico di Milano, Italy, in 2010.His masters research was focused on the investiga-tion of the up-conversion of flicker noise in LC-tunedoscillators and on the design of a 3–4 GHz 65-nmCMOS technology VCO with reduced phasenoise. He is currently working toward the Ph.D. de-gree at the Politecnico di Milano, Italy.In 2010 he worked as an Analog Designer with Pe-

gasus Microdesign, Arcore, Italy, involved in the de-sign of LDOs and DC-DC converters for low-power applications.

Carlo Samori (M’98-SM’08) was born in 1966. Hereceived the Laurea degree in electrical engineering,and the Ph.D degree in electronics and communica-tions at the Politecnico di Milano, Italy, in 1992 and1995, respectively.In 1996 he was appointed Assistant Professor and

since 2002 he has been an Associate Professor ofElectronics at the Politecnico di Milano. Initially heworked on high-speed low-noise front-end circuitsfor photodetectors. Then he started to research inthe area of design and analysis of integrated circuits

for communications both in bipolar and in CMOS technology. Among hisworks, he contributed to a time-variant theory of phase noise generation inLC-tuned VCO, he collaborated to the design of several low phase noiseVCO in bipolar and CMOS technology, in the 1–12 GHz range. Concerningfrequency synthesizers he has contributed to the design of fractional- andinteger-N PLLs for multistandard WLAN applications. Since 1997 he has beena consultant for Bell Labs, Murray Hill, NJ, where he contributed to the designof an IF-sampling receiver architecture for GSM standard. He is coauthor of70 papers in international journals and conferences. In 2007 he published, asa coauthor, the book Integrated Frequency Synthesizers for Wireless Systems(Cambridge University Press).

Andrea L. Lacaita (M’89–SM’94–F’09) graduatedin nuclear engineering in 1985.From 1987 to 1992 he was Researcher of the

CNR (Italian National Research Council). Since1992 he has been EE Professor at the Politecnicodi Milano, Italy (Full Professor since 2000). Hehas been Visiting Scientist/Professor at the AT&TBell Laboratories, Murray Hill, NJ (1989–1990) andthe IBM T. J. Watson Research Center, YorktownHeights, NY (1999). From 2006 to 2008 he served asDepartment Chair of the Dipartimento di Elettronica

ad Informazione and as a member of the Academic Senate (2007–2008). Hebegan his research activity on physics and technology of SPADs (Single PhotonAvalanche Diodes) and related electronics. He contributed to the understandingof the ultimate performance and potentials of these detectors, pioneering theirapplications in the near-infrared. He investigated quantum effects in nanoscaleMOSFETs and contributed to the development of characterization techniquesand numerical models of nonvolatile memories, both Flash and emerging(PCM, RRAM). In the field of RF integrated circuit design, he devoted researchactivity to noise optimization of fully integrated VCOs and to designing novelPLL frequency synthesizers for multistandard terminals. Some of the results aredescribed in the book Integrated Frequency Synthesizers for Wireless Systems(Cambridge University Press, 2007). He is a coauthor of more than 250 paperspublished in international journals or presented to international conferences,patents, and several educational books in electronics.Dr. Lacaita has served on several scientific committees, including IEEE

IEDM (2001–2002), IEDM European Chair (2003–2004), IEEE VLSI Sympo-sium (2005–2008), and ESSDERC (2005, 2007 to date).

flicker noise up-conversion due to harmonic distortion in van der

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