final chapter packet-switching and circuit switching

Download Final Chapter  Packet-Switching and Circuit Switching

Post on 04-Jan-2016




1 download

Embed Size (px)


Final Chapter Packet-Switching and Circuit Switching. 7.3. Statistical Multiplexing and Packet Switching: Datagrams and Virtual Circuits 4. 4 Time Division Multiplexing and Circuit Switching. Multiplexing concentrates bursty traffic onto a shared line - PowerPoint PPT Presentation


  • Final Chapter Packet-Switching and Circuit Switching7.3. Statistical Multiplexing and Packet Switching: Datagrams and Virtual Circuits

    4. 4 Time Division Multiplexing and Circuit Switching

  • 5.7.1 Statistical MultiplexingMultiplexing concentrates bursty traffic onto a shared lineinformation flow should include source address and destination addressGreater efficiency and lower cost

  • *Statistical Multiplexing involves the sharing of transmission channels (resource) by several connections A, B, , Z or information flows which will be transmitted (served) on demand (statistically). Thus Significant economies of scale can be achieved Ports A, B, , Z in the multiplexer should provide sufficient number of buffers; information packets will be stored and forward, thus cause delayThe shared channel would be E-carrier (T-carrier) or SDH (SONET)

    Statistical Multiplexing -Asynchronous Time Division MultiplexingShared ChannelStatistical Multiplexing

  • Multiplexer/Demultiplexer inherent in Packet SwitchesPackets/frames forwarded to buffer prior to transmission from switchMultiplexing occurs in these buffersMultiplexerDeMultiplexer

  • Multiplexer ModelingArrivals: What is the packet interarrival pattern?Service Time: How long are the packets?Service Discipline: What is order of transmission?Buffer Discipline: If buffer is full, which packet is dropped?

    Performance Measures: Delay Distribution; Packet Loss Probability; Line Utilization

  • Chapter 7Packet-Switching Networks7.3 Datagrams and Virtual Circuits

  • The Packet Switching FunctionStore and then forward packet by switching it to an appropriate output port according to a routing table. Notice that the routing table could be updated dynamically, depending on the traffic conditionDynamic interconnection of input ports to output portsEnables dynamic sharing of transmission resourceTwo fundamental approaches:ConnectionlessConnection-Oriented: Call setup control, Connection control, Connection release

  • Packet Switching NetworkPacket switching networkTransfers packets between usersTransmission lines + packet switches (routers)Origin in message switchingTwo modes of operation:ConnectionlessVirtual Circuit

  • Packet Switching - DatagramMessages are broken into smaller units (packets)Source & destination addresses included in the packet headerDatagram: Connectionless, where packets are routed independently, no dedicated path for the data transfer phasePackets may arrive out of orderPipelining of packets across network can induce out of order, but increase system throughput

  • Routing Tables in Datagram NetworksRoute determined by table lookupRouting decision involves finding the next hop in the route to the given destinationRouting table has an entry for each destination specifying output port that leads to the next hopSize of table becomes impractical for very large number of destinations

  • Example: Internet RoutingInternet protocol uses datagram packet switching across networksNetworks are treated as data linksHosts have two-port IP address:Network address + Host addressRouters do table lookup on network addressThis reduces size of routing tableIn addition, network addresses are assigned so that they can also be aggregatedDiscussed as 8.2.5 Classless Interdomain Routing (CIDR) in Chapter 8

  • Packet Switching Virtual CircuitCall set-up phase establishes a fixed path along network before the data transfer phaseAll packets for the connection follow the same pathAbbreviated header identifies connection on each linkPackets queue for transmissionVariable bit rates possible, negotiated during call set-upDelays are still variable, but will not be less than circuit switching

  • Connection SetupSignaling messages propagate as route is selectedSignaling messages identify connection and setup tables in switchesTypically a connection is identified by a local tag, Virtual Circuit Identifier (VCI)Each switch only needs to know how to relate an incoming tag in one input to an outgoing tag in the corresponding output Once tables are setup, packets can flow along the path

  • Connection Setup DelayConnection setup delay is incurred before any packet can be transferredDelay is acceptable for sustained transfer of large number of packetsThis delay may be unacceptably high if only a few packets are being transferred

  • Virtual Circuit Forwarding TablesEach input port of packet switch has a forwarding tableLookup entry for VCI of incoming packetDetermine output port (next hop) and insert VCI for next linkVery high speeds are possibleTable can also include priority or other information about how packet should be treated

  • Cut-Through switchingSome networks perform error checking on header only, so packet can be forwarded as soon as the header is received & processedDelays reduced further with cut-through switching

  • Chapter 7Packet-Switching NetworksDatagrams and Virtual CircuitsStructure of a Packet Switch

  • Packet Switch: Intersection where Traffic Flows Meet12N12NInput ports contain multiplexed flows from access muxs & other packet switchesFlows are demultiplexed at input ports, routed and/or forwarded to output portsPackets buffered, prioritized, and multiplexed on output ports

  • Generic Packet Switch Unfolded View of SwitchIngress Line Card (input port)Header processingDemultiplexingRouting in large switches ControllerRouting in small switchesSignalling & resource allocationInterconnection FabricTransfer packets between line cardsEgress Line Card (output port)Scheduling & priorityMultiplexing

  • Line CardsFolded View1 circuit board is ingress/egress line cardPhysical layer processingData link layer processingNetwork header processingPhysical layer across fabric + framing

  • 123N123NSharedMemoryQueueControlIngress ProcessingConnectionControlShared Memory Packet SwitchOutput BufferingSmall switches can be built by reading/writing into shared memory

  • 123N123NInputsOutputs(a) Input buffering383123N123NInputsOutputs(b) Output bufferingCrossbar SwitchesLarge switches built from crossbar & multistage space switchesRequires centralized controller/scheduler (who sends to whom when)Can buffer at input, output, or both (performance vs complexity)

  • Self-Routing SwitchesSelf-routing switches do not require controllerOutput port number determines route101 (1) lower port, (2) upper port, (3) lower port

  • *(a) Each signal transmits 1 unit every 3T seconds(b) Combined signal transmits 1 unit every T secondsTime-Division MultiplexingHigh-speed digital channel like E-carrier and SDH, where the channel is divided into fixed number of time slots and dedicated to some portsFraming required Telephone digital transmissionDigital transmission in backbone network

  • *Circuit SwitchesCircuits consist of dedicated resources in sequence of links & switches across network for data transfer phaseCircuit switch connects input links to output linksNetworkSwitch

  • *Crossbar Space SwitchN x N array of crosspointsConnect an input to an output by closing a crosspointNonblocking (internal blocking) : Any input can connect to idle outputComplexity: N2 crosspoints

  • *Multistage Space SwitchLarge switch is built with multiple stages The n inputs to a first-stage switch share k paths through intermediate crossbar switchesLarger k (more intermediate switches) means more paths to output

  • ******7-9The text boxes are callouts or labels.****************


View more >