fADC125 Status Cody Dickover

Procurement Testing Firmware Future work

Hall D Collaboration June 3rd, 2013

Production Status Currently in Production

• 175 out of 217 received (~80%)• 45 delivered Friday 5/31/2013• Working with QA on manufacturing

issues• Final delivery due 6/14/2013

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB)

Production IssuesFirst articles

• 40 first articles • ~30% failure rate • Main issues related to “mixed”

board

Full Production

• MTEQ hired contractor to aid QA• Down to ~13% failure rate (~70

units)• Weekly conference calls

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB)

Testing Status• 118 units tested (~54%)

• Working RMA’s with MTEQ QA

• Single board tests ongoing

• Full crate testing begun

• Temperature probe

• Noise histogram

• Thanks to Ed J.

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1 3 5 7 9 1113151719212325272931333537394143454749

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fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB)

Slot 2 MEZZ SW Slot 4 MEZZ SW Slot 8 MEZZ SW Slot 10 MEZZ SWSensor Power On Power On Sensor Power On Power On Sensor Power On Power On Sensor Power On Power On

1 47 48.38 1 63 60.63 1 47.5 46.81 1 53.8 49.132 51.7 49.63 2 60.7 59.31 2 50.3 46 2 52.5 49.883 47.8 3 52.7 3 48.7 3 47.54 42.9 4 43.9 4 42.6 4 34.7

Slot 2 MAIN SW Slot 4 MAIN SW Slot 8 MAIN SW Slot 10 MAIN SWSensor Power On Power On Sensor Power On Power On Sensor Power On Power On Sensor Power On Power On

1 54.9 53.38 1 58.4 58.56 1 46 46.94 1 55.2 52.132 50.3 53.81 2 53.8 59.56 2 43 46.88 2 50.8 52.693 45.3 3 49.9 3 41.7 3 454 33.4 4 34.6 4 34.4 4 OL

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB)

Some temperature data• Fan speed 3000 RPM

• Temp Celcius

• Probe location ADCs

Noise Histogram • Sample of 2000 point waveform capture

• 12 bit

• Open input, midscale offset

• RMS for these 3 CH: 0.47, 0.46, 0.51

• Prototype RMS ~0.52

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB)

Firmware development

• Testing_v1 currently in trial w/new interface

• Integrated some new features from test bed

• Clock select, trigger select, unique ID

• 3 boards sent to Naomi J. at CMU for work

on front end algorithms

• New “official release” still in progress

• New driver, thanks to Bryan Moffit

fADC125V2 – 125 MSPS Pipelined Flash ADC (Gerard V, Cody D, FJB)

Future work

• Continue firmware integration, update register maps

• Continue full crate testing, low level DC check

• Data formatting

• Develop infrastructure and eventually algorithms (in collab with CDC/FDC groups) for onboard signal processing

Questions / Comments?