evaluation and driving applications for on-chip networks rajeev balasubramaniam (utah) angelos bilas...
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![Page 1: Evaluation and Driving Applications for On-Chip Networks Rajeev Balasubramaniam (Utah) Angelos Bilas (Crete) Jay Jayasimha (Intel) Rich Oehler (AMD) D](https://reader036.vdocuments.mx/reader036/viewer/2022082713/5697bfc71a28abf838ca7b72/html5/thumbnails/1.jpg)
Evaluation and Driving Applications for On-Chip Networks
Rajeev Balasubramaniam (Utah)Angelos Bilas (Crete)Jay Jayasimha (Intel)Rich Oehler (AMD)
D K Panda (Ohio State)Fabrizio Petrini (Pacific National Labs)
Drew Wingard (Sonics)
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Workloads
Environments: Traditional multi-core, SoC
Apps Running on desktops/laptops: traditional, gaming
HPC: real time simulation, bioinformatics, financial, other traditional apps
Datacenter: TPC, server consolidation
Recognition, Mining, Synthesis
Healthcare: MRI, etc.
Embedded (SoC-type): handheld games, medical
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Architectural Characterization Access patterns: memory, I/O, streaming
sharing: read/write, read only, etc.
Synchronization: fine/coarse grain, collective
QoS, need for real time guarantees, performance isolation, isolation for security
Programming models Mixed mode (msg passing + coherence/shared
memory)
programming issues with new memory hierarchies being exposed to programmer
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Network Requirements
Support granularity of data transfers
synchronization (multicast, etc.) and collective operations
Partitioning: QoS (virtual channels, partitioning), performance isolation, isolation for security
Network interfaces for different protocols
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Evaluation Metrics
latency, b/w under different traffic classes
power / energy thermal constrained?
area, constrained
real time deadlines, QoS (esp for SoC)
standardization of metrics
Monitoring/counters under constraints
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Research Issues
New programming models
performance aware constructs and annotations Limits to scalability of coherence protocols (enhanced
support for barriers, multicast)
Network support for classes of traffic
New types of network services
isolation, security, partitioning, error recovery, power-aware decisions, reconfiguration, ...
Models for RT guarantees (for SoC)
Architectural benchmark suites & characterization
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Tools/Methodolgy
Tools and methodology modeling
simulation: trace, execution, full-system simulation
emulation
prototyping