A discharge can occur when an electrically charged object including a human body touches an electronic device. This phenomenon called ESD (Electrostatic discharge) causes malfunction and failures of electronic devices. EMIStream ESD Rule Check Feature will detect areas where ESD tolerance levels are low on a PCB and offer suggestions for solutions.

■Signal Trace Check Group

■Component Placement Validity Check Group

Check rules and threshold values are based on real world cases from companies around the globe and verified through research at NEC lab

Detect possible ESD problems at an early design stage decreasing time spent on evaluation process

Import CAD layout data, simple set up, and you are ready to run ESD Rule Check

Instantaneously points out ESD causing factors and enables you to take immediate actions to solve the problems

ESD Rule Check Feature

■ Based on ESD expertise and knowledge of leading companies and research institutes worldwide, NEC lab has verified the effectiveness of ESD rules. The following is an example of one of the findings: By comparing different conditions such as power/ground plane slit size below the signal trace, distance between power/ground planes, and whether or not guard trace exists, it was determined that the noise increases if there is a trace crossing over a slit on the plane edge.

ESD Rule Check Feature includes Signal Trace, Component Placement Validity, and FG Pattern Check Groups consisting of total 10 key check rules.

EMIStream ESD Rule Check (Option)

■FG Pattern Check Group

Signal trace over the slit of the ground/power plane

Reset Line

Traces Near Plane Edge Traces crossing over power and ground plane Signal trace over the slit of the ground/power plane SG Trace SG Via Spacing Power Protection

Input Pin Protection Power Pin Protection Reset Line

FG Pattern