emerging nanotechnology devices

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Emerging Nanotechnology Devices

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Outline

Introduction

Nano Scale MOSFET

Carbon Nanotube FETs

Solid State Quantum Devices

Molecular Electronics

Challenges and the Current State of the Art

Conclusion

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Introduction

Feature size nearing the physical limits

Fabrication process approaching limits

Power consumption – a concern

Quantum effects need to be accounted for

Solution? Nanotechnology

We present an overview of new devices and outline some open problems.

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What is Nanotechnology?Switching devices of nanometer (below 100nm, typically 10nm) dimensions define nanotechnology.

DNA strands as Bits

Molecular orientations as Bits

CNFETsSETs

Self assembled CNT using DNA

Quantum Dots

CNT arrays

DNA self assembly

Logic

(Our Focus)

Memory

Fabrication

RTDMolecular Nano CMOS

Molecules in Solution

Emerging Nanotechnology Drivers

Emerging Nanotechnology Solutions

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Computing Devices

CMOS Devices

Solid State Devices Molecular Devices

Nano CMOS

Quantum Dot

RTD

Quantum Devices

CNFET SET

Electro-

mechanicalPhotoactiveQuantum

Electro-

chemical

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Nano-Scale MOSFET

Metal Oxide Semiconductor Field Effect TransistorThree terminal deviceSource, gate and drainVg controls the conduction from source to drainHalf thickness of the gate is called “Feature size λ”Current feature sizes in production – 90nm (Intel Pentium 5)Demonstrated feature sizes up to 20nm (IBM).

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Challenges

DifficultiesHigh electric fieldsPower supply vs. threshold voltageHeat dissipationInterconnect delaysVanishing bulk propertiesShrinkage of gate oxide layerToo many problems to continue miniaturization as physical limits approachProposed solutions are short term

Open ProblemsImprove lithographic precision (eBeam)Explore new materials (GaAs, SiGe, etc.)As a long term goal explore new devices

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Outline

Introduction

Nano scale MOSFET




Challenges and current state of the art

Conclusions

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Carbon Nanotubes

Carbon nanotubes are long meshed wires of carbonLongest tubes up to 1mm long and few nanometers thick made by IBM.

Property Carbon Nanotubes Comparatively

Size 0.6-1.8 nm in diameter Si wires at least 50nm thick

Strength 45 Billion Pascals Steel alloys have 2 Billion P.

Resilience Bent and straightened without damage Metals fracture when bent and restraightened

Conductivity Estimated at 109 A/cm2 Cu wires burn at 106 A/cm2

Cost $2500/gram by BuckyUSA in Houston Gold is $15/gram

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Electrical Properties of CNT

Carbon nanotubes can be metallic or semiconductor depending on their chirality.Chiral Vector C is defined as the vector from one open end of the tube to the other after it is rolled.If (n-m) is divisible by 3, the tube is metallicIf (n-m) is not divisible by 3, the tube is semiconducting.

C = n a1 + m a2

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Carbon Nanotube FET

CNT can be used as the conducting channel of a MOSFET.These new devices are very similar to the CMOS FETs.All CNFETs are pFETs by nature.nFETs can be made through

Annealing Doping

Very low current and power consumptionAlthough tubes are 3nm thick CNFETs are still the size of the contacts, about 20nm.

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CNT Fabrication

Controlling the conductivity of the tubes (Constructive Destruction)

All tubes laid on the contactMetallic tubes are destroyed

Controlling diameter of the tubeStart with MWNTs.Destroy the outer layers one by one to reduce diameter.

Placing exactly at the required location. Yet to be demonstrated convincingly to exploit complete advantage using Lithography.Using DNA for self assembly

Demonstrated by Techion-Israel very recently (Nov’2003).

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Summary and ChallengesCNTs are flexible tubes that can be made conducting or semiconducting.Nano-scale, strong and flexible.Challenges:

Multilevel interconnects not availableChip density still limited to the density of contacts.Tube density not entirely exploitedFabrication is still a stochastic processAlternatives to gold contacts need to be found.

Open Problems and Initiatives:Fabrication using DNA for self assembly (Technion-Israel; Science, Nov 2003)Memory array of nanotubes using junctions as bit storages (Lieber at Harvard)Using nanotube arrays to make computing elements (DeHon at Caltech)Fabricate FPGAs using CNFETs and STM (Avouris at IBM)

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Outline

Introduction

Nano scale MOSFET





Conclusions

177 Jan 2004 17th Int'l Conference on VLSI Design


Quantum effects used to build devices.Electrons confined on an island

Island can be created by using different band-gap devices in successionIsland has certain allowed energy levelsIf allowed energy levels are filled then the device is in conduction

Types of devicesResonant Tunneling Diode (RTD)Single Electron Transistor (SET)Quantum Dot (QD)

Blocking conduction due to unavailable energy levels is called coulomb blockade

En

erg

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Occupied Energy Levels

Occupied Energy Levels

Allowed Energy Levels

Source Island Drain

Bar

rier

Distance

Bar

rier


Principle of Conduction

Conduction can occur byIncreasing source to drain voltage

Applying Gate Bias


Source Island Drain

En

erg

y

Occupied Conduction

Band


Source Island Drain

En

erg

y

Occupied Conduction

BandGate bias

Occupied Conduction

Band

Conduction Conduction


Single Electron Transistors (SET)

Conductance changes in spurts as energy levels are discreteTo go from conducting to non-conducting stage, it requires voltage sufficient for one electron to cross

This is achieved by applying gate bias enough for just one electron charge -- hence the name SETBias required for conduction is coulomb gap voltage

Same device can act as pFET or nFET based on the barrier strengthApplications:

Extra sensitive charge metersCMOS style conducting devices

Drain

Source

GateCg

Island


Quantum Dots and Arrays

3-dimensional island tunneling barrierState determined by presence of electron and not by conduction.Quantum cell array (QCA) is a lattice of these cells with 2 electrons confined.Occupied electrons are furthest from each other due to repulsive forces.

Courtesy: vortex.tn.tudelft.nl/ grkouwen/kouwen.html

Inter-dot Barriers

Outer Barriers

Dot occupied by Electron

Dot unoccupied

http://vortex.tn.tudelft.nl/grkouwen/kouwen.html

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Quantum Cellular Automata

2 states – “1” and “0”.Electrostatic interaction of nearby cells makes the bits flip.Input to the cell is by manipulating the Inter-dot barriers.Logic gates can be constructed.

“1” “0”

1 1

QCA Wire

1 0

QCA Inverter

Stable

Unstable


Summary and ChallengesSummary

Electrons confined on an island.Allowed energy levels are discrete and allow the device to fluctuate between conducting and non-conducting states.SET – 2 dimensional device with gate bias control.QD – device with electron presence as state.QCA – Arrays of QDs used for computing.

ChallengesBackground charge may offset states (noise sensitivity)Sensitivity of tunneling current to barrier width (lithographic accuracy)Sensitivity to barrier widthsCryogenic operation

Open ProblemsLithographic methods with guaranteed accuracySelf assembly of systemsBackground charge eliminationSynthesis and verification techniques neededTesting of these devices as stuck-at models may be inadequate.


Outline

Introduction

Nano scale MOSFET





Conclusions



IncentivesMolecules are nano-scaleSelf assembly is achievableVery low-power operationHighly uniform devices

Quantum Effect DevicesBuilding quantum wells using molecules

Electromechanical DevicesUsing mechanical switching of atoms or molecules

Electrochemical DevicesChemical interactions to change shape or orientation

Photoactive DevicesLight frequency changes shape and orientation.



Mechanical synthesisMolecules aligned using a scanning tunneling microscope (STM)Fabrication done molecule by molecule using STM

Chemical synthesisMolecules aligned in place by chemical interactionsSelf assemblyParallel fabrication

Benzene ring

Acetylene linkageThiol


An Atomic Relay


Summary and ChallengesSummary

Parallel self assemblyVery regular structuresMany alternatives proposed but inherent problemsVery low energy operation

ChallengesSignal restoration and gainFinding non-interacting chemicalsChemical reactions stochastic with by-productsSlow operating speeds

Open ProblemsSelf assembling of devicesIncreased speed of operationGuaranteed switching of molecules (HP- UCLA devices)Simulation models and CAD


Conclusion

CMOS technology is approaching saturation – problems in the nanometer range

Several new possibilities emerging Carbon nanotubes (CNT) Single-electron transistor (SET) and

quantum dots (QD) Molecular computing devices

emerging nanotechnology devices

Documents

nm ibm

current state

nm thickstrength45

nm dimensions

nm thick cnfets

nm intel pentium

overview of new devices

contactmetallic tubes