eda playground

EDA Playground DocumentationRelease

Doulos

April 10, 2015

Contents

1 Table of Contents: 31.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31.2 Quick Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71.3 Settings & Buttons . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91.4 Yosys Circuit Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 181.5 Tutorials and Code Examples . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 201.6 FAQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 261.7 Privacy Policy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27

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EDA Playground Documentation, Release

EDA Playground on YouTube - Tutorials for Verilog, SystemVerilog, UVM, and VHDL, interview questions, newsand features, etc.

EDA Playground web application located at http://www.edaplayground.com/EPWave documentation located at http://epwave.readthedocs.org

Contents 1

EDA Playground Documentation, Release

2 Contents

CHAPTER 1

Table of Contents:

1.1 Introduction

EDA Playground on YouTube - Tutorials for Verilog, SystemVerilog, UVM, and VHDL, interview questions, newsand features, etc.

1.1.1 Overview

EDA Playground gives engineers immediate hands-on exposure to simulating SystemVerilog, Verilog, VHDL,C++/SystemC, and other HDLs. All you need is a web browser. The goal is to accelerate learning of design/testbenchdevelopment with easier code sharing, and with simpler access to EDA tools and libraries. EDA Playground is specif-ically designed for small prototypes and examples.

With a simple click, run your code and see console output in real time. Pick another simulator version and runit again.

View waves for your simulation using EPWave browser-based wave viewer.

Save your code snippets. Share your code and simulation results with a web link. Perfect for web forumdiscussions or emails. Great for asking questions or sharing your knowledge.

Quickly try something out

Try out a SystemVerilog feature before using it on your project.

Try out a library that youre thinking of using.

Modify another engineers shared code and re-run it.

Eliminate environment differences. Since the code always executes in the same environment, everyone will seethe same result on a subsequent re-run.

Browse and use a large repository of working code examples and templates.

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1.1.2 Example Usecases

Quick prototyping try out syntax or a library/language feature before using it in a large code base.

When asking questions on Stack Overflow or other online forums, attach a link to the code and simulationresults.

Use during technical interviews to test candidates SystemVerilog/Verilog coding and debug skills.

Run anywhere. When away from your work machine, you can still try a quick prototype on EDA Playground.

Try verifying using different verification frameworks: UVM, SVUnit, plain Verilog, or Python.

Create an HDL and Verification Lab for young engineers, with the code hosted on EDA Playground. Studentscan work from home at their own pace, and run the lab samples on EDA Playground.

Quickly check whether your code is synthesizable or emulator-friendly.

1.1.3 Tools & Simulators

For settings and options documentation, see Tools & Simulators Options

Available tools and simulators are below. EDA Playground can support many different tools. Contact us to add yourEDA tool to EDA Playground.

Simulators

Riviera-PRO

Commercial simulator that supports ALL SystemVerilog and VHDL features. Supports PSL.

riviera-pro

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Riviera-PRO Product Manual (registration required)

Icarus Verilog

Version 0.10.0 (devel) supports several SystemVerilog features.

GPL Cver

VeriWell

Compilers and Interpreters

C++

Perl

Python

Csh (C Shell)

Synthesis Tools

NOTE: The synthesis tools will only process code in the right Design pane. The code in the left Testbench pane willbe ignored.

Yosys

Yosys on GitHub

The Verilog-to-Routing (VTR) Project

On private EDA Playground

EDA Playground may be deployed on a private company/university network. For such a private deployment, anyadditional simulators/tools may be added. The company/university must have licenses for the commercial tools to beadded.

1.1.4 Libraries & Methodologies

For settings and options documentation, see Languages & Libraries Options

Available libraries and methodologies:

SystemVerilog and Verilog

UVM - Universal Verification Methodology

UVM 1.2 Class Reference

* Whats New in UVM 1.2 on YouTube

UVM 1.1d Class Reference

OVM - Open Verification Methodology

OVM 2.1.2 Class Reference

OVM 2.1.2 User Guide

1.1. Introduction 5

EDA Playground Documentation, Release

SVUnit - unit testing framework for Verilog/SystemVerilog modules, classes, etc.

SVUnit on SourceForge

OVL - Open Verification Library

OVL Library Reference Manual

OVL Quick Reference

ClueLib - A generic class library in SystemVerilog

ClueLib API Documentation

svlib - A Programmers Utility Library for SystemVerilog

svlib User Guide

VHDL

OVL - Open Verification Library

OVL Library Reference Manual

OVL Quick Reference

PSL - Property Specification Language

Natively supported by Riviera-PRO

OSVVM - Open Source VHDL Verification Methodology

C++

SystemC - system level design and simulation in C++

SystemC 2.3.1 Class Reference

TLM 2.0 Class Reference

Python

MyHDL - a Python based hardware description language (HDL)

MyHDL Manual

MyHDL on Bitbucket

Migen - a Python toolbox for building complex digital hardware

Migen on GitHub

Migen from M-Labs

cocotb - a coroutine based cosimulation library for writing VHDL and Verilog testbenches in Python

cocotb on GitHub

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EDA Playground Documentation, Release

1.1.5 What Users are Saying

This is a really useful web-based utility for anyone who is discussing/sharing/debugging a code segmentwith a colleague or a support person. Also, a very useful follow-up tool for post-training help amongstudents or between instructor and students. Simple, easy, useful.

Hemendra Talesara, Verification Technologist at Synapse Design Automation Inc.

I think EDA Playground is awesome! Great resource to learn without the hassle of setting up tools!

Alan Langman, Engineering Consultant

Ive used it a few times now to just check out some issues related to SV syntax and its been a bigtimesaver!

Eric White, MTS Design Engineer at AMD

EDA Playground is sooo useful for interviews. I got a lot more feedback from being able to watchsomeone compile and debug errors. I would highly recommend others to use it if they are asking SVrelated questions.

Ricardo Goto, Verification Engineer

I have recommended to use EDAPlayground.com to my team and am also trying to use it more for mydebug. I find EDAPlayground.com is much easier than logging into my Unix machines.

Subhash Bhogadi, Verification Consultant

I just wanted to thank you a lot for creating EDA Playground. Ive been using it a lot lately together withStackOverflow and it makes asking and answering questions much easier.

Tudor Timisescu, System Verification Engineer at Infineon Technologies

1.1.6 Support, Feature Requests and Bug Fixes

Support available on EDA Playground forumOr open a bug here: https://github.com/edaplayground/eda-playground/issues (requires GitHub account).

1.1.7 News and Site Updates

New features are frequently being added to EDA Playground. Follow the updates on your favorite social media site:

@EDAPlayground on Twitter

EDA Playground on Facebook

EDA Playground on Google+

1.1.8 Credits

EDA Playground was created by Doulos.

1.2 Quick Start

This Quick Start is intended for users of http://www.edaplayground.com.

1. In a separate web browser window, log in to EDA Playground at: http://www.edaplayground.com

1.2. Quick Start 7

EDA Playground Documentation, Release

2. In either the Design or Testbench window pane, type in the following code:

module test;initial

$display("Hello World!");endmodule

(Note: The code in the right Design pane is compiled first, followed by code in the left Testbench pane.)

3. Click

Yes, running a sim is as simple as that!

4. In the bottom pane, you should see real-time results as your code is being compiled and then run. A run typicallytakes 1-5 seconds, depending on network traffic and simulator. Near the bottom of result output, you should see:

Hello World!

5. Now, lets save our good work. Type in a descriptive name in the Details area on the left.

and click

6. The browser page will reload and the browser address bar will change. This is a persistent link to your savedcode. You can send the link by email, post it on a web page, post it on Stack Overflow forums, etc. Here is whatthe link looks like for one users