dr. thomas kuhn, fraunhofer institute iese · dr. thomas kuhn department head embedded software...
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Virtual Engineering
Virtual Engineering
Dr. Thomas Kuhn, Fraunhofer Institute IESE
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What is Virtual Engineering?
Rapid development of prototypes at necessary level of abstraction
Evaluating impact of architecture decisions
Supporting decisions with facts
Virtual EngineeringAbout
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Two Examples
CPURAMROM
Communication bus
CPU CPUDSP FPGA
Deployment Decisions Ecosystem Development
Virtual EngineeringExamples
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Deployment of Functions
Functionally Independent
No explicitly shared resources
Easy to deploy to multicore platform?
CPURAMROM
Communication bus
DSP FPGA
Virtual EngineeringDeployment
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Virtual EngineeringDeployment
Deployment of Functions
Functionally Independent
No explicit resource conflicts
Possible implicit resource conflicts
Instruction fectching
I/O Operations & Memory access
Use of cache memory
Task scheduling on shared CPU
CPURAMROM
Communication bus
DSP FPGA
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Virtual EngineeringDeployment
Evaluation of Deployment Decisions
Allocation and deployment of tasks
Influenced by data dependencies
Required Hardware and Interfaces
Scheduling decisions
Tasks share CPU, Ram, Network, Interrupts
Sharing affects task starting times
Variants in Delay yields Jitter
Impact on algorithm behavior
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Evaluation of Software Architectures
Evolution of software architectures
Portability to new platforms
Many core CPUs
Architectures for highly integrated systems
Multi-layered architectures (operations vs. strategy)
Use of consumer platforms
Safe communication
Software lockstep
Virtual EngineeringDeployment
RA
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Functional integration through simulator coupling
Holistic simulation of across tools
Integration of functional behavior on different levels of abstraction (UML, Python, Simulink, Java, C++, C)
Black box components ensure confidentiality of algorithms and simulation models
Virtual deployments to CPU resembles platform scheduling
Enables evaluation of scheduling effects, inter process communication, jitter, data consistency
Virtual Engineering TechnologyEvaluation of Deployments
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Integration of virtual platforms
Platform Simulation: Evaluation of Implicit resource conflicts
Instruction fectching
I/O Operations & Memory access
Use of cache memory
Virtual Engineering TechnologyEvaluation of Deployments
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Virtual EngineeringEvaluation of Deployments
Performance impact of deployment decisions
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Virtual EngineeringSmart Ecosystems – Interacting systems open for 3rd party components
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Virtual EngineeringSmart Ecosystems – Interacting systems open for 3rd party components
New infrastructure solutions
Integration of different concepts
Ecosystem Example: Improving Infrastructure in rural areas
Production solutions
Integration production code
Ecosystems
Systems with open interfaces Integration of 3rd party services Individual software components Guaranteed safe and secure behavior
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Ecosystem Example: Cross Energy Management System
Specification of Interfaces with FERAL
Checking of interface compliance
Implementation of behavior
Integration of abstraction levels
UML (Scenarios / Behavior)
C/C++
Code from different sources
Early integration and evaluation
Virtual EngineeringSmart Ecosystems – Interacting systems open for 3rd party components
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Ecosystem Example: Cross Energy Management System
Interacting systemsOpen for 3rd party components
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Integration of target platform code 795
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Virtual EngineeringSmart Ecosystems – Integrating C code
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Ideal Wire
Simulink
FMU
Java
State Machines
Activities
Sequences
C
C++
SystemC
Multicore
SinglecoreMPI Clusters
Soft Real Time
Point ToPoint
TT Ethernet
GPRS/UMTS
WiMax
Event Triggered
DiscreteTime
Agent Scheduler
ContinuousTime
Finite State Machines
Service Domain
CAN
Ethernet
Wireless LAN
Bluetooth
Flexray
RS 232
RS 485Ideal
Wireless
Ideal Bus
Dataflow
Groovy
Java Script
Semantic Models Host Platforms
Windows
Linux
8 Core Processor
3 Core Aurix
Tile 64 Processor
4 Core Processor
2 Core Processor
1 Core Processor
Simulated abstract platforms
X86
ARM
Simulated platforms
Behavior models
Insertion Sequencing
DelayCorruptionLoss
Failure modes Network simulation models
Masquerading
LTE
Virtual Engineering TechnologySelection of FERAL Simulation Components
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Ideal Wire
Simulink
FMU
Java
State Machines
Activities
Sequences
C
C++
SystemC
Multicore
SinglecoreMPI Clusters
Soft Real Time
Point ToPoint
TT Ethernet
GPRS/UMTS
WiMax
Event Triggered
DiscreteTime
Agent Scheduler
ContinuousTime
Finite State Machines
Service Domain
CAN
Ethernet
Wireless LAN
Bluetooth
Flexray
RS 232
RS 485Ideal
Wireless
Ideal Bus
Dataflow
Groovy
Java Script
Semantic Models Host Platforms
Windows
Linux
8 Core Processor
3 Core Aurix
Tile 64 Processor
4 Core Processor
2 Core Processor
1 Core Processor
Simulated abstract platforms
X86
ARM
Simulated platforms
Behavior models
Insertion Sequencing
DelayCorruptionLoss
Failure modes Network simulation models
Masquerading
LTE
Contact Information
Dr. Thomas Kuhn
Department Head Embedded Software Engineering
Email: [email protected]
Phone: +49 631 6800 2177