Semiconductor Fabrication

Md. Mahabub Hossain

Oxidation

Lithography & Etching

Ion Implantation

Annealing & Diffusion

Introduction

Silicon Growth & Wafer

Quartz, or silica, consists of silicon dioxide

Sand contains many tiny grains of quartz

Silicon can be artificially produced by combining silica and carbon in electric furnace

Gives polycrystalline silicon (multitude of crystals)

Practical integrated circuits can only be fabricated from single-crystal material

Silicon Crystal & Growth

Growth A solid seed crystal is rotated and

slowly extracted from a pool of molten Si.

Requires careful control to give crystals desired purity and dimensions.

Czochralski process is a technique in making single-crystal silicon.

Wafer Manufacturing The silicon crystal is sliced in ingot by using a diamond-tipped saw into thin wafers

Sorted by thickness

Damaged wafers removed during lapping

Etch wafers in chemical to remove any remaining crystal damage

Polishing smoothes uneven surface left by sawing process

Oxidation of Silicon SiO2 growth is a key process step in manufacturing all Si devices - Thick (~1m) oxides are used for field

oxides (isolate devices from one another ) - Thin gate oxides (~100 ) control MOS

devices - Sacrificial layers are grown and removed to

clean up surfaces The stability and ease of SiO2 formation is one of the reasons that Si replaces Ge as the semiconductor of choice.

The simplest method of producing an oxide layer consists of heating a silicon wafer in an oxidizing atmosphere.

Dry oxide - Pure dry oxygen is employed

Si + O2 SiO2

Disadvantage

- Dry oxide grows very slowly.

Advantage

- Oxide layers are very uniform.

- Relatively few defects exist at the oxide-silicon interface.

- It has especially low surface state charges and thus make ideal dielectrics.

Wet oxide - Same way as dry oxides, but steam is injected

Si +2H2O SiO2 + 2H2 Disadvantage

-Hydrogen atoms liberated by the decomposition of the water molecules produce imperfections that may degrade the oxide quality.

Advantage

-Wet oxide grows fast.

-Useful to grow a thick layer of field oxide.

Oxidation of Silicon

Si Wafers

O2 N2H2O or TCE(trichloroethylene)

Quartz tube

Resistance-heated furnace

Flowcontroller

Oxidation of Silicon

Estimation

(a) How long does it take to grow 0.1m of dry oxide at 1000 oC ?

(b) How long will it take to grow 0.2m of oxide at 900oC in a wet ambient ?

Solution:

(a) From the 1000oC dry curve, it takes 2.5 hr to grow 0.1m of oxide.

(b) Use the 900oC wet curve only. It would have taken 0.7hr to grow the 0.1 m oxide and 2.4hr to grow 0.3 m oxide from bare silicon. The answer is 2.4hr0.7hr = 1.7hr.

Photolithography Patterning Photolithography is a technique that is used to define the shape of micro-machined structures on a wafer.

Pattern process:

The first step in the photolithography process is to develop a mask, which will be typically be a chromium pattern on a glass plate.

Next, the wafer is then coated with a polymer which is sensitive to ultraviolet light called a photoresist.

Afterward, the photoresist is then developed which transfers the pattern on the mask to the photoresist layer.

Photolithography Photoresist Two basic types of Photoresists i) Positive resist & ii) Negative resist

Positive resists. Exposure to the UV light changes chemical structure of resist so that it becomes more soluble in developer. The exposed resist is then washed away by the developer solution. The mask, therefore, contains an exact copy of the pattern which is to remain on the wafer.

Negative resists Exposure to the UV light causes negative resist to become polymerized, and more difficult to dissolve. it remains on the surface wherever it is exposed the developer solution removes only the unexposed portions.

Masks used for negative photoresists, therefore, contain the inverse (or photographic "negative") of the pattern to be transferred.

Etching Etching is the process where unwanted areas of films are removed by either dissolving them in a wet chemical solution (Wet Etching) or by reacting them with gases in a plasma to form volatile products (Dry Etching). - Resist protects areas which are to remain. In some cases a hard mask, usually patterned layers of SiO2 or Si3N4, are used when the etch selectivity to photoresist is low or the etching environment causes resist to delaminate. Terminology Isotropic etch - a process that etches at the same rate in all directions. Anisotropic etch - a process that etches only one direction.

SiO2

SiO2

SiO2

(1)

(2)

(3)

photoresist

photoresist

SiO2

(1)

(2)

photoresist

photoresist

SiO2

SiO2

(3)

(a) Isotropic wet etching (b) Anisotropic dry etching.

Isotropic etching Anisotropic etching

Etching Wet Etching

- are in general isotropic

(not used to etch features less than 3 m)

- achieve high selectivity for most film combinations

- capable of high throughputs

- use comparably cheap equipment

- can have resist adhesion problems

- can etch just about anything

Examples wet process:

For SiO2 etching

- HF + NH4F (1:7)(buffered oxide etch or BOE)

For Si3N4 - Hot phosphoric acid: H3PO4 at 160-180 C

- need to use oxide hard mask

Silicon

- Nitric, HF, acetic acids

- HNO3 + HF + CH3COOH + H2O

Aluminum

- Acetic, nitric, phosphoric (16:4:80) acids at 35-45 C

- CH3COOH+HNO3+H3PO4

Etching Dry Etching - also known as Plasma Etching, or

Reactive-Ion Etching, is anisotropic.

- Plasma

is a partially ionized gas made up of equal parts positively and negatively charged particles.

are generated by flowing gases through an electric or magnetic field.

- Reactive Ion Etching (RIE)

Directional etching due to ion assistance.

In RIE processes the wafers sit on the powered electrode. This placement sets up a negative bias on the wafer which accelerates positively charge ions toward the surface. These ions enhance the chemical etching mechanisms and allow anisotropic etching.

- Silicon and its compounds can be etched by plasmas containing F.

- Aluminum can be etched by Cl.

SEM image shows 8m deep GaN RIE etch.

Wet etches are simpler, but dry etches provide better line width control since it is anisotropic.

Ion Implantation Doping

The dominant doping method

A particle accelerator is used to accelerate a doping atom so that it can penetrate a silicon crystal to a depth of several microns

Excellent control of dose (cm-2)

Good control of implant depth with energy (KeV to MeV)

Repairing crystal damage and dopant activation requires annealing, which can cause dopant diffusion and loss of depth control.

Dopant ions

Ion Implantation Ion implanter The ion implantation process is conducted in a vacuum chamber at very low pressure (10-4 to 10-5 torr). Large numbers of ions (typically 1016 to 1017 ions/cm2) bombard and penetrate a surface, interacting with the substrate atoms immediately beneath the surface. Typical depth of ion penetration is a fraction of a micron.

Annealing

After ion implantation, lattice damage to the crystal is repaired by heating the wafer at a moderate temperature for a few minutes. This process is called annealing.

Furnace annealing takes minutes and causes too much diffusion of dopants for some applications.

Rapid thermal annealing (RTA), the wafer is heated to high temperature in seconds by a bank of heat lamps.

Diffusion Diffusion is atom movement along concentration gradients.

There are different mechanisms in which an atom moves within the crystal:

a) Interstitial diffusion, atoms jump from one interstitial site to another, which is always available (small atoms, like sodium and lithium).

b)Substitutional/vacancy diffusion, necessitates that empty lattice site is available next to the diffusing atom (antimony and arsenic).

c) Interstitialcy mechanism, the self-interstitial atoms move to the lattice sites, and kick the dopants to the interstitial sites, and from there they move to the lattice sites (boron and phosphorus).

A uniformly doped ingot is sliced into wafers.

An oxide film is then grown on the wafers.

The film is patterned and etched using photolithography exposing specific sections of the silicon.

The wafers are then spun with an opposite polarity doping source adhering only to the exposed areas.

The wafers are then heated in a furnace (800-1250oC) to drive the doping atoms into the silicon.

Diffusion Process

The doping material used can either be solid, liquid or gaseous.

In carrier gas diffusion doping, a carrier gas carries the doping atoms to the silicon wafers which been brought by radiant heat to temperatures of 1000C to 1285C.

Comparison of Diffusion and Ion Implantation

Diffusion

cheaper and more simplistic method,

can only be performed from the surface of the wafers.

dopants also diffuse unevenly, and interact with each other altering the diffusion rate.

Ion implantation

more expensive and complex.

It does not require high temperatures and also allows for greater control of dopant concentration and profile.

anisotropic process and therefore does not spread the dopant implant as much as diffusion.

aids in the manufacture of self-aligned structures which greatly improve the performance of MOS transistors.

Question??

1. Sami Franssila, Introduction to Microfabrication John Wiley & Sons Ltd, 2004.

2. http://www.daviddarling.info/encyclopedia/S/AE_silicon.html

3. Infrastructure -copyright, 1999

4. http://en.wikipedia.org/wiki/Photoresist

5. http://www.n2bio.com/surface-modification-technology/ion-implantation.php

6. http://www.oxford-instruments.com/

7. http://www.tpub.com/neets/book14/57d.htm

References

Thank you for attention