a simple hardware realization of switching table based direct torque control of induction motor

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Electric Power Systems Research 77 (2007) 181–190 A simple hardware realization of switching table based direct torque control of induction motor Bibhu Prasad Panigrahi a,, Dinkar Prasad b , Sabyasachi SenGupta b a Department of Electrical Engineering, Indira Gandhi Institute of Technology, Sarang, Dhenkanal, Orissa 759146, India b Department of Electrical Engineering, Indian Institute of Technology, Kharagpur, West Bengal 721302, India Received 24 December 2005; received in revised form 23 February 2006; accepted 28 February 2006 Available online 17 April 2006 Abstract A simple hardware realization of direct torque control (DTC) scheme for fast control of induction motor torque has been presented. The proposed hardware scheme mimics the conventional switching table based DTC scheme and does not require use of any online fast computing device like microprocessor, PC or DSP. The controller uses only commonly used discrete hardware components. The experimental results of the proposed hardware implementation have been presented and supported with simulation results. Another alternate hardware scheme without using the switching table has also been proposed and the experimental results of both the schemes have been compared and found to be in agreement with each other. © 2006 Elsevier B.V. All rights reserved. Keywords: Direct torque control; Induction motor drive; Inverter based control; DTC switching table; Variable speed drive 1. Introduction Direct torque control (DTC) of induction motors has aroused significant interest among researchers looking for an efficient and high performance ac motor drive [1–11]. Almost all DTC related work reported in literature use relatively costly digital signal processors with fast interfacing units like analog to digi- tal converters, etc. Though the advantages of digital controlled drives in terms of flexibility and user friendliness are quite signif- icant, their increased cost may limit their use to high-end drives where the controller cost may be only a small fraction of the over- all drive cost. Another factor coming in the way of these digital controlled drives is the delay in inputting the analog values of the motor currents and the inverter dc link voltage during the PC (or for that matter DSP) based DTC implementation. This delay is partly due to the inherent delay in the A/D conversion process and partly due to the serial manner in which data is input through a single A/D converter by multiplexing the input line. Overall delay in program execution time severely limits the achievable PWM frequency of the inverter and thus the ripple in motor flux, Tel.: +91 6760 241045; fax: +91 6760 240544. E-mail address: [email protected] (B.P. Panigrahi). current and torque may not be brought down below certain lim- its. To achieve higher PWM switching frequency one may be forced to use higher speed digital processors with multiple A/D converters of faster capability, etc. leading to higher cost. The work presented in this paper investigates hardware alternatives to reduce the overall cost as well as to achieve higher PWM switching frequency. The entire DTC scheme is implemented using low cost commonly available discrete electronic compo- nents. The developed hardware is expected to find application in numerous low and medium power induction motor drives in small-scale industries where consideration of controller cost may be a significant factor in choosing the drive. 2. The principle of direct torque control The popular switching table based DTC scheme uses stored switching information in a three-dimensional look-up table, where the variables are flux and torque errors and the spatial position of the flux vector linking the stator winding [2–11].A typical switching table is reproduced in Table 1. In Table 1, S λ denotes flux-logic. Logic ‘1’ calls for increase in flux magnitude and logic ‘0’ calls for decreasing the magni- tude. S T denotes torque logic. ‘1’, ‘0’ and ‘1’, respectively, call for control action to increase, maintain as it is and to decrease 0378-7796/$ – see front matter © 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.epsr.2006.02.015

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Electric Power Systems Research 77 (2007) 181–190

A simple hardware realization of switching table based directtorque control of induction motor

Bibhu Prasad Panigrahi a,∗, Dinkar Prasad b, Sabyasachi SenGupta b

a Department of Electrical Engineering, Indira Gandhi Institute of Technology, Sarang, Dhenkanal, Orissa 759146, Indiab Department of Electrical Engineering, Indian Institute of Technology, Kharagpur, West Bengal 721302, India

Received 24 December 2005; received in revised form 23 February 2006; accepted 28 February 2006Available online 17 April 2006

bstract

A simple hardware realization of direct torque control (DTC) scheme for fast control of induction motor torque has been presented. Theroposed hardware scheme mimics the conventional switching table based DTC scheme and does not require use of any online fast computingevice like microprocessor, PC or DSP. The controller uses only commonly used discrete hardware components. The experimental results of the

roposed hardware implementation have been presented and supported with simulation results. Another alternate hardware scheme without usinghe switching table has also been proposed and the experimental results of both the schemes have been compared and found to be in agreementith each other.2006 Elsevier B.V. All rights reserved.

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eywords: Direct torque control; Induction motor drive; Inverter based control

. Introduction

Direct torque control (DTC) of induction motors has arousedignificant interest among researchers looking for an efficientnd high performance ac motor drive [1–11]. Almost all DTCelated work reported in literature use relatively costly digitalignal processors with fast interfacing units like analog to digi-al converters, etc. Though the advantages of digital controlledrives in terms of flexibility and user friendliness are quite signif-cant, their increased cost may limit their use to high-end driveshere the controller cost may be only a small fraction of the over-

ll drive cost. Another factor coming in the way of these digitalontrolled drives is the delay in inputting the analog values ofhe motor currents and the inverter dc link voltage during the PCor for that matter DSP) based DTC implementation. This delays partly due to the inherent delay in the A/D conversion processnd partly due to the serial manner in which data is input through

single A/D converter by multiplexing the input line. Overall

elay in program execution time severely limits the achievableWM frequency of the inverter and thus the ripple in motor flux,

∗ Tel.: +91 6760 241045; fax: +91 6760 240544.E-mail address: [email protected] (B.P. Panigrahi).

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378-7796/$ – see front matter © 2006 Elsevier B.V. All rights reserved.oi:10.1016/j.epsr.2006.02.015

switching table; Variable speed drive

urrent and torque may not be brought down below certain lim-ts. To achieve higher PWM switching frequency one may beorced to use higher speed digital processors with multiple A/Donverters of faster capability, etc. leading to higher cost. Theork presented in this paper investigates hardware alternatives

o reduce the overall cost as well as to achieve higher PWMwitching frequency. The entire DTC scheme is implementedsing low cost commonly available discrete electronic compo-ents. The developed hardware is expected to find applicationn numerous low and medium power induction motor drivesn small-scale industries where consideration of controller cost

ay be a significant factor in choosing the drive.

. The principle of direct torque control

The popular switching table based DTC scheme uses storedwitching information in a three-dimensional look-up table,here the variables are flux and torque errors and the spatialosition of the flux vector linking the stator winding [2–11]. Aypical switching table is reproduced in Table 1.

In Table 1, Sλ denotes flux-logic. Logic ‘1’ calls for increasen flux magnitude and logic ‘0’ calls for decreasing the magni-ude. ST denotes torque logic. ‘1’, ‘0’ and ‘−1’, respectively, callor control action to increase, maintain as it is and to decrease

182 B.P. Panigrahi et al. / Electric Power Systems Research 77 (2007) 181–190

Table 1DTC switching table

Sλ ST 〈Sθ〉〈1〉 〈2〉 〈3〉 〈4〉 〈5〉 〈6〉

1 1 VI (1 1 0) I (1 0 0) II (1 0 1) III (0 0 1) IV (0 1 1) V (0 1 0)1 0 VIII (1 1 1) VII (0 0 0) VIII (1 1 1) VII (0 0 0) VIII (1 1 1) VII (0 0 0)1 −1 II (1 0 1) III (0 0 1) IV (0 1 1) V (0 1 0) VI (1 1 0) I (1 0 0)0 1 V (0 1 0) VI (1 1 0) I (1 00 0 VII (0 0 0) VIII (1 1 1) VII (0 −1 III (0 0 1) IV (0 1 1) V (0

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Fig. 1. Inverter for the DTC drive.

he developed motor-torque. Sθ tells about one of the six spa-ial sectors in which the instantaneous stator-linked flux lies.ased on the three input variables (Sλ, ST and Sθ), the required

nverter output vector is specified in the above table using romanumerals. The six active voltage vectors (I–VI) and the two nullectors (VII and VIII) are denoted by the corresponding switch-ng pattern (within small brackets) shown along with the numeralenoting space voltage vector. For example, active voltage vec-or VI will require, as per Fig. 1, turning on of upper switchesn legs ‘a’ and ‘b’ and lower switch in leg ‘c’. Fig. 2 shows theix active space vectors and all the six spatial sectors describedefore. Each voltage vector is situated in the center of the corre-ponding sector. As we move in the anticlockwise direction inhe d–q plane, the sectors 〈6〉, 〈5〉, 〈4〉, 〈3〉, 〈2〉 and 〈1〉 come inequence. Sector 〈1〉 extends from 60◦ to 120◦ (from d axis, inhe anticlockwise direction) of Fig. 2 and so on.

In all the reported work, the switching-table based DTCcheme has been realized with the help of some fast digital pro-essor like, DSP or PC [6,7]. The actual motor currents and

he dc link voltage are sensed and fed to the computing device.ased on the switching pattern output by the PC (or DSP) andnowledge of dc link voltage, the instantaneous magnitude of

Fig. 2. Space voltage vectors and spatial sectors.

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0) II (1 0 1) III (0 0 1) IV (0 1 1)0 0 0) VIII (1 1 1) VII (0 0 0) VIII (1 1 1)1 0) VI (1 1 0) I (1 0 0) II (1 0 1)

hree-phase motor line voltages are calculated. The three-phaseurrents and voltages are transformed to two-phase stationaryd’ and ‘q’ axes as shown in Eqs. (1)–(4) where the notationsave their usual meanings.

qs = van = 2

3vab + 1

3vbc (1)

ds = 1√3

(−vbc) (2)

qs = ias (3)

ds = 1√3

(ics − ibs) (4)

he stator d- and q-axis flux linkages [9] are given by Eqs. (5)nd (6), where stator resistance drop has been compensated. Theeveloped electromagnetic torque ‘Te’ is given by Eq. (7).

qs =∫

(vqs − Rsiqs) dt (5)

ds =∫

(vds − Rsids) dt (6)

e = 3

2

P

2(λdsiqs − λqsids) (7)

he resultant stator linked flux, λs =√

λ2ds + λ2

qs, is compared

ith its reference magnitude and the flux-error logic state (Sλ) isbtained. In a similar manner the torque-error logic state (ST) isbtained. The sector determination is done as in Table 2, where

2 is the sign of λds and A1 is the sign of λqs. Digit ‘0’ denotesegative sign and digit ‘1’ denotes positive sign. A0 equals ‘1’f absolute value of the ratio (λqs/λds) is greater than or equal toan 60◦ (=1.732) otherwise A0 is ‘0’.

able 2ector determination algorithm

2 A1 A0 Sector no. (Sθ)

0 0 〈5〉0 1 〈4〉1 0 〈6〉1 1 〈1〉0 0 〈3〉0 1 〈4〉1 0 〈2〉1 1 〈1〉

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B.P. Panigrahi et al. / Electric Pow

. Proposed hardware scheme

The main hardware blocks as explained briefly in the nextection in the proposed DTC implementation scheme are:

Sensing of motor terminal voltages and currents and trans-forming them from three-phase to two-phase.Determination of d–q components of stator-linked flux andcalculation of resultant flux magnitude, its spatial positionsector (Sθ) and flux logic signal (Sλ).Torque calculation and comparison of actual and referencemagnitudes of torque to get torque logic state (ST).Hardware implementation of the switching table (Table 1).

.1. Sensing of motor voltages and currents andhree-phase to two-phase conversion

Motor terminal voltages are sensed by low cost FET-input op-mps working in differential amplifier mode such that the lineoltages are stepped down to signal level voltages referred tolectronic ground potential. The low cost op-amp based volt-ge sensor circuit with relatively low bandwidth will sufficeor the present application as the end-use of these signals isn determination of relatively low frequency actual d–q axesuxes of the machine. Two current sensors, working on Hall-ffect principle, are used to get isolated measurement of lineurrents ias and ibs of the stator. The sensed three-phase bal-nced line voltages vab and vbc are transformed to two-phaseoltages vdsand vqs according to Eqs. (1) and (2). The three-hase to two-phase realization is achieved using simple op-ampased circuits. The two line currents ias and ibs of the inductionotor are similarly converted to d–q axes, again using op-amp

ircuits.

.2. Determination of stator-linked flux and its position

The stator d and q voltages are integrated after subtracting theesistive drops (as per Eqs. (5) and (6)) to get stator flux com-onents along those axes. This is once again realized using fewp-amps. The d and q components of the stator flux (λds and λqs)re individually squared using two low cost multipliers (AD633)nd the individual multiplier outputs are added, using an op-amp,o get the square of the stator flux. The squared magnitude oftator flux is then compared with the square of the referenceux magnitude and flux logic signal (Sλ) is obtained. The sixosition sectors are determined as per Table 2. λds and λqs areompared using op-amp based zero level comparators and theirutput determines A1 and A2 as per the description given earlier.he d and q components of fluxes are fed to precision rectifierircuits to get their absolute values. Each precision rectifier isealized using one op-amp and one analog switch (IC DG 201).

he absolute values of the fluxes are fed to a divider circuit (real-

zed using multiplier IC AD633 and an op-amp) to get the ratioλqs/λds). This ratio is compared with tan 60◦ (=1.732) usingp-amp based comparator. If the ratio is greater than 1.732, A0s ‘1’ otherwise A0 is ‘0’.

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tems Research 77 (2007) 181–190 183

.3. Calculation of actual torque developed by the motor

The two fluxes λds and λqs along with the two computedurrents ids and iqs have been used to compute the developedorque Tem by the motor with the help of a couple of low costultiplier ICs AD633JN and one op-amp by using the relation

iven in Eq. (7). The subtraction of the torque developed fromts reference value by using an op-amp based subtractor giveshe torque error. This torque error is further processed to get theigital control signals for the torque control logic as describedater in this section.

.4. Generation of digital control signals (ST1, ST2) fororque control logic

Two control signals have been used here to achieve the threeevel control action for the torque (Table 1). The torque errorSection 3.3) is amplified and compared with small positivend negative voltages (fraction of diode drops) separately usingwo op-amp based hysteresis comparators. Let the output con-rol signal from hysteresis comparator using positive referenceoltage be ST1 and the output from the comparator using nega-ive reference voltage be ST2. If both ST1 and ST2 become lowr ‘zero’, then torque logic ‘0’ is achieved as the torque erroremains within the small negative and positive reference volt-ges. Similarly, torque logic ‘1’ is achieved when ST1 becomesigh or ‘one’ and ST2 becomes low or ‘zero’. Torque logic ‘−1’s achieved when ST1 becomes low or ‘zero’ and ST2 becomesigh or ‘one’. Here, both ST1 and ST2 cannot become high orone’ simultaneously.

.5. Logic for switching table implementation

The DTC switching table shown in Table 1 above is repro-uced below in Table 3 using the six control signals A2, A1, A0,λ, ST1 and ST2 as inputs and the eight voltage vectors as out-ut with a view to simplify it using the Karnaugh-map (K-Map)ptimization technique. The first column shows the three con-rol signals A2, A1, A0 as three bits in gray code representinghe defined six sectors in space. The second to ninth columns inrst row show the other three control signals in gray code. The× 8 matrix denotes the switching state of the three inverter-

egs a, b and c. The symbol ‘X’ means don’t care condition ofhe switches of the inverter.

Next, Table 3 is segregated leg wise and a fresh truth tableor each of three inverter legs a, b and c is reconstructed. Onimplifying the truth table for leg ‘a’ by applying K-Map rules,he following logic expression is obtained Eq. (8).

+ A1A0S� + A0ST1ST2(A1Sλ + A1Sλ). (8)

Similarly, on simplifying the truth table for leg ‘b’ by apply-ng K-Map rules, the following logic expression is obtained Eq.9).

184 B.P. Panigrahi et al. / Electric Power Systems Research 77 (2007) 181–190

Table 3DTC switching table with six input control signals

A2A1A0 ST1ST2Sλ

0 0 0 0 0 1 0 1 1 0 1 0 1 1 0 1 1 1 1 0 1 1 0 0a b c a b c a b c a b c a b c a b c a b c a b c

0 0 0 〈5〉 0 0 0 1 1 1 1 1 0 1 0 0 XXX XXX 0 1 1 0 0 10 0 1 〈4〉 1 1 1 0 0 0 0 1 0 1 1 0 XXX XXX 0 0 1 1 0 10 1 1 〈1〉 0 0 0 1 1 1 1 0 1 0 0 1 XXX XXX 1 1 0 0 1 00 1 0 〈6〉 1 1 1 0 0 0 1 0 0 1 0 1 XXX XXX 0 1 0 0 1 11 1 0 〈2〉 1 1 1 0 0 0 0 0 1 0 1 1 XXX XXX 1 0 0 1 1 01 1 1 〈1〉 0 0 0 1 1 1 1 0 1 0 0 1 XXX XXX 1 1 0 0 1 01 0 1 〈4〉 1 1 1 0 0 0 0 1 0 1 1 0 XXX XXX 0 0 1 1 0 11 0 1 0

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0 0 〈3〉 0 0 0 1 1 1 0 1 1

b = A2A1ST2 + A2A1ST1 + A1A0ST1 + A1A0ST2

+ A2A0ST2Sλ + A1ST1(A0Sλ + A0Sλ)

+ A2A1A0Sλ + A1ST2(SλA0 + SλA0). (9)

In a similar fashion, the truth table for leg ‘c’ is simplifiedsing K-Map rules and the logic expression for leg ‘c’ is obtaineds shown in Eq. (10).

c = A2A1ST1 + A2A1ST2 + A1A0ST2

+ A1ST1(SλA0 + SλA0) + A1A0ST1 + A2A1A0Sλ

+A2A1A0Sλ + A1ST2(SλA0 + A0Sλ). (10)

All these switching logic signals Qa, Qb and Qc are realizedrom the above-mentioned six control signals A2, A1, A0, ST1, ST2nd Sλ using discrete hardware logic gates in accordance with

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Fig. 3. Generation of switch

XXX XXX 1 0 1 1 0 0

he above Eqs. (8)–(10). The circuit realization of the switchingogic signal Qa is shown in Fig. 3.

.6. Clock and buffer circuit

The switching signals Qa, Qb and Qc are synchronized with50 kHz clock pulse (time period = 20 �s) using synchronous

atches realized using D flip-flops. The output from each D flip-op is passed through buffer and isolation stages before beinged to the inverter gate drive circuit for switching the appropriateower switch of the inverter.

. Experimental results

The all hardware based DTC scheme was implemented on aaboratory scale motor of 3-phase, 220 V, 50 Hz, 0.75 kW rating.he motor was loaded through a dc separately excited generator

logic signal for leg ‘a’.

B.P. Panigrahi et al. / Electric Power Systems Research 77 (2007) 181–190 185

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Fig. 6. Developed torque and reference torque vs. time.

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Fig. 4. Developed torque and reference torque vs. time.

eeding a resistive load. The stator flux reference magnitudeas set at rated value (0.5257 Wb) and repetitive step change

n torque command was given through a signal generator. Theeference (command) torque was square wave of nearly 1 Hzith some dc bias. The step rise in torque command is from0% to 100% of rated torque (4.95 Nm). The step fall in torqueommand is also by this same amount. This same template of theorque command had been used for all the experimental resultshown here.

Fig. 4 shows the generated torque in response to step risend fall of torque command. It is seen from Fig. 4 that theotor developed torque remains within the hysteresis band as

er expectation. The same figure has been expanded to differentime scale (1 ms/div.) as shown in Figs. 5 and 6. It is observedrom these figures that the developed torque of the motor takesms time to catch up with the step rise in its reference valuehile it takes 0.5-ms time to meet the step fall in torque com-and.Fig. 7 shows the change in the ‘d’ axis component of actual

tator flux in response to the above torque command template.he motor speed changes due to change in developed torque and

he frequency of the actual stator flux changes to meet the torque

emand. The ‘q’ axis component of the actual flux is also foundo vary in a similar manner as shown in Fig. 8. It can be seen fromig. 8 that the frequency of both the ‘d’ and ‘q’ axes components

Fig. 5. Developed torque and reference torque vs. time.

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Fig. 7. D axis actual stator flux and reference torque vs. time.

f the stator flux change while their respective amplitudes remaindentical and constant. Both the flux components are seen to bet quadrature to each other and sinusoidally varying with respecto time.

Fig. 9 shows the change in two of the motor phase currents inesponse to the torque template. It can be seen that the currentagnitudes change in response to the torque command. At light

oad, the phase currents are seen to suffer from little distortion.his may be partly due to the pre-dominance of magnetizingurrent and partly due to experimental imperfections.

Fig. 8. Actual stator flux components along d and q axes vs. time.

186 B.P. Panigrahi et al. / Electric Power Systems Research 77 (2007) 181–190

Fig. 9. Stator phase-a and phase-b currents vs. time.

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Fig. 12. Reference and actual torques vs. time (step fall).

Fig. 13. D axis actual stator flux and reference torque vs. time.

Fig. 10. Developed torque and reference torque vs. time.

. Digital simulation results

The above DTC scheme was simulated digitally in ‘Turbo++’ environment and the simulation results were found to be

n agreement with the experimental results. Some of the rep-esentative simulation results are produced in Figs. 10–15. Allhe simulation results are expressed in per unit (p.u.) values andhe torque command given here is identical to the one used inxperimental verification.

Fig. 10 shows the actual torque response superimposed with

he reference torque in per unit values and it is seen that theyre closely matching. The high frequency ripple in the actualorque is expected because of the hysteresis band of the torqueomparator. Figs. 11 and 12 are the time-expanded version of

Fig. 11. Reference and actual torques vs. time (step rise).

Fig. 14. Actual stator flux components along d and q axes vs. time.

Fig. 15. Stator phase-a and phase-b currents vs. time.

er Systems Research 77 (2007) 181–190 187

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B.P. Panigrahi et al. / Electric Pow

ig. 10. The developed torque takes around 1 ms time to catchp with the step rise in the torque command (Fig. 11) whereast takes around 0.5 ms time to catch up with the step fall in theorque command (Fig. 12).

Fig. 13 shows the change in the ‘d’ axis component of actualtator flux in response to the above torque command template.he motor speed changes due to change in developed torque and

he frequency of the simulated actual stator flux changes to meethe torque demand. Fig. 14 shows the d and q axes componentsf stator flux as a function of time. Both the components are sinu-oidal and in quadrature to each other, the leading one being theaxis flux component. Frequency of both the flux components

aries with the step change in torque command.Fig. 15 shows the time variation of stator phase ‘a’ and ‘b’

urrents in response to the square wave torque command. Theeading current is that of phase ‘a’. One can see frequency vari-tion similar to that seen with the stator flux (Fig. 14). It may beoted that the current magnitudes remain balanced.

It may be observed that the above digital simulation resultsre in close agreement with their experimental counterparts pre-ented in Section 4.

. An alternate hardware scheme

Another new hardware based scheme, different from thebove-mentioned conventional switching table based DTCcheme, has been presented in this section. Here two sinusoidaloltage signals of identical magnitude and frequency but inhase quadrature, representing the stationary ‘d’ and ‘q’ axesomponents of the stator reference flux, are generated. Therequency of these reference flux components is increased orecreased in response to the torque error. The work reportedimits itself to below base speed operation with fixed magnitudef reference stator flux.

.1. The proposed controller

This newly proposed scheme, as in other DTC schemes, trieso change the torque angle (angle between the stator linked fluxnd the rotor linked flux) in response to the torque error. Forelow base speed operation, the actual stator-linked flux com-onents λds and λqs are sinusoidal fluxes of constant magnitudend are in phase-quadrature. The angular speed of the resul-ant stator-linked flux is dynamically adjusted in response to theorque error. This effectively changes the torque-angle, as thehange in rotor-linked flux is comparatively sluggish. To meethe torque demand the reference fluxes, λds ref and λqs ref, areenerated digitally using EPROMs as per the schematic circuitiagram shown in Fig. 16.

The torque controller output is used to either accelerate orecelerate the resultant stator reference flux vector without caus-ng any abrupt change in its angular position. The change inhe reference flux vector magnitude and position is achieved by

ffecting the required change in λds ref and λqs ref. The actualtator d–q fluxes are able to track the changes in their referencealues by suitable selection of the voltage vectors output by thenverter. Simple hardware logic, as discussed in the following

fl

ss

Fig. 16. Generation of stator reference flux components.

ection, acts upon the flux errors and decides the required voltageector to be output by the inverter.

.2. Hardware implementation of the proposed (alternate)ontroller

The main hardware blocks for implementation of the newTC scheme are:

Sensing of motor terminal voltages and currents and trans-forming them from three-phase to two-phase (d–q compo-nents).Determination of d–q components of stator-linked flux andcalculation of actual torque developed by the motor.Computation of torque error and feeding it as input to thetorque controller.Generation of reference d–q axes fluxes as demanded bytorque controller.Generation of inverter switching logic based on flux error.

Motor terminal voltages and input currents are sensed andransformed from three-phase to two-phase in a manner alreadyescribed earlier in Section 3.1. The d–q axes components (λdsnd λqs) of the actual stator-linked flux of the motor are obtainedn the same way as explained in Section 3.2. The motor devel-ped torque is computed as per the procedure given in Section.3. This actual torque, so calculated, is compared with refer-nce torque and the error is fed to a proportional plus integralontroller. For the described scheme the reference magnitudesor torque and flux are set externally. Output from the torque (PI)

ux vector.The reference flux generation and the inverter-switching

cheme are discussed separately in the following twoections.

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.2.1. Generation of stator reference flux components along–q axes

As per the block diagram shown in Fig. 16, sin(θ) and cos(θ)ata over a complete cycle are loaded in two EPROMs whichre addressed by the output word of a modulo 2N ripple counter.n the present case, 2K EPROMs are used and the incrementalhange in ‘θ’ value is by 360/2048 degrees. For 2K EPROM, aodulo 211 ripple counter is used to feed to the 11 bit address

ines of the EPROMs. With the application of each clock inputo the ripple counter, the address word increments by one andhe stored digital value of sin(θ) and cos(θ) for the next θ valuere output. The digital sin(θ) and cos(θ) values are convertednto analog signals using D/A converter. If the clock pulse tohe ripple counter is applied at fixed frequency, fixed frequencyinusoidal waves will be available at the D/A outputs. The out-ut frequency will be equal to clock frequency divided by 2N.he clock to the ripple counter comes from a voltage to fre-uency converter (v-to-f) chip that changes the clock frequencyinearly with the applied input voltage. Input to this v-to-f chipomes from the torque controller. To meet the increased torqueemand, the torque controller output increases resulting in fasterddressing of EPROMs and this finally causes acceleration inhe rotational speed of the stator reference flux vector. The fluxector decelerates, if the torque controller output reduces. Bypplying suitable reference voltage to the D/A converters, theeference flux magnitude may be controlled. For below basepeed operation, this magnitude is kept constant.

.2.2. Inverter switching schemeThe inverter-switching scheme is based on flux error mini-

ization. The reference ‘d’ and ‘q’ axes fluxes are generateds per the torque controller output described in the precedingection. These reference fluxes are compared with the actualtator ‘d’ and ‘q’ axes flux components. As described earlier,he actual fluxes are essentially volt–time integrals of the actuald’ and ‘q’ axes voltages, after compensating for stator resis-ance drop. Based on the error in the actual ‘d’ and ‘q’ axes

uxes, suitable voltage vectors are output. A simple circuit, asescribed below, is used to determine the required voltage vectornd the switching scheme for the inverter. The flux comparisoncheme is also being depicted in Fig. 17.

Fig. 17. Output of flux comparators along d and q axes.

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tems Research 77 (2007) 181–190

The actual ‘d’ and ‘q’ axes flux components are comparedith their reference values inside a window comparator hav-

ng an error band of �λds and �λqs, respectively. The com-arator output, when high, means actual flux along that axiseeds to be increased. Similarly, the actual flux needs to beecreased when the comparator output is low. Let ‘Qd’ andQq’ be the digital outputs of the comparators for ‘d’ and ‘q’xes, respectively. To increase ‘d’ axis flux, corresponding toQd’ = 1, the voltage vectors that may be applied are vectorsII’ or ‘III’ having switching states 〈1 0 1〉 and 〈0 0 1〉 respec-ively (refer to Fig. 2). Similarly application of voltage vectorsV’ and ‘VI’, having switching states 〈0 1 0〉 and 〈1 1 0〉, willecrease the actual ‘d’ axis flux in response to ‘Qd’ = 0. Atow frequencies, the rated magnitude of flux can be producedith application of less voltage. For low frequencies, the vec-

ors ‘II’ and ‘VI’ may be chosen to increase ‘q’ axis componentf flux in response to ‘Qq’ = 1, whereas vectors ‘III’ and ‘V’ay be chosen, when ‘Qq’ = 0. Thus, at low reference flux fre-

uencies, the above mentioned four vectors, out of the totalix active and two null vectors, may suffice to meet the refer-nce flux demand, even though it may not result in optimumwitching conditions as far as the switching losses are con-erned.

At higher frequencies of reference flux, the voltage compo-ents along ‘q’ and ‘−q’ axes need to be increased. The demandor increased voltage along these axes will show up in increasedq’ and ‘−q’ axes flux error, if only above four voltage vectorsre used. When the ‘q’ axis error magnitudes exceed anotherlightly higher error band (referred later as outer error band),he remaining two active voltage vectors ‘I’ and ‘IV’, corre-ponding to switching states 〈1 0 0〉 and 〈0 1 1〉 are selected. Toealize this, two additional comparators for ‘q’ axis flux com-arison are used. Let these comparator outputs be denoted asQq+’ and ‘Qq−’. When the ‘q’ axis flux error (reference flux-ctual flux) has yet not exceeded the outer band, ‘Qq+’ = 1 andQq−’ = 0, irrespective of the inner band comparator output.

hen the positive error in actual ‘q’ axis flux exceeds the outerrror band, both ‘Qq+’ and ‘Qq−’ = 1. Similarly, when the neg-tive error magnitude exceeds the outer error band, both ‘Qq+’nd ‘Qq−’ = 0. It may be noted that when ‘Qq+’ = 0, ‘Qq’ andQq−’ will also be = 0. Similarly when ‘Qq−’ = 1, ‘Qq’ and ‘Qq+’ill also be = 1. The switching logic based on the above four

omparator-outputs is realized in hardware as per the followingelation.

a = Qq (11)

b = Qd(Qq+ ⊕ Qq−) + Qq+Qq− (12)

¯ ¯

c = Qd(Qq+ ⊕ Qq−) + Qq+Qq− (13)

All these three switching logic signals Sa, Sb and Sc for thendividual phases are passed through driver and isolation stagesefore being fed to the inverter control circuit for switchinghe corresponding power switch of the inverter legs a, b and c,espectively.

B.P. Panigrahi et al. / Electric Power Systems Research 77 (2007) 181–190 189

6

s0vatwsglr(wch

ruacfl

e

F

Fig. 20. Actual stator flux components along d and q axes vs. time (new scheme).

cfof

Fig. 18. Developed torque and reference torque vs. time (new scheme).

.3. Experimental results

The proposed new DTC scheme was implemented on theame laboratory scale motor of three-phase, 220 V, 50 Hz,.75 kW rating used for the implementation of the earlier con-entional switching table based DTC scheme. The motor loadingrrangement was also kept identical to that of the earlier men-ioned DTC scheme. The magnitude of stator reference fluxas set at rated value (0.5257 Wb = 1 per unit) and repetitive

tep change in torque command was given through a signalenerator. The reference (command) torque was of rectangu-ar shape of 1 Hz with some dc bias. This amounted to stepise in torque command from 30% to 100% of rated torque4.95 Nm = 1 per unit). The step decrease in torque commandas also by this same amount. This same template of the torque

ommand had been used for all the experimental results shownere in Figs. 18–21.

Fig. 18 shows the developed motor-torque in response to theectangular reference torque. The actual torque is found to catchp with the reference torque in less than 6 ms. As the referencend actual torques vary in a rectangular fashion, the motor speed

hanges and the frequency of d–q components of stator referenceux also change accordingly.

Fig. 19 shows the experimental waveforms of the stator ref-rence flux (d-axis component) along with the reference torque

ig. 19. D axis actual stator flux and reference torque vs. time (new scheme).

artc

ort

7

bhooplT

Fig. 21. Stator phase-a and phase-b currents vs. time (new scheme).

ommand. The ‘q’ axis component of the reference flux is alsoound to vary in a similar manner. The ‘d’ and ‘q’ componentsf the actual stator flux follow the reference flux componentsaithfully.

The experimental oscillogram of Fig. 20 shows the vari-tion in the ‘d’ and ‘q’ components of the actual flux inesponse to the above torque command. It can be seen thathe frequency of the flux changes while its magnitude remainsonstant.

Fig. 21 is the experimental result showing the change in twof the motor phase currents in response to the above torqueeference. The current magnitudes change in response to theorque command.

. Conclusions

A complete hardware implementation of the switching tableased direct torque control (DTC) scheme of an induction motoras been realized in a simple manner as described in Sections 1–5f this paper. An alternate method of hardware implementation

f this DTC scheme has been described in Section 6 of thisaper. Both the hardware schemes automatically take care ofow frequency ripple and fluctuations in the dc link voltage.he spatial position of the stator-linked flux is found out by

1 er Sys

ph

ttsfsaassbfswartosa

cpbte

R

[10] D.W. Novotny, T.A. Lipo, Vector control and dynamics of AC drives,

90 B.P. Panigrahi et al. / Electric Pow

roposing a novel sector determination technique in the firstardware implementation.

The experimental and simulation results presented here forhe first hardware implementation are in agreement and showhat the scheme is capable of giving very satisfactory steadytate and dynamic performance, at par with those obtained usingast computing devices like DSPs. The experimental results pre-ented for the second hardware implementation are in generalgreement with those of the first scheme and show that thislternate scheme is also capable of giving satisfactory steadytate and dynamic performance. Comparison between the twochemes reveals that the second scheme (Section 6) results inetter flux and current waveforms but the torque tracking per-ormance is somewhat inferior. This is expected as in the firstcheme, the torque control is given priority over flux controlhere as in the second scheme flux is directly controlled. The

ll-hardware based controllers seem to perform quite satisfacto-ily. The hardware implementations were meant to demonstratehe motor operation in forward direction and below base speednly. However with some simple additions and alterations thechemes can be extended to include four-quadrant operation overwider speed range.

Both the hardware implementations of the DTC scheme areost effective and do not require support from any digital com-

uting device. The complete hardware circuit in each case maye integrated in the form of an Application Specific IC to makehe hardware implementation even more competitive and cost-ffective.

[

tems Research 77 (2007) 181–190

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