design and analysis of cmos instrumentation amplifier

Int. Journal of Electrical & Electronics Engg. Vol. 2, Spl. Issue 1 (2015) e-ISSN: 1694-2310 | p-ISSN: 1694-2426

55 NITTTR, Chandigarh EDIT-2015

Design and Analysis of CMOS InstrumentationAmplifier

Aayushi SharmaChitkara University, Himachal Pradesh,India

Abstract-This paper presents the design and analysis ofCMOS Instrumentation Amplifier in terms of gainas aperformance metric. CMOSInstrumentation Amplifier hasbeen designed using three Operational Amplifiers. Two basicop-amps have been used at the input stage and the outputstage have been analysed for three different configurations.These configurations are: basic op-amp, body bias op-ampand folded cascode op-amp. A comparison has been drawnfor all the three configurations.Most of the previous work hasbeen done usingthe same type of op-amp at both the inputand output stages of instrumentation amplifier. To obtain thedesirableGain, focus has been laid upon transistor sizing fordesigning. The design models have been implemented usingCadence Virtuoso Analog Design Suite in 0.18µm CMOStechnology.The simulations have been analysed in detail. Asignificant gain improvement has been observed in the circuitdesign with body bias and folded cascode as compared to thebasic cascade design.

Keywords- Instrumentation amplifier, Gain, Folded cascodeamplifier, Body Bias

INTRODUCTIONInstrumentation amplifier aims at the amplification of thedesired signal and elimination of the noisy signals or thecommon mode signals that affect the original signalstrength. The amplification of very weak amplitude signalsin the order of few mV is a challenging task.With the helpof simple operational amplifiers one is able to strengthenthese weak signals along with the noise amplification.Instrumentation amplifiers are a kind of the differentialamplifier which consists of the input buffer amplifier sothat the need for the input impedance matching is notrequired.Other characteristics like low noise, low dcoffset,high open-loop gain, high common mode rejectionratio and high input impedance [1].Gain improvement canbe achieved by cascading of stages.Due to the very highcommon mode rejection ratio and less power requirementthese instrumentation amplifiers are used in variousapplications.

The rest of the paper is organized as follows:Section IIdescribes the instrumentation amplifier design. Simulationresults are discussed in SectionIII and section IV concludesthe paper.

INSTRUMENTATIONAMPLIFIER DESIGNThe basic cascade instrumentation amplifier has beendesigned using three op-amps, two at the input side andone at the output as shown in fig 1. The input side of all thethree implemented configurations is the same. However, atthe output stage the circuit has been designed and analyzedfor three different configurations.

Fig.1 Instrumentation Amplifier Circuit[2]

Table I shows the value of different resistances consideredfor the circuit design. The values of resistances are set suchthat to R3=R4=R5=R6 and R1 is very small as comparedto other resistors to achieve high gain. The output voltageof the instrumentation amplifieris given by

Vout=-( − )*(1+2 / )( / )TABLE I. Resistance Values

Resistors Resistance Value (Ω)R1 100R2, R3 20KR4, R5, R6 20K

Operational Amplifier 1 and 2 have been designed usingDifferential Amplifier connected in non- invertingconfiguration followed by CommonSource Amplifiercircuit as shown in fig 2 and 3.

Fig. 2Input Stage of Operational Amplifier

Input Stage

Output Stage

CurrentMirrorLoad

Differential Pair


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Fig.3Common Source Output Stage of

Operational Amplifier

Operational Amplifier 3 has been designed in threedifferent styles and a comparison has been drawn amongstthem in terms of gain as a performance metric. In the firstconfiguration the op-amp in the output stage is same as theop-amp in the input stages as shown in fig 2 and 3. In thesecond configuration the differential amplifier stageremains the same as in fig 2 but body bias common sourceamplifier is used at the output stage of operationalamplifier as shown in fig 4.

Fig.4 Body Bias Common Source Amplifier atthe output stage of Operational Amplifier 3

In the third configuration, folded cascode technique is usedto design the output stage op-amp of the instrumentationamplifier as shown in fig 5. Folded cascode is the cascadeof a common source stage and a commongate stage.

Fig.5Folded Cascode Operational AmplifierOutput Stage of Instrumentation Amplifier

SIMULATION RESULTS AND DISCUSSIONThe schematic of the implemented InstrumentationAmplifier has been generated in Virtuoso SchematicEditor. Cadence Spectre has been used for circuit simulatorin 180 nm CMOS Technology node. A 5mV amplitudesignal at the input has been applied. The output ACresponse has been plotted within the frequency range of10Hz to 100 MHz

Fig. 6 and 7 shows the Gain vs. Frequency plot inMagnitude and dB for the first configuration in which theop-amp in the output stage is same as the op-amp in theinput stage.

Fig.6 Gain curve in magnitude


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Fig.7 Gain curve in decibels

Fig. 8 and 9 shows the Gain vs. Frequency plot inMagnitude and dB for the second configuration in whichthe differential amplifier stage remains the same but bodybias common source amplifier is used at the output stage ofoperational amplifier.

Fig.8Gain curve in magnitude

.


Fig. 10 and 11 shows the Gain vs. Frequency plot inMagnitude and dB for the third configuration,in which thefolded cascode technique is used to design the output stageop-amp of the instrumentation amplifier.

Fig.10Gain curve in magnitude


Tables II.shows the comparison for three differentconfigurations: basic op-amp, body bias op-amp and afolded cascode op-amp.TABLE II: Comparison between basic op-amp, body bias op-amp and a

folded cascode op-amp

The abrupt increase in the gain of the folded cascodedesign as compared to the other two techniques is due tothe transistors sizing. The differential pair used is to keep acheck upon input voltage difference and is made to operatein saturation region not in triode region.Table III gives the aspect ratio(W/L) of the varioustransistors used in the folded cascode configuration.

TABLE III: OUTPUT FOLDED CASCODE STAGE OP-AMPTRANSISTOR

SIZING[2]

Transistors Aspect Ratio(W/L)

MN1,NM2 5μ/200nMN3,MN4 3μ/200nMN5,MN6 20μ/200nMP1,MP2 20μ/200nMP3.MP4 20μ/200n

Parameters Cascadedesign

bodybiased

cascodedesign

Technology(μm)

0.18 0.18 0.18

Supply voltage(v)

1.8 1.8 1.8

Gain (dB) 1.24 1.8 33.67


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MP5,MP6 50μ/200nMN8 5μ/200nMN7 10μ/200n

CONCLUSIONA comparative study and analysis for three differentconfigurations: basic op-amp, body bias op-amp and afolded cascode op-amp has been done.Analysis shows thatthe folded cascode design achieves comparatively highgain as compared to thetwo stage Cascade Op-Amp designand body biased design.

REFRENCES[1] BehzadRazavi, Design of Analog CMOS Integrated Circuits,Tata McGraw Hill Education.[2]Goel, A. and Singh, G.,” Novel High Gain Low Noise CMOSInstrumentation Amplifier for Biomedical Applications”,MachineIntelligence and Research Advancement (ICMIRA), 2013International Conference on ,PP. 392 – 396, 2013, IEEE[3]S. Kirthy,“Performance Analysis of a High Gain CMOSInstrumentation Amplifier for Biomedical SignalProcessing”,International Journal of Electronic and ElectricalEngineering.ISSN 0974-2174 VOLUME 7, NUMBER 10 (2014), PP. 1133-1133[4]Rajni, “Design of High Gain Folded-Cascode OperationalAmplifier Using 1.25 um CMOS Technology” InternationalJournal of Scientific & Engineering Research Volume 2, Issue 11,November-2011 ISSN 2229-5518[5]Yasin FM; Yap M.T and Reaz,M.B.I, “CMOS instrumentationamplifier with offset cancellation circuitry for biomedicalapplications,” In Proc. Of 5th WESEAS,2006,spain,pp 168-171.[6]Shojaei-Baghini, M. Lal, R.K Sharma and D.K,” An ultra low-power CMOS instrumentation amplifier for biomedicalapplications”, Biomedical circuits and systems,2004 IEEEInternational Workshop On, S1/1-S1,2004,IEEE.[7]Chih-Jen Yen; Wen-Yaw Chung and Mely Chen Chi, “Micro-power low offset instrumentation amplifier IC design forbiomedical system applications” IEEE Transactions On Circuitsand Systems-I: Regular Papers, Vol.51,No.4, pp 691-699 april2004.[8] R. C. Yen and P. R. Gray, “A MOS switched-capacitorinstrumentation amplifier,” IEEE J.Solid-State Circuits, vol. SC-17, pp. 1008–1013, Dec. 1982.[9]Ramakant A. Gayakward, op-amps and linear integratedcircuits: Pearson Education.