definition of reactive systems using the waveform description language
DESCRIPTION
Definition of Reactive Systems using the Waveform Description Language. E.D.Willink, Racal Research Limited, [email protected], http://www.rrl.co.uk/projects/wdl/wdl.html FM3TR Radio Forum, 24th October 2000, UK Programmable Digital Radio (PDR) Phase 1, - PowerPoint PPT PresentationTRANSCRIPT
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Definition of Reactive Systems using the Waveform Description Language
E.D.Willink, Racal Research Limited,[email protected],
http://www.rrl.co.uk/projects/wdl/wdl.html
FM3TR Radio Forum,24th October 2000,
UK Programmable Digital Radio (PDR) Phase 1,
Waveform Description Language (WDL) programme
(DERA contract CU009-0000002745)
Raytheon, Communication Systems Division, Fort Wayne, Indiana,
Racal, Racal Research Limited, England
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Introduction
WDL and Specifications
Examples (from FM3TR)
Architectural Mapping (JTRS)
Summary
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WDL Antecedents
W aveformD escriptionLanguage
B lockD iagram
Languages
R eactiveLanguages
S tateM achine
Languages
S pecificationLanguages
FunctionalLanguages
sem antics
types
constra ints
states
data flow
events
O bjectO riented
Languagesexpressions
classes
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Specification or Implementation
ImplementationHow it can be done
SpecificationWhat needs to be done
Waveform Description Language (WDL)Implementation practices re-applied in the
specification domain
One specification
Many alternate implementations
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WDL Products
W D L
H LA ,P to lem y,
...
S im ula tionE nvironm ents
E xecutionE nvironm ents
A pp lica tion ,P rocess,
C O R B A C om ponent,FP G A ,
A na logue hardware ,...
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Specification of Systems and Subsystems
subsystems exist at many scalestelecomms - international / national / regional / local / internal
equipment - cabinet / rack / module / board / component
CORBA components support two scalesinside
outside
WDLfully encapsulated
same approach at all scales
WDL specifies without implementing
WDL may be refined from a specification to an implementation
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Specification of Communication
High level systemssporadic control events
Low level systemsintensive calculation
‘continuous’ communication
WDLsporadic and continuous flows are supported
continuous and discrete time are interchangeable
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Complete specification (Low Level)
Amplifier - relatively easyvout = 10 * vin
In practice need constraintsfrequency < 1 GHz
load impedance 50 Ω ± 10%
third harmonic ...
WDLmathematical definition of the ideal behaviour
constraints to bound permitted behaviour
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Complete specification (High Level)
System specifications - very challenginglarge, unreadable
Informal specificationterse - omissions lead to ambiguities
verbose - duplications lead to contradictions
Formal specificationgood in principle
impractical for real applications
unapproachable for most practitioners
WDLpragmatic compromise
formalisable, modular, familiar, practical, acceptable
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Specification in WDLProgressive decomposition
systems - subsystems - components - building blocks
Single hierarchical perspectiveclear readable specification
removes ambiguities, avoids contradictions
Implementation in WDLProgressive refinement of specification
further decomposition
practical constraints
recomposition
Minimal refinementexecutable reference model
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WDL Transformations
W D LC om pile rs
S chem aticE d ito rs
D ecom position
R efinem entText
E d ito rs R efiner
C hecker
W D L P roducts, W aveform B und le
W D L P rogram
W D L S pecifica tion
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WDLRefinement
W D L P rogram
S ponsor
A bstract S pecifica tionlayerscodersm odula tors
Im plem enter
A ctua l S pecifica tiona lgorithm sparam etersb it-tru th
R eference M ode lprecis ionsacqu is ition a lgorithm s
S ystem D esignfilte r characteristicsacqu is ition a lgorithm sm in im um precis ions
S ystem C onfigura tionfilte r characteristicsdecim ation ra tios
H ardware M app ingpartition inglib rary m atch ing
C om ponent C onfigura tionparam eterisa tionactua l p recis ionsb it-tru thW D L S pecifica tion
R eference M ode l P roduct
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Refinement
Abstract WDL specification (unimplementable)
Waveform sponsor refines to supporta reference model
System designers refine to supporthardware partitioning
analogue/digital partitioning
concrete filter designs
specific acquisition strategies
apportion implementation loss budgets
Implementers refine toexploit pre-existing object libraries
compensate for compiler limitations
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Hierarchical decomposition
Entitymodule of specified behaviour
not necessarily an implementation object
Messageuser defined data types (and array shapes)
four scheduling flow types
Hierarchical Diagramsmessage flow diagrams
statecharts
Leaf specificationmathematical definition
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(UML) Statechart
WDL extension to UML:state behaviour
may be a message flow
StateChartEntityeventguard
out State1
State2
event[guard]/out(...)
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Message Flow Diagram
WDL Message Flow Diagrameach arc has defined data and flow type, connecting at ports
each entity is self-scheduling - rendezvous of relevant ports
external ports to define hierarchy
cf. UML Collaboration diagramexternal scheduling, connection points have no semantics
M essageFlowEntityin1in2
out
Entity2in outin1
outin2
Entity1in1in2
out
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FM3TR Protocol Layers
Application
Presentation
Session
Transport
Network
Data Link
Physical
OSI layers
Hcinwk
d lc
m ac
ph l
vo ice_ in
data_ in
data_out
antennavo ice_out
M actx_ from _dlchcirx_ from _phlcarrie r_detect
rx_ to_d lc
tx_ to_ph l
Phltxhci
vo ice_ in
rxcarrie r_detect
antennavo ice_out
Dlcin_ from _nwkhcirx_ from _m ac
out_ to_nwk
tx_ to_m ac
Nwkdata_ inhciin_ from _dlc
data_out
out_ to_d lc
Fm 3trdata_ invo ice_ in
data_outvo ice_out
antenna
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FM3TR Physical Layer
Phltxhcivo ice_ in
rxcarrie r_detect
vo ice_outantenna
TransSectrans_sec
Tx
intx_ inc
out
Rx
in
rx_ inccrc_ inc
out
Pttvo ice_ inreset
vo ice_outantenna
carrie r_detect
rx
vo ice_out
hci
tx
vo ice_ in
Radiorf_ freqrf_out
antennarf_ in
Cdt_cd_ont_cd_offcarrie r
de tectHci
hcitx_ incrx_ inccrc_ inc
t_cd_ont_cd_off
config
Fsmconfigtxtrans_sec
vo ice_ inrf_ in
carrie rrx
vo ice_out
rf_ freqrf_outreset
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FM3TR Physical
Layer State
Machine
V O IC E _TX
rf_outrf_ freq
configvo ice_ intran_sec carrie r_detect
TxM odulatoram plitudephase_changerf_ freq_ in
rf_outrf_ freq_out
carrie r
VoiceTxFsmconfigvo icetran_sec
am plitudephase_change
rf_ freq
exit
exit
vo ice_ in [p tt]
tx
D A TA _TX
rf_outrf_ freqpacket
tran_sec carrie r_detect
TxM odulatoram plitudephase_changerf_ freq_ in
rf_outrf_ freq_out
carrie r
Sinkin
config
vo ice_ in
DataTxFsmconfigdatatran_sec
am plitudephase_change
rf_ freq
R Xentry / reset()
rf_ freqrf_out
rxrf_ in
tran_sec
vo ice_outcarrie r_detect
config
vo ice_ inSink
in
RxFsmconfigrf_ inrf_ freq
rxvo ice
carrie rRxM odulator
tran_sec rf_outrf_ freq
V O IC E _TX
rf_outrf_ freq
configvo ice_ intran_sec carrie r_detect
TxM odulatoram plitudephase_changerf_ freq_ in
rf_outrf_ freq_out
carrie r
VoiceTxFsmconfigvo icetran_sec
am plitudephase_change
rf_ freq
exit
exit
vo ice_ in [p tt]
tx
D A TA _TX
rf_outrf_ freqpacket
tran_sec carrie r_detect
TxM odulatoram plitudephase_changerf_ freq_ in
rf_outrf_ freq_out
carrie r
Sinkin
config
vo ice_ in
DataTxFsmconfigdatatran_sec
am plitudephase_change
rf_ freq
R Xentry / reset()
rf_ freqrf_out
rxrf_ in
tran_sec
vo ice_outcarrie r_detect
config
vo ice_ inSink
in
RxFsmconfigrf_ inrf_ freq
rxvo ice
carrie rRxM odulator
tran_sec rf_outrf_ freq
Fsmtxvo ice_ inrf_ inconfigtran_sec
rxcarrie rrf_out
rf_ freqvo ice_out
reset
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Hop Modulator
IN FO R M A TIO N
m odula tionconfighop
In foM odulatorconfighop
m odula tion
TU N IN G _T IM E
m odula tionconfighop
G uardM odulatorconfighop
m odula tion
R IS E _T IM E
m odula tionconfighop
RiseM odulatorconfighop
m odula tion
FA LL_T IM E
m odula tionconfighop
FallM odulatorconfighop
m odula tion
afte r(config .tun ing_tim e)
a fte r(config .rise_tim e)
exit
a fte r(config .fa ll_ tim e)
tuningtim e
risetim e
falltim e
inform ationtim e
HopM odulatorhopconfig
m odula tion
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Hop Rise Time
constraint: shift.out = 0;
constraint: freq.out = hop.frequency;
constraint: amp.out = range {
minimum 0; value 0.5 * (1 - cos(2*pi*t/config.rise_time)); maximum 1; };
RiseM odulatorconfighop
m odula tion
m odula tion
F(t)
am p
out
Constructoram plitudefrequency_sh iftfrequency
m odula tionConstant
sh ift
ou t
Constant
freq
out
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Language for specification
need expressions forconfiguration constraints, state machine guards
need statements forstate machine actions
need types formessages
need a languageimplementation languages do not specify
specification languages are unapproachable
specification languages have unhelpful focus
new language is new
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Specification
entity Subtractor{in minuend;in subtrahend;out difference;response minuend subtrahend // Whenever a rendezvous of{ // minuend and subtrahend
existsspecification { // receive minuend and subtrahenddifference(minuend - subtrahend); // subtract values
}; // send to difference};
};
Polymorphictype, shape, flow, language
Subtractorm inuendsubtrahend
d iffe rence
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Hardware MappingDedicated hardware
direct compilationone ‘executable’ per ‘execution unit’
General Purpose ‘Virtual’ hardware - software radioCORBA components
software processes
HLA entities
identify components and messages
indirect compilationone executable per component per platform
one interface declaration per message
configuration profiles per application
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FM3TR Layers
asJTRS
Componentsand
MessagesFm 3trH ci
Fm 3trM odem
Fm 3trL ink
Fm 3trN etworkHci
nwk
d lc
m ac
ph l
vo ice_ in
data_ in data_out
antenna
vo ice_out
M actx_ from _dlchcirx_ from _phlcarrie r_detect
rx_ to_d lc
tx_to_ph l
Phltxhci
vo ice_ in
rxcarrie r_detect
antennavo ice_out
Dlcin_ from _nwkhcirx_ from _m ac
out_ to_nwk
tx_to_m ac
Nwkdata_ inhciin_ from _dlc
data_out
out_ to_d lc
D outD in
D toM
N toD
V outV in
H toP
H toM
H toD
H toN
D toN
M toD
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JTRS Mapping
B oard S upport P ackageN etwork P ro toco l S tacks
P osix R TO S D S P E xecutive
B lackIN FO S E C
A dapter
R edIN FO S E CA dapter
IN FO S E C A lgorithm
B oard S upport P ackageN etwork P ro toco l S tacks
P osix R TO S
C ++ C O R B AO R B andS ervices
C F C oreD om ainM anagerD eviceM anager
F ile S ervicesLoggerT im er
D evice
B oard S upport P ackageD S P E xecutive
B lack cP C I R ed cP C I
M odem B lack C ontro l P rocessor R ed C ontro l P rocessorIN FO S E C
B oard S upport P ackageN etwork P ro toco l S tacks
P osix R TO S
C ++ C O R B AO R B andS ervices
C F C oreD om ainM anagerD eviceM anager
F ile S ervicesLoggerT im er
D evice
Fm 3trH ci
Fm 3trN etwork
Fm 3trM odem .P hl.T ranS ec Fm 3trL inkFm 3trM odem .M acFm 3trM odem .P hl.nonTranS ec
Fm 3trM odem
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WDL & JTRS Summary
JTRS a common radio architecture for waveform development
modelled after very successful PC paradigm
allows third party development of low cost applications
WDLefficient methodology for developing many waveforms
provides unambiguous specification
provides portable implementation
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Summary
WDL specifies a determinate behaviour
Decomposition to manageable sub-specifications
Refinement to support a reference model
Refinement to support product implementations
Polymorphism to exploit generic libraries
Realistic scheduling models
Type-oriented code generation for flexibility
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Status
Phase 1Initial consideration of language concepts
Example decomposition of FM3TR (1 month)clearer
many anomalies reported back
FutureBetter quality specifications
sponsor provides reference model
Semi-automated code generationmonths rather than years