ded notess

63
Q. 1. What are Programmable Logic devices? Ans. A programmable logic device is an IC that is user configurable and is capable of implementing logic functions. Memory cells control and define the function that the logic performs and how the various logic functions are interconnected. PLD is composed of two types of gate arrays, the AND array and the OR array. Q. 2. What are the advantages of ROM as a programmable logic device? Ans. The advantages of using ROM as a programmable logic device are: 1, Ease of design since no simplification or minimization of logic function is required. 2. Designs can be changed, modified rapidly. 3. ROM is faster than discrete SSP/MSI circuit. 4. Cost is reduced. Q. 3. What are the advantages of PLD’s over fixed function ICs? Ans. Advantages of PLDs over fixed function iCs: 1. Reduction in board space requirements. 2. Reduction in power requirements. 3. Design security. 4. Compact circuitry 5. Higher switching speed. Q. 4. What are the steps in design process using PLD’s? Ans. The design process using PLDs require the following steps: 1. Function specification 2. Generation of Booleart equations. 3. Minimizatjcn of Boolean equations. 4. Generation of fuse maps. 5. Logic simulation. 6. Programming the selected device. 7. Testing. Q. 5. What do you mean by ROM?

Upload: rannvijay-singh

Post on 24-Oct-2014

158 views

Category:

Documents


2 download

TRANSCRIPT

Page 1: ded notess

Q. 1. What are Programmable Logic devices? Ans. A programmable logic device is an IC that is user configurable and is capable of implementing logic functions. Memory cells control and define the function that the logic performs and how the various logic functions are interconnected. PLD is composed of two types of gate arrays, the AND array and the OR array.

 Q. 2. What are the advantages of ROM as a programmable logic device? Ans. The advantages of using ROM as a programmable logic device are:1, Ease of design since no simplification or minimization of logic function is required.2. Designs can be changed, modified rapidly.3. ROM is faster than discrete SSP/MSI circuit.4. Cost is reduced.

 Q. 3. What are the advantages of PLD’s over fixed function ICs? Ans. Advantages of PLDs over fixed function iCs:1. Reduction in board space requirements.2. Reduction in power requirements.3. Design security.4. Compact circuitry5. Higher switching speed.

 Q. 4. What are the steps in design process using PLD’s? Ans. The design process using PLDs require the following steps:1. Function specification2. Generation of Booleart equations.3. Minimizatjcn of Boolean equations.4. Generation of fuse maps.5. Logic simulation.6. Programming the selected device.7. Testing.

 Q. 5. What do you mean by ROM? Ans. Read only Memory (ROM):A Read only memory (ROM) is a ombinafionaI circuit with n-inputs and b-outputs he inputs are called address inputs and outputs are called data outputs. Some of the Features of ROM are as follows:1. Densest memory.2. ROM is programmed with transistors to supply the designed value.3. Static memory.

Page 2: ded notess

4. ROM core is organised or NOR gates-pull-down transistors or NOR determine programming.

 Q. 6. Draw the structure of ROM. 

The ROM has n address lines and since there are 2n combinations of n-binary digits the device contains 2n registers, each addressed by one of the 2n output lines of the address decoder.

 Q. 7. What are different types of ROM’s? Ans. Types of RUMs:1. Mask Programmed : Their contents are programmed according to the desired specification and no change is permitted by the user. Mask Programmability may be achieved using:—contact programming.— Presence or absence of a transistor.— Implant to turn transistors permanently OFF or ON.2. PROMs (Programmable ROMs) : A programmable read only memory (PROM) is similar to a mask ROM except that the customer may store data values. It is user programmable with the aid of a device known as PROM programmer. The PROM programmer can be used to set desired bits to the opposite value.3. EPROMs (Erasable PROMs) : User programmable like PROM but can also be erased to all-is state by exposing it to ultraviolet light.4. EAROMs (Electrically alterable ROMs) : They are erased electrically and also employ MOS floating gate technology such ROM’s have quite small packing densities.5. Flash Memory : Flash memories are often packaged into a single credit-card- size module for applications these offer fast read access and rapid contents erasure. Their packing densities are similar to EPROMs.

 Q. 8. Explain ROM implementation using bipolar technologies. Ans. Circuit details of a bipolar 4 x 4-bit ROM.

Page 3: ded notess

In bipolar ROM, bipolar junction transistors are considered to be data-storing elements. In the figure, BL is the bit line and WL is the word line. No physical contact is there between WL and BL line. When BL line is grounded irrespective of the value on WL line 0 is stored. When a high voltage is applied on WL line the BIT is forward biased and I is considered to be stored and if there is no BJT 0 is stored.

 Q. 9. Implement a 2-bit adder using ROM. 

We see that there are five input variables and a three output  variables. So a 5 to 32 line decoder is to be used and the ROM matrix used is of 32 locations each storing three bits of output. The partial ROM program table is given by

Page 4: ded notess

 How would you construct it?

 Ans. ROM : A read only memory (ROM) is a semiconductor memory device used to store information which is permanent in nature, and has become an important part of many digital systems because of its low cost, high speed, system design flexibility and data non-volatility. The read-only memory has a variety of applications in digital systems, such as implementation of combinational logic and sequential logic, character generation, look-up table microprocessor programme storage etc.RAM: Many digital systems require memories in which it should be possible to write into or read from any memory location with the same speed. In such memories, the data stored at any location can be changed during the operation of the system. This types of memory is known as read/write memory and is usually referred to as RAM :random access memory).

Page 5: ded notess

 Q. 11. What are the advantages and disadvantages of ROM? Ans.Advantages of ROM:1. Ease and high speed of design.2. Faster than circuit using SSI/ MSJ devies.3. Design can be easily changed and modified4. Reduced cost.Disadvantages of ROM:1. More power consumption.2. Increase in size with increase in number of input variables.

 

Page 6: ded notess

Q. 12. Explain and draw the internal structure of PLA. Ans. PLA (Programmable Logic Array) : PLA basically consists of AND matrix and OR matrix depending on the users requirement; connections in the matrix are fused. In this, both AND or gate arrays are programmable.

— PLA uses two levels of logic, one implementing ANDs (product terms) and another OR terms.— AND gate provide the product terms and OR array gate logically sum the product terms and thus generat the SOP expression.— Input supplies both true and complement form of the variable by using pair of inverters on the true form as buffers.— Input to AND plane flows vertically while outputs of AND flow horizontally and emerges at right side.— OR plane is simply 90° rotation of AND plane.

 Q. 13. List few of the commercially available PLA ICs. Ans. 825200 and 825201 are the commercial PLA ICs which are pin-for-pin mask programmable replacements for the 825100 and 825101.• The DM 7575 PLA has taken pole output, whereas DM7576 and 1M5200 have passive pull up. The devices with passive pull up are useful for expanding functions by wire-ANDING the outputs of similar other devices. 

Page 7: ded notess

 Q. 15. Enumerate advantages and disadvantages of PL4  Ans. Advantages of PLAs:PLA like ROMs have many advantages over random logic gate networks. Some of the advantages of PLAs are described as below1. Logic designing is less time consuming.2. Design checking is easy and can also be changed or modified easily.3. Layout is very simple.4. With the advancement of new IC technology the previous design information can be used but without changes, making adoption of the new technology quick and easy.Disadvantages of PLAs:1. PLA’s have lesser speed than random logic gate network.2. PLA’s occupy larger chip-area as that of random logic gate networks.3. With large production volumes, PLA’s became costlier as compared to random- logic gate networks.4. PLA’s cannot store complex functions i.e. functions whose disjunctive forms consists of many product terms.

 Q. 16. What are the applicaticms of PLAs? Ans. Applications of PLAs:1. PLAs can be used to implement combinational and sequential logic circuits.

Page 8: ded notess

2. PLAs are used in many microprocessor chips because of ease of design change and check.3. PLAs are particularly suited for implementation of ASIC’s.4. PLA’s are used in control logic, thereby repairing full custom design approach because it is very time consuming. A number of different custom-design chips with high performance can be made quickly by changing only one connection mark for PLA’s.

 Q. 17. How does a PLA differ from a ROM? Ans. Difference between PLA and ROM:1. For storing the same functions or tasks, PLAs can be smaller than ROMs generally, the size difference sharply increases asthe number of input variables increases.2. The small size advantages of PLAs diminishes as the number of terms in disjunction increases. PLAs can not store complex functions.3. In ROM, only OR plane lines are programmable whereas in case of PLAs both AND and OR plane lines are programmable.

 Q. 18. What is a PAL (Programmable Array Logic)? Ans. PAL is a programmable logic device that consists of a programmable and matrix whose outputs drive fixed or gates.• PALs can typically implement small functions easily and run very fast, but they are inefficient for large functions.• The input and gate connections are programmable in PAL and the gate count in PAL as compared to PROM is very much reduced.Since, only the AND array is programmable the PAL is less expensive than general PLA.• Typical combinational PALs have from 10 to 20 inputs and from 2 to 20 outputs with 2 to 8 AND gates divising each or gate. -• Computer aided design programs for PALs are widely available such programs accept logic equations, truth tables, state graphs or state tablesas inputs and automatically, generate the required fuse patterns.

These patterns can then be downloaded into a PLD programmer, which will blow tht required fuses and verify the operation of the PAL.

Page 9: ded notess

 Q. 19. What are the advantages of PALs as compared to PI.A’s?  Ans. Advantages of PALs over PLAs:1. PAL’s are less expensive than general PLAs since in this only AND array is programme.2. Since, PALS eliminates fuses in OR array. This results in reducing very larg area which otherwise requires large area.3. PAL is an alternative to PROMs.4. PAL is easier to program and used to replace individual gates when severa logic-function must be realized.5. PALS containing D flip-flops with inputs driven from the programmable arraj logic provide a convenient way of realizing sequential networks.

 Q. 20. Draw the block diagram of Programmable Gate Array. 

The arrays if XOR and AND gates are programmable.

 Q. 21. Implement 4-input 4-output PGA. Ans.  A 4-input 4-output PGA is shown in fig. It is capable of generating the AND NAND, OR and NOR functions. Since, a PGA only provides a single level of logic, it have very limited applications.’ –

Page 10: ded notess

 Q. 22. Write short note on GAL. Ans. Generic Array Logic (GAL):1. Generic array logic family consists of electrically erasable programmable devices designed by lattice semiconductor.2. The GAL is very useful in phototyping stage of a design. When any bugs in the logic can be corrected by reprogramming.3. GAL devices are intended as pin-for-pin replacements for a wide variety of PAL devices. It is designed to be compatible, all the way to the fuse level, for any simpler PAL which can be implemented in the GAL device.4. It has a fixed OR array and a programmable And array the reprogrammable array is essentially a grid of conductors forming rows and columns with an electrically erasable CMOS (E2CMOS) cell at each cross point.5. The GAL has the programmable logic and the OLMC (Output Logic Macro cell) Logic that excludes OR gates and flip-flops.

 Q. 23. Draw the functional block diagram of GAL 16V8 and enlist important features of GAL 16V8. Ans. Functional block diagram of GAL 16V8: The GAL 16V8 is the fastest available combinational PLJ at 3.5ns maximum propagation delay the generic architecture provides maximum design flexibility by allowing the output logic macro cell to be configured by the user.

Page 11: ded notess

Features of GAL 16V8:1. Maximum operating frequency is 250MHz.2. Reconfigurable logic and reprogrammable cells.3. High speed Electrical Erasure.4. Maximum flexibility for logic designs.5. Programmable output Polarity.6. High performance E CMOS Technology.

  Q. 24. Draw the structure of Output Logic Macro Cell (OLMC) different operating modes.and explain its? 

Page 12: ded notess

Each OLMC has four cells SYN, ACo, AC1(n) and EX-OR(n) which can be programmed to select one of the five operating modes of OLMC.1. SYN bit: It determines whether the output of the OLMC will be registered or purely combinational. It replaces the ACO bit in .OLMC (2) and OLMC (19) of GAL structure.2. ACO bit: It along with 8ACI (n) selects any one of the following output enable configuration.— I/O pin in an OLMC is a dedicated output.— I/O pin in an OLMC is a dedicated input— The tristate inverters at the outputs of all OLMCs are enabled by the common output enable OE.— The tristate inverters can be individually enable by a product term.3. ACI (n) bit: It determines the source of feedback term. This term is feedback to the AND array via the multiplexer MUX.

Page 13: ded notess
Page 14: ded notess

 Q. 25. Enlist important applications of GAL. Ans. Applications of GAL:1. DMA control2. State Machine control3. High Speed Graphics processing.4. Standard Logic speed Upgrade.

 Q. 26. Explain complex PLDs (CPLDs) in short. 

Page 15: ded notess

Ans. Complex PLDs : Complex Programmable logic device (CPLD) is an programmable logic device that can be programmed by integrating numerous SPLDs on a single chip and a ding programmable interconnect between them results in a complex PDL or CPLD. The architecture of CPLD offers high speed, predictable timing and simple software.

— The basic CPLD cell is called a macro cell, which is the CPLD implementation of. a CLB. It comprises of AND gate arrays and is surrounded by the interconnect area.— The logic blocks have programmable AND, fixed or with fewer productterms as that of PAL devices.— Some CPLDs are programmed using a PAL programmer, but this methodbecome inconvenient for the devices with hundreds of pins.— The CPLD contains a circuit that decodes the data stream and configuresthe CPLD to perform to specified logic function.

 Q. 27. List out various important features of XC9500 CPLD family. Ans. Features of .XC950 () CPLD:1. High performance device.2. Capacity to base 10,000 program/erase cycles.

Page 16: ded notess

3. Large density range having 35 to 280 macro cells with about 800-6,200 usable gates.4. Slow rate control on industrial outputs.5. User programmable ground pin capability.6. Advanced CMOS 5V Fast Flash technology.7. Flexible 36V18 Functional Block.8. Programmable power reduction mode in each macro cell.9. Enhanced pin-locking architecture.10. Extended pattern security features for design protection.

 Q. 28. Explain with block schematic, the architecture of Xilinx 9500 CPLD. Ans. XILINX 9500 CPLD Architecture:i/O Blocks : It comprises of input, buffer, output buffer and multiplexer for the output control and grounding control Multiplexer for the output control any delay.Function block (FB) : It is composed .of programmable AND array, product term allocator (PTA) and Macro cell. The function block also receives global clock, output enable and their corresponding output enable signals also drivetjie lOB.There are 18 independent macro cells in one FB. There are 18 pieces of output in the FB and they are connected with fast connect switch matrix and I/O Blocks (OEMUX) controls an output enable or stop. It is controlled by the macro cell or the signal of GTS(global three state control) pin. It can always make output 0 or 1. A slow rate control is to make the rising and the falling of the output pulse smooth. It is used to suppress the occurrence of noise.

Page 17: ded notess

A ground control is used when making input/output pin and, earth terminal. Fast CONNECT Switch Matrix: It controls the input signals to the function block. The output signals from the functional block are applied through the wired and buffer. This provides additional logic capability and increases the effective logic fan in of the destination FB without any delay.

 Q. 29. What is the function of fast .connection matrix? Ans. Function of fast CONNECT Matrix: It connects the input signals to the function block. The diagram of fast CONNECT switch matrix is shown in fig below:

Page 18: ded notess

All the signals from the i/O port and all FB outputs are connected with fast CONNECT switch matrix The output signals from the FB are applied through the wired and buffer This provides additional logic capability and increases the effective logic fanin of functional block without any dela9

 Q. 30. What are the applications of ClDs? Ans. Applications of CPLDs:1. Implementing random glue logic and prototyping small gate arrays.2. Conversion of designs including converting multiple SPLDs into a smaller number of CPLDs.3. Realization of complex designs such as graphics controller, LAN controllers, VARTs cache control and many others.4. Simple design changes through reprogramming (all commercial CPLD products are reprogrammable).5. Possibility to configure hardware (e.g. to change a protocol for a communication) without power-down.6. Predictability of circuit implementation and speed performance is one of the strongest advantages of CPLD architectures.

 Q. 31. Write short notes on:1. PEEL2. FPGA.

Page 19: ded notess

 Ans  1. PEEL (Programmable Electrically Erasable Logic) Device : PEEL devices are another family of devices that are intended as PAL replacements the PEEL is available in 20 pin different packages with speeds ranging from 5ns to 25ns. The PEEL architecture allows it to replace over 20 standard 20 pin PLDs (PAL, GAL, etc.)Features of PEEL:1. Speed ranging from 5ns to 25ns2. Low Power consumption.3. CMOS Electrically Erasable Technology.4. Reduces development Cost5. Flexible architecture.2. FPGA field Programmable Array: A field Programmable gate array usually refers to a VLSI module that can be programmed to implement large digital systems containing thousands of gates. FPGA’s have different architecture (design) than CPLD but very much similar to CPLD in their applications. FPGA are field programmable devices having logic structures, which can configured by end user. The basic FPGA structure shown in fig. below is built from logic blocks and interconnections between logic blocks arid input and output blocks (lOBs).

Page 20: ded notess

— FPGAs mainly comprises of three types of resources-logic blocks, Input and output blocks (JOBs) and Interconnections and Switches.— Logic cells are arranged in 2-D array. Interconnection wires are organized as horizontal and vertical routing channels between rows and columns of blocks.— Individual cells are connected by matrix of wires and programmable switches.— FPGA contains many identical logic cells that can be viewed as standard component. Each logic cell can independently can take any of the limited responsibilities. The logic cells may be either sequential or combinational or both. The functionality of logic cells is set at programming time by fixing a number of control inputs.

 Q. 32. Explain different FPGA programming types. Ans. There are three ways in which FPGAs can be programmed. 1. SRAM Programming (Volatile) The SRAM FPGA’s consists of a large array of programmable logic cells known as configurable logic blocks (CLBs). In this, interconnected routes are set up by using transistors, transmission gates and multiplexers. It is volatile because if power supply is interrupted, the contents of FPGA chip will be lost, so the program must be loaded from the processor at the start up time.

Page 21: ded notess

To program the component at start up time, programming data is shifted serially into the part over a single line. In SRAM based approach, the internals of the chip are modified without changing the hardware.2. EPROM-FPGA (Non-volatile) : EPROM-FPGAs consists of erasable/electrically erasable floating gate transistors. By electrically modifying the threshold voltage of the transistor it is possible to program a memory cell to store either 0 or 1. The EPROM-FPGAs do not require external memory to preserve cell- configuration. The drawback is that chip fabrication process is complex and integration density is low.3. Fuse-based FPGAs:  Antifuse programmed devices (antifuse represents an open circuit in the unprogrammed mode, can be turned into a short circuit during programming phase) are programmed electrically to provide…………………..                                                        Q. 1. What is the difference between a microprocessor and a microcomputer? What is the difference between a single chip microcomputer and a microprocessor chip? Ans. Microprocessor is a CPU enclosed in one IC package. But microcomputer is a small size computer containing a CPU memory and I/O interface.A single chip microcomputer is a CPU with memory and interface lines in one IC package.

Page 22: ded notess

 Q. 2. What are the basic components of a microcomputer? Ans. Basic components of Microcomputer:1. Processor. A general purpose processor is a programmable digital system which performs the traditional role of data-processing, necessary hardware and software are provided to support a wide range of applications.2. Memory. The memory system stores the program as well as the data used by the program. The memory is divided into locations, such as bytes and words; locations are identified by their address.3. 1/0 System. It contains the interfaces between the microcomputer system and external devices, such as keyboards, monitors, printers and modems. Each specific interface is called as an I/O port and it identified by an address.

 Q. 3. Explain the operation of microcomputer. Ans. Operation of Microcomputer : The operation of a microcomputer consist of the following instructions loop:1. The processor reads an instructions from the memory along with instruction address.2. The processor performs the operations specified by the instruction and then determines the location of the next instruction.3. The data is transferred from the memory or I/O subsystem or store data in the memory.

 Q. 4. Explain the term “instruction set” of microcomputer. Ans. Instruction Set. The instruction set describes the

bit configurations. allowed in the JR. indicating the atomic processor operations. Each such configuration forms an assembly instruction, and a sequence of such instructions form an assembly program.— An instruction typically has two parts, an opcode field and operand fields. An opcode specifies the operation to take place during the instruction. An operand field specifies the location of the actual data that takes part in an operation. The number of operands per instruction varies among processors.

 Q. 5. How can we classify instructions? Ans. Instructions can be classified into three categories:

Page 23: ded notess

1. Data-transfer instructions. Such instructions move data between memory and registers, between input/output channels and registers, and between register themselves.2. Arithmetic/logical instructions. These configure the ALU to perform a particular function, either move data from the registers through the ALU, and move data from the ALU back to a particular register.3. Branch instructions. Branch instructions determine the address of the next program instruction, based possibly on data path status signals.

 Q. 6. Explain the addressing modes of microcomputer. Ans. Addressing modes : The following addressing modes are used to indicate the, data’s location by the operand field:1. Register Addressing Mode. In this, the operand field contains the address of a datapath register in which the data resides.2. Immediate Addressing Mode. The operand field contains the data.3. Register Indirect Addressing Mode. The operand field contains the address of a register, which contains the address of a memory location of the data.4. Direct Addressing Mode. The operand field contains the address of a memory location in which data resides. Direct addressing implements regular variables.5. Indirect Addressing Mode. The operand field contains the address of a memory location, which contains the address of a memory location in which the data resides. The indirect addressing implements pointers.

6. Inherent or Implicit Addressing Mode. In this, the particular register or memory location of the data is implicit in the opcode, for example, the data• may reside in a register called “accumulator”.7. Indexed Addressing Mode. The direct or indirect operand must be added to a particular register to obtain the actual operand address.

 

Page 24: ded notess

Q. 7. Write short note on the design of microprocessor. Ans. Microprocessor Design : The general processor having basic architecture shown in fig. below can be designed by creating FSMD which describes the processorsbehaviour. –

Page 25: ded notess

The FSMD’s initial state, Reset, clears PC too. The fetch state reads M[PC] into 1/ R. The Decode state simply adds the extra cycle necessary for IR and can be read on an arc. Every time an arc leaves the Decode state, a particular instruction opcode is detected, causing a transition to the corresponding executing state for the opcode.Add and Jz, caries out the actual instructions by moving data between storage devices, modifying data or updating PC.Now, datapath can be designed to carry out the operations of this FSMD and similarly FSM design technique can be used to design a controller consisting of a stateregistor and next-state! control logic.

 Q. 8. Explain with general block diagram the memory unit of microprocessor. 

Page 26: ded notess

Ans. General Block Diagram of Memory Unit. Memory is an essential part of the microcomputer. It stores the information as instructions, data and result in binary form. There are a number of locations in a chip called registers. Each register has a specific address and stores a word (group of binary bits). The number of bits/word and number of locations in a memory define the capacity or size of the memory unit. The size of memory is expressed as the product of number of memory locations and the number of bit per location. The block diagram of a memory unit is shown in fig.

Each memory location has a specific address and can be accessed by supplying the address through the address bus from the microprocessor. If there are P address, 2P memory location can be addressed. The address of each location is given in binary or (Hexadecimal for convenience). The data from the memory comes out or can be entered into the memory by means of a bidirectional data bus. The control signals that facilitate the read/write operation from the memory are supplied through the control bus.

 Q. 9. Explain the. functions of control unit in operation of general purpose processor. Ans. Control Unit. The control unit consist of circuitry for noising data to from and through data path according to those instructions.— The control unit has a PC that holds the address in memory of next program instruction to fetch and an instruction register (IR) to hold the fetched instructions.— The control unit has a controller generates the control signals necessary to read instructions into the IR and controls the flow of data in the datapath.

 Q. 10. Draw the state diagram for the controller and explain the function of controller. Ans. Function of Controller. The basic function of a controller is to execute an instruction which is done in two steps:Step 1. : Fetch an instruction from register file (memory) which requires 4 clock cycles (one for each state and they are:(i) Fetch instruction (state si)(ii) Fetch and (state sla)(iii) PC Increment (state sib)

Page 27: ded notess

(iv) Opcode read (state s2)Step 2. Execution of the instruction which generally requires 3 clock cycles. Only for move instruction requires two clock cycles. When halt instruction execute, the microprocessor goes in halt loop.

 Q. 11. What are the general purpose applications of microprocessor? Ans. General Purpose Applications. Under this category are those applications where the microprocessors based systems are designed to be used for general purpose. Typically in these applications the microprocessor are used to perform the traditionalrole of data processing. Necessary hardware and software are provided to support a wide range of applications. In some applications the systems are used as stand alone systems. Whereas in other they are used as subsystems to relatively bigger systems. Some of general purpose applications are:(i) Single Board Microcomputer. These are the simplest and cheapest that use minimum possible hardware and software configurations. They are mainly used in imparting education and training in education institution (microprocessor kits). They are also used in industry for building prototype system around which a system for any application could be designed.

Page 28: ded notess

(ii) Terminals. They are used for communication between a computer nd the user. instructions to be commnicated to the computer are entered with the help of keyboard and the response is displayed on the monitor. These are dummy terminal that don’t perform any type of processing which is done in server. The heart of these terminals is usually a 8 bit microprocessor with a small memory and other associated devices.(iii) Personal Computers. Personal computers are most widely used general purpose application of the microcomputers. Personal computers are mainly single user machines comprising all the basic blocks of the microcomputers. They are widely used for a variety of purposes such as word processing, payroll, business accounts, medical record and inventory control. The personal computers are responsible for taking the computer technology to the masses.

 Q. 12. Write the VHDL code for instruction Register. Ans. Instruction Register. JR of the control unit is used to generate instruction code.The input IRin is the 16-bit bus connected to the memory.The outputs.-IRouter is connected to the program counter direct _add is connected to the control muxControl Signal IRid is come from controller.

Page 29: ded notess

VHDL.

Page 30: ded notess

 

Page 31: ded notess

 

Page 32: ded notess

  Q. 14. What are the basic components of a computer? Ans. A brief description of various units of a computer is as under:1. The Input Unit : The input unit consist of the devices which accept the data and instructions from the user and communicates it to the central processing unit. The functions of the input unit are:(i) To accept the instructions and data from the user and communicate to the CPU.(ii) To convert the instructions! data received from the user or other devices to the binary language as the digital computers understand only the binary language.(iii) The computers are also used to measure and control non-electrical quantities, such as speed, temperature, pressure etc. The input unit is desired to convert these non electrical quantities to electrical quantities before converting them into binary. For this purpose the Transducers are also used in the input unit.The various input devices are thus A/ D convertors (that convert analog signals to digital i.e. binary), transducers (that convert non electrical quantities to electrical), Keyboards, Mouse, Joysticks, switches, Microphone etc.The input unit of modern computer is a complex circuit and may even contain its own processing unit inside it as well.The block diagram of the computer is shown in fig.

 While the central processing unit (CPU) is called the heart and nerve centre of the computer, all the devices connected to the CPU are known as peripheral devices.2. The Output Unit: Like the input unit, output unit also serves as a communication link between the CPU and the user. Its functions are listed below:(i) To provide the result of various operations performed by the CPU to the user.(ii) The output of the CPU will bc binary in nature. The output unit converts this digital output into a language that is understood by the user.(iii) To supply the control signals generated by the CPU to control the non-electricalquantities being processed by the computer. The Actuators are used for thispurpose.The output may be displayed, stored or printed. Depending upon various functions

Page 33: ded notess

the output unit may consist of D/A convertors, Actuators, Printers, Monitors,Loudspeakers, LED’s etc.Similar to the modern input unit, the output unit may also contain in itself a small miniprocessor.3. Central Processing Unit : The central processing unit is the heart and nervecentre of the computer. It fetches the instructions and data from the peripheral devicesand performs all the arithmetic operations, take logical decision and control the operationof all other units.- It contains, within itself some storage devices for intermediate storage of data andresults. Various sub-blocks of the central processing unit as shown in fig. are:.(i) Arithmetic and logic unit or ALU(ii) Timing and control unit(iii) Accumulator and general purpose registers.(i) Arithmetic and Logic Unit (ALU) : This unit is the heart of the computer system and performs all the logical and arithmetic operations. Various arithmetic operations performed by the ALU are addition, subtraction, increment and decrement etc. Various logical operations performed being AND, OR, NOT XOR and COMPARE.(ii) Timing and Control Unit: This unit is the brain of the computer and control the entire operations being performed by the system. It controls the ‘operation of ALU, input/output and memory unit. This unit interprets the instructions and generate various timing and control signals to route the data from peripheraldevices to the ALU for further processing under its control. It is the most complex part of the computer system. The capability of the computer mainly depends upon its timing and control unit.(iii) Accumulator and General Registers : The accumulator is the main storage register of the central processing unit. It always stores one of the operands on which the CPU has to perform. The result of the most of the operations done by the CPU is first stored in the accumulator. it is basically a type of adder which goes on adding to it the result of the operations replacing the initial operands.The ihtermediate results stored in it may then to be sent to the memory or theoutput device. It is also called register ‘A’. The CPU also contains some more storage registers that are used for temporary storage of data brought from I/O device or memory and meant for operation in the CPU or storing the intermediate results of a longer operation while the computer is making the execution of a program. These may be used in pairs also to store the address or longer data.4. Memory The memory is the storage unit of the computer/microcomputer. It stores the program statement and data i.e. the information supplied from the input unity It also stores the final output. This is connected to the CPU by means of a bidirectional bus and acts in tandem with the CPU. This is an important part of the microcomputer. In fact, the concept of computer could take off only when the memory element was attached to it. Various types of the memories and their inter connection as welfare as capabilities.

  Q. 15. Design a microcomputer that performs various arithmetic and logical operations.

Page 34: ded notess

 

— This entity perform member of arithmetic or logical operations on one or more input buses.— Two input buses num A and num B upon which ALU operations are performed. ALU out is output, returns the result of the ALU operation.— Input ALUs determines the operation to be performed. The ALU is the part of data path section of micro computer. 

 

Page 35: ded notess

Q. 16. Explain the implementation of a simple micro-computer system using Ans. Implementation of a simple microcomputer:library ieee;

Page 36: ded notess

use ieee: std_Iogicc_1164 all; use ieee.std_logic_arith, all;use ieee.std_logic_unsignedall; entity microprocessor isport(CPu, cik; in stdjogic;

cpu_rst in std_logic;cpu_output out std_vector(15downto 0);end microprocessorarchitecture structure of microprocessor iscomponent datapath is 

Page 37: ded notess
Page 38: ded notess

Unit2 : memory port map( cpu_clk,cpu_rst,Mre_s,mem_addr,n.din_bus,mdout_bus); end structure;

  Q. 17. Discuss architecture of a simple micro-computer system. Ans: The main part, processing unit and devices, of a microcomputer is a system unit. A system unit includes a board called a motherboard that holds a microprocessor chip (or a CPU), memory chips, and expansion slots. Electronic circuitry is printed on the board and it connects between two main parts of a microcomputer, the microprocessor and primary storage and other parts. The system unit is housed within the system cabinet. A system unit includes the following parts:1. Motherboard2. Microprocessor3. Memory Chips4. System Clock5. I/O devices1. Motherboard: A Motherboard or system board’s is the main printed, flat circuit board in an electronic device such as microcomputers. The board contains expansion slots (sockets) that accept additional boards (expansion cards). In a microcomputer, the motherboard contains the microprocessor, the primary storage chips (or main memory cards), the buses, and all the chips used for controlling the peripherals..2. Microprocessor : A microprocessor is a processor whose elements are miniaturized into one or a few integrated circuits contained in a single silicon microchip. It executes instructions. In a microcomputer, the central processing unit (CPU) is held on single microprocessor. In order to function as a processor, it requires a system clock, primary storage and power supply. Several important lines

Page 39: ded notess

of microcomputers use some families of microprocessor chips. Intel and Motorola are the major companies that produce important microprocessors.’(i) Central Processing Unit (CPU): The central processing unit (CPU) is the computing part of the computer that interprets and executes programinstructions. It is also known as the processor. In a microcomputer, the CPU is contained on a single microprocessor chip within the system unit. The CPU has two parts; the control unit and the arithmetic-logic unit. Additional storage units called registers within control unit and ALU help make processing more efficient.(ii) Control Unit : A control unit is the circuitry that locates, retrieves, interprets and executes each instruction in the central processing unit.The control unit directs electronic signals between primary storage and the ALU, and between the CPU and input/output devices.(iii) Arithmetic Logic Unit (ALU) : ALU is a high-speed circuit part in the CPU. The arithmetic-logic unit (ALU) performs arithmetic (math) operations, logic (comparison) operations and related operations. The ALU retrieves alphanumeric data from memory and then does actual calculating and comparing. It sends the results of the operation back to memory again.3. Memory Chips. A memory chip is a chip that holds programs and data either temporarily or permanently. The major categories of memory chips are RAMs and ROMs.4. System Clock. The clock is a device that generates periodic, accurately spaced signals used for several purposes such as regulation of the operations of a processor or generation of interrupts. The clock uses the fixed vibrations generated from a quartz crystal to deliver a steady stream of pulses to the processor. The system clock controls the speed of all the operations within a computer.5. 1/0 Devices. These are used to give inputs to the Microcomputer System and to take output from microcomputer system or display purpose. I/O devices are also called peripheral device

Q. 1. What are the two main classes of statements used in VHDL descriptions? Ans. Main statement used in VHDL descriptions. There are two main classes of statements used in VHDL descriptions. These are:1. Sequential statements2. Concurrent statements

Q. 2. What is a statement? How are they classified? Ans. Statement : A statement is a construct used to specify one or more actions to take place in a hardware descriptionStatements in VHDL can be classified as shown in fig. below: 

Page 40: ded notess

Q. 3. Write a short-note on process statement.                         OrWhat is process statement? Ans. Process Statement : A proces statement is a concurrent statement which contains a set of sequential statements. A proc statement describes the functionality of a portion of an entity in sequential terms.The syntax is: -[Process label] Process [(sensitivity_list)Iprocess_item_declarationsbeginSequential statements;end process [process-label];A label, which is optional names the process:• The process statement in VHDL is used to describe the sequential operations in a design.The process statements represent the behaviour of same portion of the design.It consists of sequential statements whose execution is made in the order defined by the user. The process declarative part defines local items for the process and within it may declare subprograms, types, subtypes, constants, variables, etc. whereas signals or shared variables are not allowed to be declared inside processes.

Q. 4. What do you mean by sensitivity-list? Ans. Sensitivity list: It contains a set of signals to which the process is sensitive.Syntax:

Page 41: ded notess

(signal name a, signal name b )The sensitivity list is a way of specifying signals, each time an event occurs on any of the signals in the sensitivity list, the statements within the process are executed in a sequential order.

Q. 5. Explain Block statements.  Ans. Block Statement : The block statements contains a set of concurrent statements. Blocks are basically means of partitioning within VHDL, which allow to group architecture of the design in self-contained parts.Syntax:label : block [(expression)] [is] [block header] [block declarations] begin: concurrent-statements end block [label];Label in block syntax, names the block. The expression then consists of guard condition for the block. This is an optional expression and creates a Boolean signal called GUARD. The declarative part then declares objects local to the block.

Q. 6. What are nested blocks? Give example. Ans. Blocks can be nested i.e. blocks can be declared within blocks arid the objects declared in a block are visible to that block and also to all the blocks nested within it The objects name nested blocks may be same as that of those declared in parent block. In such case the nested block’s declaration overrides that of the parent.

Page 42: ded notess

The guard signal takes on ‘TRUE’ value when the value of guard expression is ‘TRUE’. The guard signal if is not declared explicitly. Then by default the guard signal is always true.

Q. 7. What is the role of Block statements? Ans. Block Statement: A block statement is a concurrent statement. Block statementscan contain one or more concurrent statements, including other block statements. Block statements thus provide a mechanism for creating a hierarchy mechanism on architecture body. The block statements can be used for three major purposes:1. To disable signal drivers using guards.2. To limit scope of declarations including signal declarations.3. To represent a portion of a design.

Q. 8. “Process will execute in the absence of sensitivity list”: True or False. Support your answer? Ans. A process will execute in absence of sensitivity list, this statement is true. Initially, if the sensitivity list is provided, the process will execute once and then it will suspend until an event occurs on any of the signal specified in the sensitivity list. If thesensitivity list is not provided the process still executes and will not suspend rather go into infinite loop. It should be noted that the process actually never terminates, it is either in executing state or in suspended state. So, in order to avoid it to go into infinite loop, we can use wait statement explicitly which can suspend process statement according to conditions given (i.e. Boolean equation or time expression or sensitivity list.)

Q. 9. What are signal assignment and variable assignment statements? Ans. Signal Assignment Statement : Signal assignment statements are used to assign values to signals.Syntax:Signal object c = expression [after delay value];Signal assignment statement can be defined within a process or outside a process. If it occurs inside a process, it is considered to be a sequential signal. When a signal

Page 43: ded notess

assignment statement appears outside the process, it is called concurrent signal assignment statement.Variable Assignment Statement: A variable is assigned a value using the variable assignment statement that typically has the form:

processIf an event occurred on signal * at time T1, and variable V2 was assigned a value, say 10, in statement 3, then next time an event occurs on A at time T2, the value of V2 used in statement, would still be 10.A variable can also be declared outside a process or subprogram. Such a variable can be read or updated by more than one process. These are called shared variables.

Q. 10. What is the prime use of signal ? Quote suitable example. Ans .Use of signals It holds a list of values including the current value of signal and a set of possible future value that are to appear on the signal— Signals are used to model wires and flip-flops.— Signals are used to model inherent hardware features such as concurrency, inertial character of signals propagation, buses with multiple driving sources, etc.

Q. 11. Write short note on:• Guarded Signals. Ans. Guarded Signal : Guarded signal is a special form of the concurrent assignment. The guard signal can be explicitly declared and used more commonly guarded signals are used implicitly within a Guarded Block. Syntax Signal name < = guarded expression [after time expi]Guarded signals are a way to model devices driven by several sources. Guarded signals can have drivers disconnected. A driver is disconnected by assigning to the guarded signal the value null in a sequential signal assignment. A driver is automatically disconnected as a result of a guarded signal assignment whenever the guard associated to the block is false.

Page 44: ded notess

Q. 12. What are Generate Statements? Ans. Using generate statements, one can specify a group of Identical components using just one component specification. It provides a mechanism for iterative or conditional elaboration of a portion of a design. A generate statement may contain any concurrent statements such as process statement, block statement, assertion, procedures call statement, concurrent signal assignment statement, and another generate statement.Each generate statement must have a label and generate statement can be nested.There are two forms of generate statements:1. Using the for generation scheme is concurrent statement that generate number of copies of discrete range.2. Using the if generation scheme : Concurrent statements can be conditionally elaborated i.e. generate only zero or one copy conditionally.

Q. 13. Explain concurrent statement? Ans. Concurrent statement it describes the functionality of digital structures. These statements can appear anywhere in architecture part and are executed in asynchronous manner, i.e. they order-independent. Process statements and block statements are concurrent statements.

Q. 14. Explain conditional statements with example.? Ans. Conditional statements are used to check a condition. These are included within the ‘Process’ statement. VHDL allows the use of conditional statements in an architecture declaration based on behaviour of module.Conditional statements used in VHDL are:1. If-then Else statements2. Switch/case statements.Examples:If-then-Else statements Case StatementsSyntax      

Page 45: ded notess

       Iend if

Q. 15. What are sequential statements? Ans. Sequential Statements: A set of statements that are executed in a sequence, is called sequential statements. Sequential statements occur inside processes and subprograms. Each statement is executed in the same order as it is specified i.e. sequential statements are order-dependent sequential statements depending on their operation and are categorized as follow:• Assignment Statements• Variable Assignment Statements• Signal Assignment Statements• If Statements• Case Statements• Loop Statements• Next Statements• Exit Statements• Subprograms• Wait Statements.• Null Statements.

Q. 16. What is the logic equivalent of CASE and IF ELSE statement?  Ans. The logic equivalent for CASE and IF ELSE statements can be explained by example of 2 x 4 decoder:Using CASE statement                      

Page 46: ded notess

  

Page 47: ded notess

     

Q 19 Why wait statement is normally used at the end of process and not at the beginning? Ans. Wait Statement it causes suspension Of a process or a procedure.Syntax:wait;wait on signal list;wait until condition;wait for time.A process with a sensitivity list is an implicit WAIT ON the signals in the sensitivity list. The wait statement at the end of the process is equivalent to the sensitivity list at the beginning.

Page 48: ded notess

During Initialization of the simulator, all processes are executed once. So, the wait statement must be used at the end of the process to allow the process statement to execute once in the absence of sensitivity list

Q. 20. Explain the following statements:(i) Loop Statement(ii) Return Statement(iii) Null Statement. Ans. (i) Loop Statement :A loop statement is used to iterate through a set of sequential statements. This is used to repeatedly execute a sequence of statements.Syntax:

• Label, is optional which is used to name the loop and thus is useful in building nested loops.• There are three types of iteration schemes  loops, while ....loop and for loop(ii) Return Statement: The’ return statement is used to complete the execution of the innermost function or procedure body.Return statement terminates a subprogram. A function definition requires a return statement but in case of procedure, a return statement is optional.Syntax: return expression — Function return — Procedures -• The return statement ends the execution of a subprogram (procedure .or function) in which it appears.Return statement can only be used in a procedure or function body.• The return statement in a function must return a value while in case of a procedure return statement may not return any value.(iii) Null statement  Null statement is a sequential Statement and does not perform any action.Syntax: null;•. Null statement states that no action is required. It is used in case statements.• The keyword null is used not only for “no operation” statements.

Page 49: ded notess

Q. 21. Explain the assertion statement? Ans. Assertion Statement: The Assertion statement checks the value of a Boolean expression for true or false. Assertion statements are useful in model constraints if the value is true; the statement will simply execute and if the value is false, the ASSERT statement output a user-specified text to the standard output to the terminal.Syntax: assert Boolean — expression [report string— expression] [severity expression] -• The Boolean-valued expression just after the keyword assert is a condition. The condition determines whether the text expression separated by report message is output or not.• There are two optional clauses in ASSERT Statement:• REPORT clause and SEVERITY clause.• The expression specified in the report clause is of predefined STRING type and is the message to be reported. –The severity level is enumerated type and contains values NOTE, FAILURE, WARNING and ERROR. In case of ERROR and FAILURE simulator stops after displaying the reporting message. In case of NOTE and WARNING after displaying the message simulator continuous with the simulation. The severity level defines the degree to which the violation of the assertion affects operation of the process.

Q. 22. Explain the following statements:(i) Next(ii) Assertion(iii) Exit. Ans. (i) Next  Next statement is required in cases where it is necessary. To stop execution of the statement in the loop for given iteration and go to the next iteration. Thus, NEXT statement results in skipping the remaining statements in the iteration of the specified loop and processing is transferred to the beginning of the LOOP statements.Execution begins with the first statement in ioop, but the loop variable is incremented to the next iteration value. If iteration limit has been reached, processing stops. If, not, execution continues. -Syntax: next [label] [When condition];

Page 50: ded notess

• A next statement with no label terminates the current iteration of innermost enclosing loop. If a loop label is specified the current iteration of that named loop is terminated.• An optional clause when is used which executes its next statement when its condition evaluates true.(ii) Assert Statement: For answer refer to Q. 19.(iii) Exit Statement: Exit statement is also a sequential statement and is used inside a loop. It causes execution to jump out of the innermost loop or loop with label specified.If the exit statement includes a condition, then the exit from the loop is conditional. exit [label] [when condition];• The execution of the exit statement depends on the condition placed at the end of the statement. When the condition is TRUE, the exit statement is executed and control statement is passed to the first statement after the end loop.• If an exit from a loop on a higher level of hierarchy is needed then the loop has to be assigned a label.

 

 

 

Q. 23. What is the use of Report Statement in VHDL?

  Ans. Report Statement: A report statement can be used to display a message. The report statement is similar to assertion statement. The syntax is of the form The expression in severity clause, if present must be of type SEVERITY_LEVEL If not present the default severity level of NOTE is used. 

 

  

Page 51: ded notess

Q. 24. Enumerate comparison between concurrent and sequential statements. report string expression [severity expression]; 

 Q. 25. Define Resolution Function. 

 Ans. Resolution Function: A resolution function is a function which is used to define the values of multiple drivers of a given signal into a single value for that signal. Resolution function is important because in VHDL, it is illegal to have a signal with multiple drivers without a resolution function attached to that signal. 

Syntax:Function name (parameters) return type function name (parameters) return type is declaration. Begin sequential statements end function name; -The resolution function allows multiple Values to drive a single signal at a time. The resolution function is called whenever an event occurs on one of the drivers for the signal. The resolution function is executed and returns a single value from all of the driver values; this value is the new value of the signal.

 Q.26. What are Package ? How are these formed and used in  VHDL models?

 Ans. Package :A package is a unit that provides mechanisms to store or group various declarations that can be shared among several design units. Thus package is a common storage area that holds the data shared among a number of entities.

• A package consists of two parts:(i) Package Declaration (ii) Package Body• A package must contain at least one of the following constructs-constant, data type, subprograms, components that can be used by more than one design or entity.• Signals declared in package cannot  be shared across entities.

Page 52: ded notess

(i) Package Declaration a package declaration contains a set of declarations such as components, types, procedures and functions that are commonly shared among various design units. A package declaration defines the interface to a package. These declarations can then be imported or accessed by other design units using use clause and library clause.Syntax: package. Name  is Package declarative items:Any of the following statements:— use clause— type declaration— sub type declaration— constant declaration— signal declaration— component declaration end [package] [package name](ii) Package Body  a package body specifies the behavior of the subprograms and values of deferred constants declared in package declaration.SyntaxPackage body package name isPackage  body item declarations— sub programs— complete constant declarations— sub program declarations— type and subtype declarations— file and alias declarations— use clauses  end [package body] [package name];The package name must be same as the name of its corresponding package declaration. A package body is always associated with package declaration.

Q. 27. What are subprogram  ? What are the different types of subprograms used  VHDL ? Ans. Subprograms: A subprogram defines a sequential algorithm that performs a certain computations. The subprogram is another item that forms the interface to the package. It is possible for two or more subprograms to have same name. A subprogram is defined using subprogram body. The typical format of subprogram body is:Subprogram specification is subprogram item declarations begin subprogram statements end [subprogram] [subprogram name];Types of subprograms used in VHDL. There are two types of subprograms being used in VHDL. They are: 1. Functions and 2. Procedure1. Functions are used to describe sequential algorithms that return a single value. This value is returned to the calling program using a return statement.2.procedure  is a subprogram that can modify its parameters (signals and variables). Procedures can be called in any place of its architecture. A procedure can return zero or more values and can have multiple parameters of mode-in, out and in out. All statements inside of subprogram are sequential. These  are two versions of subprograms-sequential procedure and concurrent procedure.

Page 53: ded notess

Q. 28. Enumerate the differences between functions and procedures Explain with suitable example.                                   OrHow do procedures differ from functions? Ans. Differences between Functions and Procedures:

Page 54: ded notess

Q. 31. How are configurations useful in VHDL model? Ans. Configurations are a primary design unit used to bind component instances to entities. A configuration is a construct that defines binding of component instances in a given block to design entities.Configuration is used for the following purposes:1. To bind an architecture body to its entity declaration2. To bind component with an entity.There are two ways of performing binding:1. By using a configuration specification2. By using a configuration declaration.Configurations can also be used to specify generic values for components instantiated in the architecture configured by the configuration.

Q. 32. What are predefined Attribute? Ans. Predefined Attributes: Predefined attributes are data that can be obtained from blocks, signals, and types or subtypes. VHDL standard has a set of predefined attributes.Syntax:

Page 55: ded notess

Object attribute name.• Attribute  may he value, function, type, range, signal or constant associated with one or more named entities in a description.• Users can define new attributes, and then assign them to named entities by specifying the entity and attribute value for it.• Attributes are specified by characters and then the attribute name. The object proceeding is the object that the attribute is attached to.

Q. 33. What is the role of attributes and explain different types of attributes? Ans. Role of Attributes: Attributes are used for various purposes in VHDL as below:1. To retrieve data from blocks, signals, types or subtypes.2. To detect clock edges, perform timing checks in ASSERT statements.3. To return range information about unknown strained types.4. Attributes extend language to provide some very useful functionality.Types of Attribute : The data obtained can be classified as:1. Value kind Attributes2. Function kind Attributes3. Signal kind Attributes4. Type kind Attributes5. Range kind Attributes.

Q. 34. List the various signal attributes. Ans. Signal kind Attributes are ‘Delayed’, ‘Stable’, ‘Quiet’ Transaction.

Q. 35. Define test Bench. What is the purpose of test bench? Ans. Test Bench a test bench is model used to exercise and verify the correctness of a hardware model. VHDL language provides us the capability of writing test bench models in the same language. So, to verify the proper operation of the circuit over time in response to input stimulus, writing a test-bench is needed.Purposes of Test Bench: A test bench has following three main purposes:1. To generate stimulus for stimulation (waveform)2. To apply this stimulus to the entity which is to be tested and then the output response are collected.3. To compare output response with expected values.

Q. 36. How generic statement useful in VHDL code? Ans. Uses of Generic Statement in VHDL Code: Generics provides a general mechanism to pass certain information into a design description from its environment. The information to be passed to the entity such as delay times for rising and falling delays of the device being model.

Page 56: ded notess