d page contents page contents schem,mlb,pg 17 · 2011-04-16 · schem,mlb,pg 17" map17/map31...
TRANSCRIPT
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
TABLE_5_ITEM
CRITICAL MAP31338S0094 1 IC,ASSP,MAP31-464,GRPHCS CTLR,548 BGA U43
TABLE_5_ITEM
CRITICAL MAP17338S0076 1 IC,ASSP,MAP17-464,GRPHCS CTLR,548 BGA U43
ANGLES
3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.
2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.
1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.
DATE
APPDENG
DATE
APPDCK
ECNZONEREV
DO NOT SCALE DRAWING
X.XXX
X.XX
XX
DIMENSIONS ARE IN MILLIMETERS
THIRD ANGLE PROJECTIOND
SIZE
APPLICABLENOTED AS
MATERIAL/FINISH
NONE
SCALE
DESIGNER
MFG APPD
DESIGN CK
RELEASE
QA APPD
ENG APPD
DRAFTER
METRIC
OFSHT
DRAWING NUMBER
TITLE
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
Apple Computer Inc.
12345678
12345678
B
C
D
A
B
C
D
A
REV.
DESCRIPTION OF CHANGE
?01/15/03255936 PRODUCTION RELEASED
441
051-6278 A
SCHEM,MLB,PB 17"
A
TABLE_5_ITEM
051-6278 1 SCHEM,ENTERPRISE,P84 SCH1TABLE_5_ITEM
820-1372 1 PCBF,ENTERPRISE,P84 PCB1
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
SCHEM,MLB,PG 17"
MAP17/MAP31
4X_VCORE
NO_4XVCORE
3V_HD_LOGIC
5V_HD_LOGIC
NO_SSCG
SSCG
FIREWIRE A/B CONNECTORS, PORT POWER LIMITER
FIREWIRE A/B PHY
BATTERY CHARGER AND CONNECTOR
1.5V/ 1.8V / 2.5V SYSTEM POWER SUPPLIES
CPU CORE VOLTAGE POWER SUPPLY
SIGNAL CONSTRAINTS (3 OF 3) - POWER NETS
SIGNAL CONSTRAINTS (2 OF 3) - DIGITAL/DIFF
SIGNAL CONSTRAINTS (1 OF 3) - DIGITAL/CLK
PMU (POWER MANAGEMENT UNIT)
3.3V / 5V SYSTEM POWER SUPPLIES
FUNCTIONAL TEST POINTS
REVISION HISTORY (1 OF 1)
SIGNAL NAMES
COMPONENT LOCATIONS
MAP17
BBANG
MAP31
NEC_USB
INTREPID_USB
SERIAL_DEBUG
VCORE_OFFSET
1_5V_MAXBUS
1_8V_MAXBUS
NO_BBANG
GPU_SS
GPU_SWITCH
D3_HOT
D3_COLD
SERIAL DEBUG (JOLLY ROGER, PWR/NMI/RESET)
MAP17/31 ANALOG, DVO INTERFACE, GND
MAP17/31 LVDS/TMDS/GPIO & GPU VCORE
MAP17/31 AGP & FRAME BUFFER
INTREPID GPIOS/SERIAL/USB INTERFACES/SSCG
BOM OPTIONS STUFF NO STUFF
MPC7450 DATA / L3 CACHE INTERFACES/L3 LDO
INTREPID POWER RAILS/1.5V LDO
1516
17
18
19
INTREPID DECOUPLING
9
14
12
11
10
13
7
8
6
5
3
4
DDR MEMORY MUXES
PCB NOTES AND HOLES
POWER BLOCK DIAGRAM
INTREPID AGP 4X/PCI
2
PAGE1
200PIN DDR MEMORY SODIMM CONNECTORS
INTREPID MEMORY INTERFACE / BOOT ROM
INTREPID MAXBUS AND BOOT STRAPS
CPU PLL AND CONFIGURATION STRAPS
MPC7450 MAXBUS INTERFACE
TITLE PAGE AND CONTENTS
CONTENTS
INTREPID ENET/FW/UATA/EIDE INTERFACES
PAGE CONTENTS
20
21
22
25
26
27
28
2930
31
34
33
32
23
24
39
38
37
3536
DUAL-CHANNEL LVDSVIDEO CONNECTORS - INVERTER, DVI, S-VIDEO
SPIDEY - KBD,TPAD,HALL EFFECT,PWR BUTTON
CARDSLOT, HARD DRIVE, LEFT USB/BLUETOOTHINTERNAL CONNECTORS - DVD,
40
USB 2.0
FAN CONTROLLER, MODEM, SOUND
LMU, LIGHT SENSOR, BOOTBANGER, SLEEP LED
MARVELL GIGABIT ETHERNET PHY
CARDBUS CONTROLLER (PCI1510)
DDR L3 CACHE
SYSTEM BLOCK DIAGRAM
12.8V SYSTEM POWER SUPPLY / PMU POWER SUPPLY
41-42
43-44
01/14/2003
CR-1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 2 44A051-6278
P.13
P.15
P.14P.14
USB 2.0
USB 2.0
USB PORT AJ12
J3 (SHARE WITH BLUETOOTH)
J3 (SHARE WITH LEFT USB)
J9
P.25
U44
U6/U7
U42
J20/J23
U11/U12/U13/U14
J16J7 J17
J8
U43
J5
J21
U26
J10
CARDBUS
J15
U39
U36
J19J25
U48/J2/J4
J14
J11
J13
U28
J22J24
U49
J18
3.3V/5V16/32 BITS33MHZ
I2CINTRPEID
PMU
167MHZ1.8VMAXBUS
32BIT ADDRESS64BIT DATA
1.5VL3 BUS
250/300 MHZ
64BIT DATA18BIT ADDRESS
NOT USED
NOT USED
NOT USED
RIGHT USBBACKUP BATTERY
Modem BoardConnector
LEFT USB
BlueTooth
I2C
I2SEIDE
UIDE
1394 OHCI3.3V
50MHZ8BIT TX/RX
P.24
P.24
@ 200MHz@ 400MHZ2 DATA PAIRS
2 DATA PAIRS
PHY
ConnectorFW - B
ConnectorFW - A
125MHZ
8BIT RX
8BIT TX
G/MII3.3V
10/100/1000
4 DATA PAIRS
ConnectorEthernet
EthernetPHY
66MHZ
1.5V/3.3V
AGP BUS
32BITS
Connector
Serial DebugSCCA
P.15P.15 P.14
I2C
CircuitFan
P.25
Connector
ConnectorTUBA (SOUND)
ConnectorSUTRO (PWR)
Connector Connector
Power Supply& Charger
SERIAL5V
ConnectorULTRA ATA/100
P.18
P.18
P.24
P.22Connector
RGB
COMPOSITE
S-VIDEO
LCD PanelConnector
P.22
LVDS
EDID (I2C)
S-VideoConnector
P.22
TMDS
ConnectorDVI-I
(DDC TOO)
P.19-212.5V167MHZ64BITS
P.15
P.15
P.15
P.15
P.15
P.15
P.14 P.14P.14
P.15
P.14
P.134X AGP
P.10
P.9
P.12
P.11
L3 Cache
P.8
CPU(MPC7455)
APOLLO
P.5-6
P.7
PCI BUS32BITS33MHZ3.3V
ControllerCardBus
Connector
Connector
64MBMAP17NVIDIA
CH. B
(INTERNAL MEM)
MEMORY
CH. D
MEMORY
(INTERNAL MEM)
CH. A(INTERNAL MEM)
MEMORY
CH. C
MEMORY
(INTERNAL MEM)
I2S
CPU PLLConfig
USB PORT E
USB PORT D
USB PORT B
MAXBUS
10/100/1000ETHERNET
400 MB/SFIREWIRE
MEMORY BUS
2:1 DDR MUXES
SO-DIMM Connector
DDR SDRAM DIMM 0
DDR SDRAM DIMM 1
DDR MEMORY
UATA 100 EIDE
33MHZ
64BITS
PCI
CARDSLOT
VIA/PMU
BOOTROM
SYSTEM BLOCK DIAGRAM
FireWire
Inverter
USB PORT F
USB PORT C
Keyboard
TI PCI1510
OPTICAL DRIVE
P.22
AIRPOPT
P.24
P.24
P.25
P.25
TRACKPAD
PMU
LMU
I2C
I2C
ConnectorBattery
SMBUS
3.3V
LEDSLEEP
P.25LMU
U17
BOOT ROM1M X 8P.10
KB LEDLIGHT SENSOR
P.23
P.26CONTROLLERUSB 2.0
U52
P.27
P.27P.28
P.23
P.30
P.31 P.31-35 P.31
P.32
P.29 P.29
INTREPID
CR-2
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 3 44A051-6278
SHUTDOWN: STOPPED
RUN: RUNNINGSLEEP: STOPPED
PG 34
PG 35
RUN: RUNNINGSLEEP: STOPPED
SHUTDOWN: STOPPED
PG 35
PG 20SHUTDOWN: STOPPED
(LTC1778)DC/DC
PG 32
PG 33
PG 31
PG 31
PG 32
PG 32
PG 31
SHUT-DOWNRUNSHUT-DOWN RUN SLEEP
(D3COLD)GPU_VCORE
(D3HOT)GPU_VCORE(AT LTC1778 RUN/SS)
1_5V_2_5V_OK(MAX1715 OUTPUT)
1_5V_2_5V_OK
+1_5V_SLEEP
+2_5V_SLEEP+2_5V_MAIN
SLEEPSLEEP_L_LS5
3V_5V_OK 2.4V - ??? MS
+3V_SLEEP
+5V_SLEEP+3V_MAIN
+5V_MAIN
DCDC_ENDCDC_EN_L
(+1.4V/+1.5V)CPU_VCORE
1M & 0.1UF @14V, IT TAKES~5.88MS TO START SWITCHER
GPU_VCORE
SEQUENCING
DCDC_EN_L
1_5V_2_5V_OK
D3_HOT
D3_HOT
RUN/SSINTERNAL 1.2UA CURRENT SOURCE
1_5V_2_5V_OK WILL NOT PULL LOW UNTIL+5V_MAIN TURNS ON
BECOMES ’1’; MUCH LESS THAN THEDCDC_EN_L OR PMU_POWERUP_L
RC CHARGING AT INT_VCC (5V)
HOWEVER, 5V SHOULD TURN ON ~2.23MS AFTER
DCDC_EN
SLEEPD3_COLD
VCC
TURNS ON AS LOW AS 0.8V/TYP 1.5V
EXT_VCC
SLEEP: D3HOT/D3COLDRUN: RUNNING
+5V_MAIN
+1.35V/+1.2VGPU_VCORE
SEQUENCINGMAXBUS
DCDC_ENSLEEP
VCC SHDN
+5V_MAIN
(MAX1717)DC/DC
BROADCOMMAXBUS
L3 I/OAGP I/OINTREPID CORE
MAP17 DDR CORE MAP17 DDR I/O L3 COREDDR POWER
+2.5V_MAIN
+1.5V_MAIN
+5V_MAIN+4_6V_BU
ON1/ON2
PGOOD
3V_5V_OKPGOOD
(MAX1715)
DC/DCMAIN 2.5V/1.5V
BACKLIGHTINVERTER
TURNS CONTROL TO RUN/SSWHEN IT’S OPEN
WHEN IT’S CONNECTED TO GNDHOLDS BOTH RUN/SS AT GND
NO INRUSH PROTECTIONWHEN ONLY BATTERY IS CONNECTED
+5V_MAIN
14V_PBUS
+3V_PMULDO+3V_PMU
(MAX1772)
CHARGERBATTERY
STBYMD
+3.3V_MAIN
REGULATORBUCK
<~13.44V SHUTS-OFF
>~13.44V TURNS-ON
INRUSHLIMITER
ADAPTER
IN
AC
(UNTIL DRAINED)
POWER BLOCK DIAGRAM
3S 3P PRISMATIC CELLS
& BOOST OUTPUT
FEED-IN PATH
U21-
+
1V20_REF
BACKUP BATTERY
BACKUP
BATTERY
CHARGER INPUT
24V IS OUTPUT ONLY FROM
POWER SYSTEM ARCHITECTURE
SHUTDOWN: STOPPED
RUN: RUNNINGSLEEP: RUNNING
RUN/SS - 3V
SHUTDOWN: STOPPEDSLEEP: RUNNINGRUN: RUNNING
TURNS ON OUTPUT @ 2.4V
WHEN ONLY BATTERY IS CONNECTEDNO INRUSH PROTECTION
+24V_PBUS
+24V_PBUS
+BATT
+BATT
1_5V_2_5V_OK
VCC
+5V_MAIN
DC/DC(LTC3411) +1.8V_MAIN
+5V_MAIN
LOW IN SHUTDOWNDCDC_EN_L WILL PULL ON1/ON2AFTER PMU IS UP AND RUNNING
DCDC_EN_L
VCC
VCC
TURNS ON AT >1V
DC/DC(LTC3707)
MAIN 3V/5V
<100UA ALLOWED
RUN/SS - 5VTURNS ON AT >1V<100UA ALLOWED
INTERNAL ZENER CLAMP TO 6V
INTERNAL ZENER CLAMP TO 6V
RC AT 1M*0.047UF @ 24VSTARTS 2.0MSEC AFTER DCDC_EN_L BECOMES LOW
RC AT 1M*0.1UF @ 24VSTARTS ~4.25MSEC AFTER DCDC_EN_L BECOMES LOW
RUN/SS
BATTERY VOLTAGE
(LTC1625)
SHUTDOWN: RUNNINGSLEEP: RUNNINGRUN: RUNNING
NO AC: BATTERY VOLTAGE1625 NOT RUNNING
~13.5MS
2.6 MS
~11MS
~???MS
+1_5V_MAIN
+1_8V_MAIN
2.6 MS
1.9 MS
PG 30
PG 31
+PBUS (12.8V)
+PBUS (12.8V)
AC: 12.8V
+PBUS
12.8V CHARGES BACKUP BATTERY
BACKUP BATTERY CIRCUIT CHARGES OFF +PBUS
AND PREVENTS +PBUS AND +24V_PBUS FROM DROPPING BELOW 6V
+PBUS
+PBUS
CR-3
255R158ZT7
HOLE-VIA-20R10ZT67
HOLE-VIA-20R10ZT69
HOLE-VIA-20R10ZT68
HOLE-VIA-20R10ZT71
HOLE-VIA-20R10ZT70
HOLE-VIA-20R10ZT72
HOLE-VIA-20R10ZT73
HOLE-VIA-20R10ZT74
HOLE-VIA-20R10ZT76
HOLE-VIA-20R10ZT75
HOLE-VIA-20R10ZT101
HOLE-VIA-20R10ZT103
HOLE-VIA-20R10ZT102
HOLE-VIA-20R10ZT104
HOLE-VIA-20R10ZT105
HOLE-VIA-20R10ZT106
HOLE-VIA-20R10ZT107
HOLE-VIA-20R10ZT108
HOLE-VIA-20R10ZT110
HOLE-VIA-20R10ZT109
HOLE-VIA-20R10ZT111
HOLE-VIA-20R10ZT112
HOLE-VIA-20R10ZT100
HOLE-VIA-20R10ZT114
HOLE-VIA-20R10ZT115
HOLE-VIA-20R10ZT116
235R126ZT4
146R126ZT14
146R126ZT1
OG-503040SH1SHLD-SM
SP1SPKR_CLIP_P84
SP2SPKR_CLIP_P84
SP3SPKR_CLIP_P84
SP4SPKR_CLIP_P84
SP5SPKR_CLIP_P84
BS1STDOFF-217ODX150IDX35H-TH
SP6SPKR_CLIP_P84
235R126ZT5
235R126ZT8
255R158ZT6
HOLE-VIA-20R10ZT18
HOLE-VIA-20R10ZT28
HOLE-VIA-20R10ZT27
HOLE-VIA-20R10ZT26
HOLE-VIA-20R10ZT25
HOLE-VIA-20R10ZT24
HOLE-VIA-20R10ZT23
HOLE-VIA-20R10ZT22
HOLE-VIA-20R10ZT21
255R158ZT3
HOLE-VIA-20R10ZT20
HOLE-VIA-20R10ZT19
HOLE-VIA-20R10ZT29
HOLE-VIA-20R10ZT30
HOLE-VIA-20R10ZT31
HOLE-VIA-20R10ZT32
HOLE-VIA-20R10ZT34
HOLE-VIA-20R10ZT33
HOLE-VIA-20R10ZT35
HOLE-VIA-20R10ZT36
HOLE-VIA-20R10ZT37
HOLE-VIA-20R10ZT39
HOLE-VIA-20R10ZT38
HOLE-VIA-20R10ZT40
HOLE-VIA-20R10ZT41
HOLE-VIA-20R10ZT42
HOLE-VIA-20R10ZT43
HOLE-VIA-20R10ZT44
HOLE-VIA-20R10ZT46
HOLE-VIA-20R10ZT45
HOLE-VIA-20R10ZT47
HOLE-VIA-20R10ZT49
HOLE-VIA-20R10ZT48
HOLE-VIA-20R10ZT50
HOLE-VIA-20R10ZT51
HOLE-VIA-20R10ZT52
HOLE-VIA-20R10ZT54
HOLE-VIA-20R10ZT53
HOLE-VIA-20R10ZT55
HOLE-VIA-20R10ZT56
HOLE-VIA-20R10ZT57
HOLE-VIA-20R10ZT58
HOLE-VIA-20R10ZT59
HOLE-VIA-20R10ZT61
HOLE-VIA-20R10ZT60
HOLE-VIA-20R10ZT62
HOLE-VIA-20R10ZT64
HOLE-VIA-20R10ZT63
HOLE-VIA-20R10ZT65
HOLE-VIA-20R10ZT66
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 4 44A051-6278
CONDUCTIVE MOUNTSLAYER COUNT: 12
GROUND VIAS
ASICS HEATSINK MOUNTS
BOARD INFORMATION
SEE PCB CAD FILES FOR MORE SPECIFIC INFO.
IMPEDANCE : 50 OHMS +/- 10%
1.0 OZ CU THICKNESS: 1.4 MILS 1/2 OZ CU THICKNESS: 0.7 MILS THICKNESS : 1.2 MM / 0.047 IN
DIELECTRIC: FR-4
BOARD STACK-UP AND CONSTRUCTION
SIGNAL (1/2 OZ)
20R10 TH VIA OR VIA IN PAD
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
SIGNAL (1/3 OZ + COPPER PLATING)
SIGNAL (1/2 OZ)
GROUND (1/2 OZ)
GROUND (1/2 OZ)
CUT POWER PLANE(1 OZ)
CUT POWER PLANE(1 OZ)
PREPREG (2MIL)
PREPREG (2MIL)
LAMINATE (3MIL)
LAMINATE (4MIL)
PREPREG (3MIL)
SIGNAL (1/2 OZ)
LAMINATE (4MIL)GROUND (1/2 OZ)
PREPREG (3MIL)
SIGNAL (1/3 OZ + COPPER PLATING)
SIGNAL TRACE WIDTH: 4 MILS
PREPREG THICKNESS: 2-3 MILSSIGNAL TRACE SPACING: 4 MILS
PCB SPECS
LAMINATE (4MIL)
1
2PREPREG (3MIL)
LAMINATE (4MIL)3
4
5
6
7
8
10
9
11
PREPREG (3MIL)12
INVERTERI/O AREA
CHASSIS MOUNTS
BOARD HOLES
SPEAKER CLIPS
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
3
2
1
CHGND1
1 1 1 1 1
1
1
1
1
CHGND6
CHGND2
1
CHGND5
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
CR-4
402MF
1/16W5%
10KR66
402MF
1/16W5%
10KR73
402MF
1/16W5%
10KR37
402MF
1/16W5%
470R13
402MF
1/16W5%
10KR65
2005%1/16WMF
R23
402
402MF
1/16W5%
10KR90
402MF
1/16W5%
1KR38
402MF
1/16W5%
10KR39
402MF
1/16W5%
10KR74
402CERM10V20%0.1UFC76
402CERM10V20%0.1UFC75
402CERM10V20%0.1UFC74
402CERM10V20%0.1UFC203
402CERM10V20%0.1UFC95
402CERM10V20%0.1UFC45
402CERM10V20%0.1UFC109
402CERM10V20%0.1UFC202
402CERM10V20%0.1UFC138
402CERM10V20%0.1UFC110
402CERM10V20%0.1UFC140
402CERM10V20%0.1UFC139
402CERM10V20%0.1UFC51
402CERM10V20%0.1UFC30
402CERM10V20%0.1UFC73
402CERM10V20%0.1UFC238
402CERM10V20%0.1UFC31
402CERM10V20%0.1UFC111
4705%
1/16WMF
R50
402402CERM10V20%0.1UFC173
402CERM10V20%0.1UFC172
402CERM10V20%0.1UFC200
402CERM10V20%0.1UFC174
402CERM10V20%0.1UFC108
402CERM10V20%0.1UFC201
4705%
1/16WMF
R175
402
402MF
1/16W5%
10KR32
402MF
1/16W5%
470R91
402MF
1/16W5%
10KR84
402MF
1/16W5%
1KR56
805CERM6.3V20%10UFC153
805CERM6.3V20%10UFC239
805CERM6.3V20%10UFC141
805CERM6.3V20%10UFC255
402MF
1/16W5%
10KR55
402MF
1/16W5%
10KR44
105%1/16WMF
R5
402
SM11/16W5%
10KRP11
SM11/16W5%
10KRP11
SM11/16W5%
10KRP11
805CERM10V20%2.2UFC180
805CERM10V20%2.2UFC204
TEST5
TEST4
TEST3
NC13
TEST2
TEST1
TEST6
TEST0
PLL_EXT
NC12
NC11NC10NC9NC8
SPARE0SPARE1SPARE2SPARE3
NC6
NC4
NC7
NC1NC2NC3
NC5
EXT_QUAL
PMON_OUT
BMODE0
BMODE1
PMON_IN
MCP
SRESET
HRESET
SMI
INT
CKSTP_OUT
CKSTP_IN
TBEN
QREQ
TEA
QACK
TA
L2_TSTCLK
L1_TSTCLK
LSSD_MODE
TCK
TDO
TDI
TMS
TRST
DTI3
DTI2
PLL_CFG2
PLL_CFG3
DTI1
DTI0
DRDY
PLL_CFG0
PLL_CFG1
DBG
CLK_OUT
BVSEL
SYSCLK
AVDD
TS
BG
BR
HIT
SHD1
CI
WT
TSIZ1
TSIZ0
AACK
SHD0
ARTRY
TSIZ2
TBST
GBL
TT3
TT2
TT1
TT4
AP1
AP2
AP4
AP3
TT0
A35
A34
AP0
A29
A31
A30
A28
A32
A33
A27
A25
A24
A22
A21
A20
A19
A18
A23
A26
A17
A8
A7
A9
A16
A12
A10
A11
A15
A14
A13
A3
A4
A5
A6
A2
A0
A1
OVDD
GND
VDD
APOLLO
(1 OF 3)
U42
1GHZ-1.32VV3.3-NDE5-85C-BGA
402CERM50V5%10PFC77402
MF1/16W5%
0R51
402MF
1/16W5%
10KR518
402MF
1/16W5%
10KR24
603MF
1/16W5%
0R606
603MF
1/16W5%
0R602
+1_5V_SLEEP
+1_8V_SLEEP
4705%1/16WMF
R19
402
402MF
1/16W5%
470R12
SM11/16W5%
10KRP11
402CERM10V20%0.1UFC29
805CERM10V20%2.2UFC9
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 5 44A051-6278
470OHM FOR BOOT BANGER
470OHM FOR BOOT BANGER
MPC7450 PULL-UPS
470OHM FOR BOOT BANGER
RC GLITCH FILTER
PLACE CLOSE TO PIN
NC
NC
NC
NC
NC
NC
MPC7450 MAXBUS
CPU INTERNAL PLL FILTERING
CPU_OVDD DECOUPLING NETWORKCPU_VCORE DECOUPLING NETWORK
NC
NC
NC
NCNC
NCNCNC
NC
NCNCNC
NCNCNC
NC
NC
MORE 0805 10UF CAPS ON VCORE POWER SUPPLY PAGE (PG 32)
21
21
21
21
21
2
1NO_BBANG
21
21
21
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
21
21
21
2
1
2
1
21
21
1
2
63
54
72
2
1
2
1
L2
L11
L9
K14
K12
K10
J15
J13
P14
P12
J11
P10
N15
N13
N11
N9
M14
M12
M10
L15
L13
J9
E1
A5
K8
F4
F1
D1
H3
L1
P5
C1
K4
A9
F8
F9
D8
H10
H6
B10
T1
H1
E4
J7
B7
L3
N8
D6
G1
J8H9D3
A8
G8
L8
L4
Y1
K7
B4
E6
H8
D4
C2
F7
A2
G3
F5
E9
E3
D2
C10
AA15
AA4
Y19
Y17
Y10
C7
Y7
Y5
Y2
V13
V9
V3
U15
U11
U7
U5
C5
T3
R4
P7
N3
M5
L7
K3
J5
H7
G9
B3
G2F11
E11E7D11
D5C11B11
B6
F2
H11G11
A11
B8
F6
J2
H4
J6
A3
K2
L12
L10
K15
K13
AB1
AA17
AA5
Y20
Y15
K11
Y13
Y9
Y3
W7
V15
V12
V8
V5
V2
T13
K9
T9
T7
T4
P3
M6
M3
K5
J3
H5
G7
J14
G4
F10
E5
E2
D7
C9
C3
B5
B1
P15
J12
P13
P11
P9
N14
N12
N10
M13
M11
M9
L14
J10
M4
B9
P6
U3
T5
P2
T6
V1
N1
K6
F3
R1
G6
K1
C4
C6
R3
B2
T2
G5
H2
J1
L6
L5
U1
M1
A6
M2
A7
R2
C8
D9
G10
J4
D10
AA1
V4
N5
W3
W1
W2
U4
AA3
N7
M7
R6
P4
P1
E8
Y4
R5
U6
N6
W4
M8
P8
N2
U2
A10
N4
E10
CRITICAL
2
1
21
21
21
21
1_5V_MAXBUS
21
1_8V_MAXBUS
2
1
BBANG
21
81
2
1
2
1
CR-5
CPU_TT<0>
CPU_AVDD
CPU_BUS_VSEL
CPU_PLL_CFG<0>
CPU_PLL_CFG<1>
CPU_PLL_CFGEXT
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_DBG_L
CPU_EDTI
CPU_DTI<1>
CPU_DTI<0>
JTAG_CPU_TDI
JTAG_CPU_TDO_TP
CPU_DTI<2>
JTAG_CPU_TCK
JTAG_CPU_TRST_L
JTAG_CPU_TMS
CPU_L1TSTCLK
CPU_LSSD_MODE
CPU_L2TSTCLK
CPU_TEA_L
CPU_TA_L
CPU_TBEN
CPU_QREQ_L
CPU_QACK_L
CPU_CHKSTP_OUT_L
MPIC_CPU_INT_L
CPU_CHKS_L
CPU_MCP_L
CPU_SMI_L
CPU_HRESET_L
CPU_SRESET_L
CPU_PMONIN_L
CPU_EMODE0_L
CPU_EMODE1_L
CPU_PULLDOWN
CPU_PULLUP
CPU_SRWX_L
CPU_BR_L
CPU_BG_L
CPU_TS_L
CPU_PULLDOWN
CPU_ADDR<2>
CPU_ADDR<0>
CPU_ADDR<1>
CPU_ADDR<3>
CPU_ADDR<4>
CPU_ADDR<5>
CPU_ADDR<6>
CPU_ADDR<7>
CPU_ADDR<10>
CPU_ADDR<9>
CPU_ADDR<8>
CPU_ADDR<12>
CPU_ADDR<11>
CPU_ADDR<15>
CPU_ADDR<14>
CPU_ADDR<13>
CPU_ADDR<17>
CPU_ADDR<16>
CPU_ADDR<20>
CPU_ADDR<19>
CPU_ADDR<18>
CPU_ADDR<22>
CPU_ADDR<21>
CPU_ADDR<25>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<27>
CPU_ADDR<26>
CPU_ADDR<28>
CPU_ADDR<29>
CPU_ADDR<30>
CPU_ADDR<31>
CPU_TT<1>
CPU_TT<4>
CPU_TT<3>
CPU_TT<2>
CPU_TSIZ<0>
CPU_TBST_L
CPU_TSIZ<1>
CPU_GBL_L
CPU_TSIZ<2>
CPU_AACK_L
CPU_WT_L
CPU_CI_L
CPU_ARTRY_L
CPU_SHD0_L
CPU_SHD1_L
CPU_HIT_L
CPU_VCORE_SLEEP
SYSCLK_CPU
CPU_VCORE_SLEEP
MAXBUS_SLEEP
CPU_DRDY_LCPU_DRDY_L_UF
MAXBUS_SLEEP
JTAG_CPU_TRST_L
CPU_CLKOUT_SPN
CPU_CHKS_L
CPU_SHD1_L
CPU_TBEN
CPU_SHD0_L
CPU_LSSD_MODE
CPU_MCP_L
CPU_CHKSTP_OUT_L
CPU_PMONIN_L
CPU_PULLUP
CPU_EDTI
CPU_PULLDOWN
CPU_L2TSTCLK
CPU_SRWX_L
CPU_EMODE1_L
CPU_HRESET_L
CPU_SMI_L
JTAG_CPU_TMS
JTAG_CPU_TDI
MPIC_CPU_INT_L
CPU_SRESET_L
CPU_L1TSTCLK
JTAG_CPU_TCK
MAXBUS_SLEEP
38
38
38
34
34
34
23
23
23
17
17
17
39
39
39
16
16
39
16
39
39
39
39
23
38
38
9
9
39
23
39
39
39
9
36
36
36
36
23
36
23
23
23
36
36
9
36
36
39
15
30
7
39
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
34
36
34
7
36
7
23
9
39
7
30
23
23
15
39
23
7
9
38
7
7
7
7
7
7
9
5
9
9
5
39
9
5
5
5
5
5
5
9
9
5
9
9
5
5
5
5
5
5
5
5
7
5
5
5
5
9
9
9
5
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
5
5
9
5
9
5
5
9 36
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
(2 OF 3)
APOLLO
D0D1
D6D7
D10
D5
D3D4
D2
D9D8
D11D12D13D14D15D16
D21
D17
D22
D25D24D23
D20D19D18
D26
D35D34D33D32D31D30D29D28D27
D36
D41D40D39
D43
D46D45D44
D42
D38D37
D56D55D54D53D52D51D50D49D48D47
D57
D60D59D58
D61D62
DP3DP4
DP0
DP2
D63
DP1
DP7
DP5DP6
V3.3-NDE5-85C-BGA1GHZ-1.32V
U42
GVDD
L3ECHO_CLK2L3ECHO_CLK3
L3ECHO_CLK1
L3CNTL1*L3CNTL0*
L3ECHO_CLK0
L3CLK1L3CLK0
L3VSEL
(3 OF 3)
APOLLO
L3A1L3A2L3A3L3A4
L3A0
L3A5L3A6L3A7
L3A14L3A13L3A12L3A11L3A10L3A9L3A8
L3A17L3A16L3A15
L3D0L3D1L3D2L3D3L3D4L3D5
L3D14L3D13
L3D6L3D7L3D8L3D9L3D10L3D11L3D12
L3D15
L3D24L3D23
L3D16L3D17L3D18L3D19L3D20L3D21L3D22
L3D25
L3D35L3D34L3D33
L3D26L3D27L3D28L3D29L3D30L3D31L3D32
L3D45L3D44L3D43
L3D36L3D37L3D38L3D39L3D40L3D41L3D42
L3D46
L3D55L3D54
L3D47L3D48L3D49L3D50L3D51L3D52L3D53
L3D56L3D57L3D58L3D59L3D60L3D61L3D62L3D63
L3DP0L3DP1
L3DP7
L3DP2L3DP3L3DP4L3DP5L3DP6
GND
1GHZ-1.32VV3.3-NDE5-85C-BGA
U42
402CERM10V20%0.1UFC237
402CERM10V20%0.1UFC297
402CERM10V20%0.1UFC290
402CERM10V20%0.1UFC265
402CERM10V20%0.1UFC236
402CERM10V20%0.1UFC295
402CERM10V20%0.1UFC171
402CERM10V20%0.1UFC266
402CERM10V20%0.1UFC179
402CERM10V20%0.1UFC296
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U47LT1962-ADJ
MSOP
603CERM10V20%1UFC659
05%1/16WMF
R609
603
05%1/16WMF
R627
603
+1_8V_SLEEP +2_5V_SLEEP
10.7K1%1/16WMF
R639
402
68.1K1%1/16WMF
R644
402
402CERM16V20%
0.01UFC679
805CERM6.3V20%10UFC673
603MF
1/16W5%
0R640
05%1/16WMF
R649
603
+1_5V_SLEEP
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 6 44
A051-6278
L3_OVDD GENERATORTHIS LDO WAS ADDED TO SUPPORT SCHMOO’ING OF L3_OVDD VOLTAGE
LDO OUTPUTS 1.41V (SAME AS P59)
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
PLACE 1 EACH NEAR PINS B15, D12, E19, F15, H17, K17, M19, R15, T17, AND V21 OF CPU
L3 DECOUPLING CAPS
MPC7450 - L3
NC
NC
NC
NC
NC
NC
NC
NC AB5
U8
W5
R8
AA8
AB2
AB3
AA2
Y11
AA11
W16
W9
AB8
AA9
R9
AB14
R7
AB6
AB9
V6
AA12
W6
V16
AA14
W15
R13
U14
W14
AA18
Y16
AB18
Y18
AB17
AB16
AA16
AB10
W8
V14
AA7
Y8
AA6
AB7
Y6
AB4
T8
V7
U9
AA10
AB13
U10
R10
V10
W11
T10
W10
R11
T11
V11
Y12
R14
AB11
AA13
R12
AB12
W12
T12
U13
Y14
W13
U12
T14
AB15CRITICAL
A4
E14
E18
P20
V18
A12
A15
E16
C20
P16
P22
AA22
AB19
U18
W20
T16
C12
E12
A13
G12
AA21
C13
E13
A14
C14
G13
C15
A16
A17
C16
E15
AB21
G14
A18
A19
C18
C19
A20
E17
G15
A21
G16
AA20
B22
D20
F18
C22
H16
E20
D22
G18
M15
R22
W18
P18
R20
T22
U22
T20
R18
M22
M20
M18
M16
U16
N22
N16
N20
N18
U20
T18
W22
V20
R16
Y22
AB20
AA19
L22
L20
C17
V22
K16
J18
H22
J20
J22
K18
K20
L16
F20
J16
E22
H18
G20
F22
G22
H20
K22
L18
D18
D16
D14
D12
B21
B19
Y21
W19
V21
V17
U19
T21
T17
R19
R15
B17
P21
P17
N19
M21
M17
L19
K21
K17
J19
H21
B15
H17
H14
H12
G19
F21
F17
F15
F13
E19
D21
B13
AB22
W21
W17
V19
U21
U17
T19
T15
R21
R17
P19
N21
N17
M19
L21
L17
K19
J21
J17
H19
H15
H13
G21
G17
F19
F16
F14
F12
E21
D19
D17
D15
D13
C21
B20
B18
B16
B14
B12
A22
CRITICAL
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
5
1
7
6
8
4
3
2
NO STUFF
2
1NO STUFF
2
1
NO STUFF
2
1
NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1
NO STUFF
2
1
NO STUFF
21
NO STUFF2
1
CR-6
LTC1962_L3_VIN
CPU_DATA<0>
CPU_DATA<2>
CPU_DATA<1>
CPU_DATA<3>
CPU_DATA<5>
CPU_DATA<4>
CPU_DATA<6>
CPU_DATA<7>
CPU_DATA<8>
CPU_DATA<10>
CPU_DATA<9>
CPU_DATA<12>
CPU_DATA<11>
CPU_DATA<13>
CPU_DATA<15>
CPU_DATA<14>
CPU_DATA<17>
CPU_DATA<16>
CPU_DATA<18>
CPU_DATA<19>
CPU_DATA<20>
CPU_DATA<21>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<25>
CPU_DATA<26>
CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<30>
CPU_DATA<31>
CPU_DATA<33>
CPU_DATA<32>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<41>
CPU_DATA<42>
CPU_DATA<43>
CPU_DATA<44>
CPU_DATA<46>
CPU_DATA<45>
CPU_DATA<47>
CPU_DATA<48>
CPU_DATA<49>
CPU_DATA<51>
CPU_DATA<50>
CPU_DATA<52>
CPU_DATA<53>
CPU_DATA<54>
CPU_DATA<56>
CPU_DATA<55>
CPU_DATA<57>
CPU_DATA<58>
CPU_DATA<59>
CPU_DATA<61>
CPU_DATA<60>
CPU_DATA<62>
CPU_DATA<63>
L3_ECHO_CLK<0>
CPU_L3_VSEL
L3_CNTL<0>
L3_CNTL<1>
L3_CLK<0>
L3_CLK<1>
L3_ECHO_CLK<1>
L3_ECHO_CLK<2>
L3_ECHO_CLK<3>
L3_DATA<63>
L3_DATA<62>
L3_DATA<61>
L3_DATA<60>
L3_DATA<59>
L3_DATA<58>
L3_DATA<55>
L3_DATA<56>
L3_DATA<57>
L3_DATA<54>
L3_DATA<53>
L3_DATA<52>
L3_DATA<51>
L3_DATA<50>
L3_DATA<49>
L3_DATA<48>
L3_DATA<45>
L3_DATA<46>
L3_DATA<47>
L3_DATA<44>
L3_DATA<43>
L3_DATA<42>
L3_DATA<41>
L3_DATA<40>
L3_DATA<39>
L3_DATA<38>
L3_DATA<35>
L3_DATA<36>
L3_DATA<37>
L3_DATA<34>
L3_DATA<33>
L3_DATA<32>
L3_DATA<31>
L3_DATA<30>
L3_DATA<29>
L3_DATA<28>
L3_DATA<25>
L3_DATA<26>
L3_DATA<27>
L3_DATA<24>
L3_DATA<23>
L3_DATA<22>
L3_DATA<21>
L3_DATA<20>
L3_DATA<19>
L3_DATA<18>
L3_DATA<15>
L3_DATA<16>
L3_DATA<17>
L3_DATA<14>
L3_DATA<13>
L3_DATA<12>
L3_DATA<11>
L3_DATA<10>
L3_DATA<0>
L3_DATA<1>
L3_DATA<2>
L3_DATA<3>
L3_DATA<4>
L3_DATA<7>
L3_DATA<6>
L3_DATA<5>
L3_DATA<8>
L3_DATA<9>
L3_ADDR<0>
L3_ADDR<9>
L3_ADDR<10>
L3_ADDR<11>
L3_ADDR<12>
L3_ADDR<15>
L3_ADDR<14>
L3_ADDR<13>
L3_ADDR<8>
L3_ADDR<5>
L3_ADDR<6>
L3_ADDR<7>
L3_ADDR<4>
L3_ADDR<3>
L3_ADDR<2>
L3_ADDR<1>
L3_ADDR<16>
L3_ADDR<17>
L3_OVDD
LT1962_L3_BYP
LT1962_L3_ADJ
LTC1962_L3_VOUT L3_OVDD
38
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
38
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
8
7
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
6
39
38 6
05%1/16WMF
R511
402
05%1/16WMF
R516
402
10K5%1/16WMF
R527
402
10K5%1/16WMF
R513
402
10K5%1/16WMF
R523
402
10K5%1/16WMF
R514
402
47K5%1/16WMF
R535
402
10K5%1/16WMF
R536
402
47K5%
1/16WMF
R538
402
05%1/16WMF
R507
402
05%1/16WMF
R506
402
05%1/16WMF
R505
402
10K5%1/16WMF
R508
402
G
D
S
SOT-3632N7002DWQ28
G
D
SSOT-3632N7002DWQ28
402MF
1/16W5%
22R14
402MF
1/16W5%
22R6
04
SN74AUC1G04
SC70-5
U1
402MF
1/16W5%
22R519
402MF
1/16W5%
22R529
105%
1/16WMF
R528
402
105%
1/16WMF
R509
402
S
D
G
Q262N7002SM
SM2N3904Q25
402MF
1/16W5%
360KR541
05%1/16WMF
R526
402
+3V_SLEEP05%1/16WMF
R525
402
05%1/16WMF
R524
402
05%1/16WMF
R510
402
05%1/16WMF
R512
402
05%1/16WMF
R522
402
05%1/16WMF
R521
402
05%1/16WMF
R515
402
05%1/16WMF
R520
402
05%1/16WMF
R517
402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 7 44A051-6278
PLL SPEED BASED ON 167MHZ - 1GHZ/667MHZ
CPU PLL CONFIG CIRCUITRY
(PROCESSOR)CPU_L3_VSEL
CPU_BUS_VSEL(PROCESSOR)
SIGNAL
(PROCESSOR)CPU_EMODE0_L
CPU_HRESET_L
CPU_HRESET_INV
CPU_HRESET_INV
LOW
LOW
CPU_HRESET_L or INT. PU
1.8V INTERFACE
1.5V INTERFACE
2.5V INTERFACE
1.8V INTERFACE
1.5V INTERFACE
2.5V INTERFACE
HIGH
TIED
CPU_HRESET_L
60X BUS MODE
APPLICATION
MAX BUS MODE
BUSTYPE SELECT
APOLLO ONLY SUPPORTS MAXBUS
INVERTER TO INVERT HRESET_LNEED TO CHARACTERIZE
DESKTOP HAD PROBLEM USING
CPU CONFIGURATION
INVERTED HRESET_L
E ABCD HEX(MHZ)
PLL OFF
133MHZ
(Bus-to-Core)
0.0X
MULTIPLIER
0 1111 0F
CPU_PLL_CFG(AT BUS FREQUENCY)CORE FREQUENCY
R10ER00ER01E
STATE ENCODING CPU_PLL_STOP_OC CPU_VCORE_HI_OC
LOW SPEED 0 0
R00D R10DR01DR10CR00CR01CR10BR00B
PLL DISABLE 1 XHIGH SPEED 0 1
R01BR10AR00AR01A
167MHZ
1.0X PLL BYPASS 0 0011 03
0 0100 042672.0X 333
0 1000 08500 4003.0X
0 1010 0A5336674.0X
0 1001 09
0 1011 0B667
733
833
9175.5X
5.0X
0 1101 0D
0 0101 05
0 0010 02
0 1100 0C
0 0001 011000
1067
867
800
933
1000
1083
1167
1250
1333
6.0X
6.5X
7.0X
7.5X
1 0110 1632004000
3733466728.0X
24.0X
1 1010 1A
0 0000 00
1 1000 18
1 1001 191833
1667
1750
1917
1467
1333
1400
1533
1 1100 1C
1 0001 11
1 1101 1D
1 0101 15
0 1110 0E
1 0000 10
1 0010 12
1 0011 13
1 1011 1B
1 1111 1F
1 0100 14
1667
1600
2667
2400
2267
1800
1733
2133
2000
18672333
2500
2667
2083
2000
3333
3000
2833
2250
2167
3500 2800
16.0X
15.0X
14.0X
10.0X
10.5X
11.0X
12.0X
11.5X
12.5X
13.0X
13.5X
17.0X
18.0X
20.0X
21.0X
1 0111 17120015009.0X
8.0X
8.5X 1417 1133 0 0110 06
15839.5X 1267 0 0111 07
1 1110 1E
CPU CONFIGURATION
CPU FREQUENCY CONFIGURATIONAPOLLO REV 3.0
1.5V INTERFACE
L3 VSEL
2.5V INTERFACE
1.8V INTERFACE
1.5V INTERFACE
MAXBUS VSEL
1.8V INTERFACE
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1
2
1NO STUFF
2
1
4
5
3 1
2
6
2 1
NO STUFF
2 1
1_5V_MAXBUS
4
5
3
2
NO STUFF
2 1
2 1
NO STUFF
2
1
2
1
1_8V_MAXBUS
2
1
3
2
3
121
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1
2
1
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
CR-7
CPU_BUS_VSEL
CPU_HRESET_INV
CPU_L3_VSEL CPU_HRESET_L
CPU_HRESET_INV
CPU_PLL_STOP_OC
CPU_VCORE_HI_OC
CPU_PLL_STOP_BASE
CPU_PLL_FS10
CPU_PLL_FS01
CPU_PLL_CFG<0>
CPU_PLL_CFG<1>
CPU_PLL_CFG<2>
CPU_PLL_CFG<3>
CPU_PLL_CFGEXT
PLL_STOP_L
CPU_PLL_FS00
MAXBUS_SLEEP
CPU_HRESET_L CPU_HRESET_INV
MAXBUS_SLEEP
CPU_EMODE0_L CPU_HRESET_L
38
38
34
34
23
23
17
17
39
16
39
16
39
23
9
23
9
23
7
34
7
7
7
7
5
7
6 5
7
30
30
5
5
5
5
5
5
5 7
5
5 5
402MF
1/16W5%
470R624
402MF
1/16W5%
470R625
+2_5V_SLEEP
1K1%1/16WMF
R645
402
1K1%1/16WMF
R646
402 402CERM10V20%0.1UFC685
402CERM10V20%0.1UFC660
1K1%1/16WMF
R628
402
1K1%1/16WMF
R636
402
402CERM10V20%0.1UFC654
402CERM10V20%0.1UFC663
402CERM10V20%0.1UFC662
402CERM10V20%0.1UFC645
402CERM10V20%0.1UFC648
402CERM10V20%0.1UFC665
402CERM10V20%0.1UFC667
402CERM10V20%0.1UFC664
402CERM10V20%0.1UFC666
402CERM10V20%0.1UFC651
402CERM10V20%0.1UFC672
402CERM10V20%0.1UFC641
402CERM10V20%0.1UFC671
402CERM10V20%0.1UFC640
402CERM10V20%0.1UFC644
402CERM10V20%0.1UFC674
402CERM10V20%0.1UFC650
402CERM10V20%0.1UFC669
402CERM10V20%0.1UFC655
402CERM10V20%0.1UFC649
2491%1/16WMF
R616
402
402CERM10V20%0.1UFC670
402CERM10V20%0.1UFC646
402CERM10V20%0.1UFC638
402CERM10V20%0.1UFC652
402CERM10V20%0.1UFC631
402CERM10V20%0.1UFC647
402CERM10V20%0.1UFC630
402CERM10V20%0.1UFC637
402CERM10V20%0.1UFC675
402CERM10V20%0.1UFC653
805CERM10V20%2.2UFC687
805CERM6.3V20%10UFC661
805CERM6.3V20%10UFC642
805CERM10V20%2.2UFC684
805CERM10V20%2.2UFC639
805CERM10V20%2.2UFC635
805CERM6.3V20%10UFC686
805CERM6.3V20%10UFC636
402MF
1/16W5%
1KR641
SM11/16W
RP4510K5%
SM11/16W
RP4610K5%
2491%1/16WMF
R617
402
NC/SA17
DQ22DQ21
DQ23
DQ28DQ27DQ26DQ25DQ24
DQ29
DQ33
DQ30DQ31DQ32
NC_P9
DQ34DQ35
NC_P2NC_P1
NC_N1
NC_N7NC_N5
NC_N9
NC_K9NC_L1NC_L9NC_M1NC_M9
NC_K2
NC_J1NC_J2NC_J9NC_K1
NC_G9
NC_N10
NC_G10
VSS
CQ1CQ1*CQ2CQ2*
VREF1VREF2
TMSTDITDOTCK
NC_A1
NC_A5NC_A2
NC_A7NC_A10
NC_F10
NC_B10
NC_A11
NC_B7NC_B5
NC_B9
NC_B1
NC_C1NC_C2NC_C9NC_D1
NC_E9NC_F1NC_F9
NC_E1NC_D9
NC_G1
DQ7DQ8
DQ12DQ11DQ10DQ9
DQ13DQ14
DQ17DQ16DQ15
DQ18
DQ20DQ19
SA10SA11
SA13SA14SA15SA16
SA12
LBO*
B2B1
B3
G*
KVDDQ
K*
DQ1
ZQ
DQ0
DQ2DQ3DQ4DQ5DQ6
VDD
SA0SA1
SA5SA6
SA4SA3SA2
SA9SA8SA7
U7300MHZ-128KX36
BGA
NC/SA17
DQ22DQ21
DQ23
DQ28DQ27DQ26DQ25DQ24
DQ29
DQ33
DQ30DQ31DQ32
NC_P9
DQ34DQ35
NC_P2NC_P1
NC_N1
NC_N7NC_N5
NC_N9
NC_K9NC_L1NC_L9NC_M1NC_M9
NC_K2
NC_J1NC_J2NC_J9NC_K1
NC_G9
NC_N10
NC_G10
VSS
CQ1CQ1*CQ2CQ2*
VREF1VREF2
TMSTDITDOTCK
NC_A1
NC_A5NC_A2
NC_A7NC_A10
NC_F10
NC_B10
NC_A11
NC_B7NC_B5
NC_B9
NC_B1
NC_C1NC_C2NC_C9NC_D1
NC_E9NC_F1NC_F9
NC_E1NC_D9
NC_G1
DQ7DQ8
DQ12DQ11DQ10DQ9
DQ13DQ14
DQ17DQ16DQ15
DQ18
DQ20DQ19
SA10SA11
SA13SA14SA15SA16
SA12
LBO*
B2B1
B3
G*
KVDDQ
K*
DQ1
ZQ
DQ0
DQ2DQ3DQ4DQ5DQ6
VDD
SA0SA1
SA5SA6
SA4SA3SA2
SA9SA8SA7
U6300MHZ-128KX36
BGA
+2_5V_SLEEP
+2_5V_SLEEP
+2_5V_SLEEP
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 8 44A051-6278
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
Split caps of same value evenly between SRAM chips
Split caps of same value evenly between SRAM chips
within a SRAM (except
Addr lines swappable
ADDR<0..1>)
NC
NC
Split caps of same value evenly between SRAM chips
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NCNC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
L3 CACHE
Data lines swappable
within a SRAM
Data lines swappable
within a SRAM
SAMSUNG VERIFIED THAT ALL NC PINS ARENOT CONNECTED IN THE SUBSTRATEBALL F9, K9 CONNECTED TO GNDSO BYPASS CAP CAN BE PLACEDDIRECTLY UNDERNEATH THE CHIPS
Split caps of same value evenly between SRAM chips
BALL R3 IS NC ON 4MBIT PARTHAVE TO CONNECT L3_ADDR17 TO THIS PIN
HAVE TO CONNECT L3_ADDR17 TO THIS PINBALL R3 IS NC ON 4MBIT PART
L3 REFERENCE VOLTAGE
21
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
6
5
7
8
3
4
2
1
6
5
7
8
3
4
2
1
2
1
H11
N8
N4
M8
M7
M6
M5
M4
L7
L6
L5
K6
J6
H6
G6
F6
E7
E6
E5
D8
D7
D6
D5
D4
C8
C4
H10
H2
K7
K5
J7
J5
H7
H5
G7
G5
F7
F5
L8
L4
K8
K4
J8
J4
H9
H8
H4
H3
G8
G4
F8
F4
E8
E4
R10
R1
R11
R2
P8
P7
P5
P4
N6
C5
B8
B4
R3
A3
R9
R8
R7
R5
R4
A9
C7
C6
P9
P2
P1
N9
N7
N5
N10
N1
M9
M1
L9
L1
K9
K2
K1
J9
J2
J1
G9
G10
G1
F9
F10
F1
E9
E1
D9
D1
C9
C2
C1
B9
B7
B5
B10
B1
A7
A5
A2
A11
A10
A1
R6
A6
B6
H1
J10
J11
K11
K10
L11
M11
P3
N2
N3
M3
L2
L3
M10
K3
J3
G3
G2
F2
F3
E3
D2
D3
C3
N11
B2
B3
B11
C11
C10
D11
E11
E10
F11
G11
P11
P10
D10
L10
E2
M2
P6
A8
A4
CRITICAL H11
N8
N4
M8
M7
M6
M5
M4
L7
L6
L5
K6
J6
H6
G6
F6
E7
E6
E5
D8
D7
D6
D5
D4
C8
C4
H10
H2
K7
K5
J7
J5
H7
H5
G7
G5
F7
F5
L8
L4
K8
K4
J8
J4
H9
H8
H4
H3
G8
G4
F8
F4
E8
E4
R10
R1
R11
R2
P8
P7
P5
P4
N6
C5
B8
B4
R3
A3
R9
R8
R7
R5
R4
A9
C7
C6
P9
P2
P1
N9
N7
N5
N10
N1
M9
M1
L9
L1
K9
K2
K1
J9
J2
J1
G9
G10
G1
F9
F10
F1
E9
E1
D9
D1
C9
C2
C1
B9
B7
B5
B10
B1
A7
A5
A2
A11
A10
A1
R6
A6
B6
H1
J10
J11
K11
K10
L11
M11
P3
N2
N3
M3
L2
L3
M10
K3
J3
G3
G2
F2
F3
E3
D2
D3
C3
N11
B2
B3
B11
C11
C10
D11
E11
E10
F11
G11
P11
P10
D10
L10
E2
M2
P6
A8
A4
CRITICAL
CR-8
L3_VREF
L3_OVDD
L3_CLK_REF
L3_OVDD
JTAG_L3_TCK
L3_PULLDOWN<1>
L3_PULLDOWN<0>
L3_DQPD<1>
L3_DQPC<1>
L3_DQPB<1>
L3_DQPA<1>
L3_DQPD<0>
L3_DQPC<0>
L3_DQPB<0>
L3_DQPA<0>
L3_PULLDOWN<1>
L3_PULLDOWN<1>
L3_VREF
L3_OVDD
L3_OVDD
L3_OVDDL3_OVDD
L3_ZQ<1>
L3_DATA<44>
L3_DATA<41>
L3_DATA<39>
L3_DATA<46>
L3_DATA<45>
L3_DATA<36>
L3_DATA<33>
L3_DATA<38>
L3_DATA<34>
L3_DATA<37>
L3_DATA<32>
L3_DQPB<1>
L3_DQPA<1>
L3_DQPD<1>
L3_DQPC<1>
L3_ECHO_CLK<2>
L3_ECHO_CLK<3>
JTAG_L3_SRAM2_TDI
JTAG_L3_TMS
JTAG_L3_TDO_TP
JTAG_L3_TCK
L3_DATA<50>
L3_DATA<62>
L3_DATA<51>
L3_DATA<58>
L3_DATA<54>
L3_DATA<56>
L3_DATA<59>
L3_DATA<63>
L3_DATA<53>
L3_DATA<61>
L3_DATA<57>
L3_DATA<52>
L3_DATA<48>
L3_DATA<47>
L3_ADDR<14>
L3_ADDR<5>
L3_ADDR<3>
L3_ADDR<4>
L3_ADDR<2>
L3_ADDR<9>
L3_ADDR<15>
L3_ADDR<17>
L3_PULLDOWN<1>
L3_CNTL<0>
L3_CNTL<1>
L3_CLK<1>
L3_CLK_REF
L3_DATA<35>
L3_DATA<40>
L3_DATA<42>
L3_DATA<49>
L3_DATA<60>
L3_DATA<55>
L3_DATA<43>
L3_ADDR<0>
L3_ADDR<1>
L3_ADDR<12>
L3_ADDR<11>
L3_ADDR<13>
L3_ADDR<10>
L3_ADDR<7>
L3_ADDR<6>
L3_ADDR<8>
L3_ADDR<16>
L3_VREF
L3_ECHO_CLK<1>
L3_ECHO_CLK<0>L3_DATA<30>
L3_DATA<19>
L3_DATA<28>
L3_DATA<25>
L3_DATA<27>
L3_DATA<26>
L3_DATA<15>
L3_DATA<12>
L3_DATA<8>
L3_DATA<13>
L3_DATA<10>
L3_DQPB<0>
L3_DQPA<0>
L3_DQPD<0>
L3_DQPC<0>
JTAG_L3_TDI_TP
JTAG_L3_TMS
JTAG_L3_SRAM2_TDI
JTAG_L3_TCK
L3_DATA<2>
L3_DATA<7>
L3_DATA<11>
L3_DATA<14>
L3_DATA<24>
L3_DATA<29>
L3_DATA<16>
L3_DATA<18>
L3_DATA<21>
L3_DATA<31>
L3_DATA<20>
L3_DATA<22>
L3_DATA<23>
L3_DATA<17>
L3_ADDR<14>
L3_ADDR<5>
L3_ADDR<3>
L3_ADDR<4>
L3_ADDR<2>
L3_ADDR<9>
L3_ADDR<15>
L3_ADDR<17>
L3_PULLDOWN<0>
L3_CNTL<0>
L3_CNTL<1>
L3_PULLDOWN<0>
L3_PULLDOWN<0>
L3_CLK<0>
L3_CLK_REF
L3_ZQ<0>
L3_DATA<5>
L3_DATA<1>
L3_DATA<0>
L3_DATA<6>
L3_DATA<3>
L3_DATA<4>
L3_DATA<9>
L3_ADDR<0>
L3_ADDR<1>
L3_ADDR<12>
L3_ADDR<11>
L3_ADDR<13>
L3_ADDR<10>
L3_ADDR<7>
L3_ADDR<6>
L3_ADDR<8>
L3_ADDR<16>
38 38
38
38
38 38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
8
38
8
39
38
8
8
8 8
36
36
36
36
36
36
36
36
36
36
36
36
36
39
39
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
8
8
8
8
8
8
8
8
36
38
36
36
36
36
36
36
36
8
8
8
8
8
8
8
8
8
8
38
36
36 36
36
36
36
36
36
36
36
36
36
36
39
39
36
36
36
36
36
36
36
36
36
36
36
36
36
36
8
8
8
8
8
8
8
8
8
8
36
38
36
36
36
36
36
36
36
8
8
8
8
8
8
8
8
8
8
8
6
8
6
8
8
8
8
8
8
8
8
8
8
8
8
8
8
6
6
6 6
6
6
6
6
6
6
6
6
6
6
6
8
8
8
8
6
6
8
8
39
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6 6
6
6
6
6
6
6
6
6
6
6
8
8
8
8
39
8
8
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
8
6
6
8
8
6
8
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
1K1%
1/16WMF
R98
402
402CERM6.3V20%
0.22UFC291
402MF
1/16W5%
4.7R178
402MF
1/16W5%
0R104
SM11/16W5%
10KRP25
402MF
1/16W5%
0R122
5111%
1/16WMF
R152
402
10K5%
1/16WMF
R133
402
10K5%
1/16WMF
R134
402
10K5%
1/16WMF
R565
402
10K5%
1/16WMF
R121
402
10K5%
1/16WMF
R111
402
10K5%
1/16WMF
R87
402
10K5%
1/16WMF
R96
402
10K5%
1/16WMF
R587
402
10K5%
1/16WMF
R103
402
10K5%
1/16WMF
R586
402
10K5%
1/16WMF
R578
402
10K5%
1/16WMF
R571
402
10K5%
1/16WMF
R554
402
10K5%
1/16WMF
R558
402
10K5%
1/16WMF
R557
402
10K5%
1/16WMF
R97
402
10K5%
1/16WMF
R120
402
10K5%
1/16WMF
R132
402
10K5%
1/16WMF
R110
402
10K5%
1/16WMF
R139
402
10K5%
1/16WMF
R95
402
10K5%
1/16WMF
R119
402
10K5%
1/16WMF
R102
402
10K5%
1/16WMF
R86
402
10K5%
1/16WMF
R580
402
10K5%
1/16WMF
R572
402
10K5%
1/16WMF
R588
402
10K5%
1/16WMF
R595
402
10K5%
1/16WMF
R559
402
10K5%
1/16WMF
R579
402
10K5%
1/16WMF
R566
402
10K5%
1/16WMF
R555
402
10K5%
1/16WMF
R131
402
10K5%
1/16WMF
R101
402
10K5%
1/16WMF
R138
402
10K5%
1/16WMF
R117
402
10K5%
1/16WMF
R109
402
10K5%
1/16WMF
R118
402
10K5%
1/16WMF
R85
402
10K5%
1/16WMF
R589
402
10K5%
1/16WMF
R596
402
10K5%
1/16WMF
R567
402
10K5%
1/16WMF
R581
402
10K5%
1/16WMF
R573
402
10K5%
1/16WMF
R582
402
10K5%
1/16WMF
R556
402
10K5%
1/16WMF
R94
402
10K5%
1/16WMF
R560
402
10K5%
1/16WMF
R137
402
10K5%
1/16WMF
R129
402
10K5%
1/16WMF
R108
402
10K5%
1/16WMF
R92
402
10K5%
1/16WMF
R93
402
10K5%
1/16WMF
R130
402
10K5%
1/16WMF
R116
402
10K5%
1/16WMF
R100
402
10K5%
1/16WMF
R597
402
10K5%
1/16WMF
R574
402
10K5%
1/16WMF
R591
402
10K5%
1/16WMF
R562
402
10K5%
1/16WMF
R561
402
10K5%
1/16WMF
R590
402
10K5%
1/16WMF
R583
402
10K5%
1/16WMF
R568
402
(PLL6)VSSA_7
(PLL6)VDD15A_7
D_42
D_41
D_40
D_39
D_38
D_44
D_43
D_45
D_46
D_47
D_48
D_52
D_51
D_50
D_49
D_53
D_55
D_54
D_56
D_57
D_58
D_60
D_59
D_62
D_61
D_63
DBG
DRDY
DTI_0
TEA
TA
DTI_2
DTI_1
D_1
D_0
D_2
D_6
D_5
D_4
D_3
D_7
D_11
D_10
D_9
D_8
D_12
D_14
D_13
D_15
D_16
D_17
D_22
D_21
D_20
D_19
D_18
D_23
D_24
D_25
D_26
D_27
D_32
D_31
D_30
D_29
D_28
D_34
D_33
D_35
D_36
D_37
BR
(1 OF 9)
MAXBUS
INTERFACE
TS
BG
A_0
A_1
A_2
A_3
A_4
A_5
A_9
A_6
A_7
A_8
A_10
A_14
A_13
A_12
A_11
A_20
A_16
A_17
A_18
A_19
A_15
A_27
A_22
A_21
A_30
A_29
A_28
A_26
A_25
A_24
A_23
TT_2
TT_1
TT_0
A_31
TBST
TSIZ_0
TSIZ_1
TSIZ_2
CI
GBL
TT_4
AACK
QREQ
ARTRY
TT_3
WT
HIT
ANALYZER_CLK
SUSPENDACK
SUSPENDREQ
QACK
STOPCPUCLK
CPU_FB_OUT
CPU_FB_IN
CPU_CLK
TBEN
ACS_REF
BGA
INTREPID-REV2.1U44
05%
1/16WMF
R176
402
402MF
1/16W5%
0R168
05%
1/16WMF
R162
402
402MF
1/16W5%
0R161
402MF
1/16W5%
0R177
402MF
1/16W5%
0R151
SM11/16W5%
10KRP25
SM11/16W5%
10KRP24
SM11/16W5%
10KRP24
SM11/16W5%
10KRP24
SM11/16W5%
10KRP22
SM11/16W5%
10KRP22
SM11/16W5%
10KRP22
SM11/16W5%
10KRP22
SM11/16W5%
10KRP25
SM11/16W5%
10KRP24
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 9 44A051-6278
DDR_TPDModeEnable_h
0: TDI input (JTAG)
1: TDI output
Spare
Spare
Spare
Spare
MODE C (2.0X) IS FOR CLOCK SLEW OPERATIONMODE A (2.5X) IS FOR STATIC OPERATION
011: 99.84MHZ (1.5X)010: 133.12MHZ (2.0X)001: 149.76MHZ000: 166.4MHZ (2.5X)
FB BUFFER HAS 50 OHM OUTPUT IMPEDANCE
MAXBUS PULL-UPS
0: Legacy interface
1: B-mode interface
FireWire PHY interface
PCI1_REQ1_L / PCI1_GNT1_L
PCI1_REQ2_L / PCI1_GNT2_L
PCI1_REQ0_L / PCI1_GNT0_L
Spare
1: GPIOs
0: REQ/GNT
1: GPIOs
0: REQ/GNT
1: GPIOs
0: REQ/GNT
Processor Bus Mode
1: 60x bus (G3)
0: Max Bus (G4)
BIT 56 TO 63
INTREPID BOOT STRAPS
LONG = 1" LONGER THAN MATCHED LENGTHSHORT = 1" SHORTER THAN MATCHED LENGTH
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - ?
NO BUS KEEPER - ?
INPUT - PU
INPUT - PD
NO BUS KEEPER - PU
NO BUS KEEPER - PU
NO BUS KEEPER - PU
INPUT - PU
NO BUS KEEPER - PU
NO BUS KEEPER
NO BUS KEEPER
Vout = MaxBus rail (1.8V)Vin = Intrepid Vcore (1.5V)
BIT2 BIT1 BIT0
BIT0BIT1BIT2
001: 50 ohm
101: 40 ohm
010: 100 ohm
100: 200 ohm
000: 200 ohm
110: 66.6 ohm
011: 33.3 ohm
111: 28.6 ohm
MaxBus output impedance
100: 83.20MHZ
PLL4MODESEL_NXT[2:0]
1: External source
0: PLL5
SelPLL4ExtSrc
1: Active
INTREPID OUTPUTS HIGH BY DEFAULT
INTREPID BOOT STRAPS
BUF_REF_CLK_OUTEnable_h
0: Inactive
1: Active
0: Normal 1394b
1: TI PHY workaround
TI 1394b workaround
Spare
Spare
BIT 48 TO 55
0: Inactive
InternalSpreadEn
BIT 40 TO 47
PCI1 Source Clock
PCI0 Source Clock
AnalyzerClk_En_h
1: Active
0: Inactive
DDR_TPDEn_Pol
1: Active low
0: Active high
0: Active high
ExtPLL_SDwn_Pol
1: Active low
Spare
Spare
BIT 32 TO 39
Spare
Spare
NO BUS KEEPER - PU
Intrepid MaxBus
1/ D47 - SELAGPSPREADCLK - SLEEP/WAKE CYCLE REQUIRED2/ D46 - SELPCI1SPREADCLK - SLEEP/WAKE CYCLE REQUIRED3/ D44 - PLL4MODESEL_NXT<0> - SLEEP/WAKE CYCLE REQUIRED4/ D43 - PLL4MODESEL_NXT<1> - SLEEP/WAKE CYCLE REQUIRED5/ D42 - PLL4MODESEL_NXT<2> - SLEEP/WAKE CYCLE REQUIRED6/ D33 - ANALYZERCLK_EN_H - IMMEDIATE EFFECT
THE FOLLOWING STRAP BITS CAN BECHANGED BY SOFTWARE:
IF A STRAP IS NOT LISTED, THENIT CANNOT BE CHANGED BY SOFTWARE
INPUT
NO BUS KEEPER - PU
1: PLL4
0: PLL5 (NO SPREAD)
0: PLL5 (NO SPREAD)
1: PLL4
2
1
2
1
21
21
72
2 1
2
1
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1
2
1
2
1NO_SSCG
2
1
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1SSCG
2
1
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1NO STUFF
2
1
2
1NO STUFF
2
1NO STUFF
2
1
2
1SSCG
2
1
2
1NO STUFF
2
1
2
1
2
1
2
1NO STUFF
2
1NO_SSCG
2
1SSCG
2
1NO_SSCG
2
1NO STUFF
2
1
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1
2
1
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
D28
H25
H26
J25
D27
B28
G25
E25
D26
H24
G24
B27
E28
A28
A31
E27
AK9
AM8
AH9
A32
G27
B31
A29
D11
E12
A8
G20
B20
G19
E19
A9
D19
A20
J19
B19
H19
A19
A18
D18
B18
E18
B8
B17
A17
G18
D17
H18
J18
A16
E17
B16
A15
B9
H17
B15
G17
E16
D16
A13
A14
D15
J16
E15
H11
G16
A12
B14
D14
H15
B13
G15
B12
E14
H14
E11
G14
A11
D13
B11
G13
E13
D12
A10
J13
B10
G12
D10
B30
D29
K25
G28
A30H16
J24
J15
G26
E29
E26
E23
A25
D23
A26
B26
G23
A21
D20
E24
B21
E20
A22
H21
B22
H20
A23
D21
A24
E21
A27
G21
J21
E22
B23
B24
D22
G22
H22
B25
J22
D25
D24
H23
G8
H13
B29
CRITICAL
2
1NO STUFF
21
2
1
21
NO STUFF
21 21
NO STUFF
63
81
54
72
72
81
63
54
54
63
CR-9
CPU_GBL_L
+1_5V_INTREPID_PLL7
INTREPID_ACS_REF
CPU_TBEN
CPU_CLK_EN
SYSCLK_LA_TP
INT_CPUFB_OUT
INT_SUSPEND_ACK_L
INT_SUSPEND_REQ_L
CPU_QACK_L
CPU_QREQ_L
CPU_ARTRY_L
CPU_HIT_L
CPU_AACK_L
CPU_WT_L
CPU_TT<3>
CPU_TT<4>
CPU_TT<2>
CPU_TT<0>
CPU_TT<1>
CPU_TSIZ<1>
CPU_TSIZ<2>
CPU_TSIZ<0>
CPU_TBST_L
CPU_CI_L
CPU_ADDR<31>
CPU_ADDR<30>
CPU_ADDR<28>
CPU_ADDR<29>
CPU_ADDR<27>
CPU_ADDR<26>
CPU_ADDR<25>
CPU_ADDR<23>
CPU_ADDR<24>
CPU_ADDR<21>
CPU_ADDR<22>
CPU_ADDR<20>
CPU_ADDR<18>
CPU_ADDR<19>
CPU_ADDR<17>
CPU_ADDR<16>
CPU_ADDR<15>
CPU_ADDR<13>
CPU_ADDR<14>
CPU_ADDR<11>
CPU_ADDR<12>
CPU_ADDR<10>
CPU_ADDR<9>
CPU_ADDR<8>
CPU_ADDR<7>
CPU_ADDR<6>
CPU_ADDR<5>
CPU_ADDR<4>
CPU_ADDR<3>
CPU_ADDR<2>
CPU_ADDR<0>
CPU_ADDR<1>
CPU_TS_L
CPU_BG_L
CPU_BR_LCPU_DATA<1>
CPU_DATA<0>
CPU_DATA<3>
CPU_DATA<4>
CPU_DATA<2>
CPU_DATA<5>
CPU_DATA<6>
CPU_DATA<8>
CPU_DATA<9>
CPU_DATA<7>
CPU_DATA<10>
CPU_DATA<11>
CPU_DATA<13>
CPU_DATA<12>
CPU_DATA<14>
CPU_DATA<15>
CPU_DATA<16>
CPU_DATA<18>
CPU_DATA<17>
CPU_DATA<19>
CPU_DATA<21>
CPU_DATA<20>
CPU_DATA<22>
CPU_DATA<23>
CPU_DATA<24>
CPU_DATA<26>
CPU_DATA<25>
CPU_DATA<27>
CPU_DATA<28>
CPU_DATA<29>
CPU_DATA<31>
CPU_DATA<30>
CPU_DATA<32>
CPU_DATA<33>
CPU_DATA<34>
CPU_DATA<35>
CPU_DATA<36>
CPU_DATA<37>
CPU_DATA<38>
CPU_DATA<39>
CPU_DATA<40>
CPU_DATA<42>
CPU_DATA<41>
CPU_DATA<43>
CPU_DATA<45>
CPU_DATA<44>
CPU_DATA<46>
CPU_DATA<47>
CPU_DATA<49>
CPU_DATA<50>
CPU_DATA<48>
CPU_DATA<51>
CPU_DATA<52>
CPU_DATA<54>
CPU_DATA<53>
CPU_DATA<55>
CPU_DATA<56>
CPU_DATA<57>
CPU_DATA<59>
CPU_DATA<58>
CPU_DATA<60>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<63>
CPU_DBG_L
CPU_DRDY_L
CPU_DTI<0>
CPU_DTI<1>
CPU_DTI<2>
CPU_TA_L
CPU_TEA_L
+1_5V_INTREPID_PLL
MAXBUS_SLEEP
MAXBUS_SLEEP
CPU_DATA<39>
CPU_DATA<38>
CPU_DATA<37>
CPU_DATA<36>
CPU_DATA<35>
CPU_DATA<34>
CPU_DATA<33>
CPU_DATA<46>
CPU_DATA<55>
CPU_DATA<54>
CPU_DATA<45>
CPU_DATA<44>
CPU_DATA<43>
CPU_DATA<42>
CPU_DATA<41>
CPU_DATA<40>
CPU_DATA<53>
CPU_DATA<52>
CPU_DATA<51>
CPU_DATA<50>
CPU_DATA<49>
CPU_DATA<48>
CPU_DATA<32>
INT_CPUFB_IN
INT_CPUFB_OUT_NORM
INT_CPUFB_IN_NORM
INT_CPUFB_LONG
CPU_DATA<47>
CPU_DATA<63>
CPU_DATA<62>
CPU_DATA<61>
CPU_DATA<60>
CPU_DATA<59>
MAXBUS_SLEEP
CPU_DATA<58>
CPU_DATA<57>
CPU_DATA<56>
CPU_TA_L
CPU_TS_L
CPU_BR_L
CPU_ARTRY_L
CPU_DRDY_L
CPU_HIT_L
CPU_AACK_L
CPU_TEA_L
CPU_DBG_L
CPU_BG_L
MAXBUS_SLEEP
CPU_QREQ_L
INT_CPUFB_IN
SYSCLK_CPU_UFSYSCLK_CPU
INT_CPUFB_OUT INT_CPUFB_OUT_SHORT
MAXBUS_SLEEP
38
38
38
38
38
34
34
34
34
34
23
23
23
23
23
17
17
17
17
17
16
16
16
16
16
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
9
9
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
9
36
36
36
36
36
36
36
36
36
36
36
36
36
9
36
9
36
36
36
9
9
9
9
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
9
9
9 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
36
36
36
9
9
15
7
7
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
36
9
9
9
9
9
9
7
9
9
9
9
9
9
9
9
9
9
9
9
9
7
9
36
36
36
7
5
38
5
30
9
30
30
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5 6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
5
5
5
5
5
5
5
13
5
5
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
9
36
36
36
6
6
6
6
6
6
5
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
9
36 5
9 36
5
10K5%
1/16WMF
R773
402
402MF
1/16W5%
22R188
1K1%1/16WMF
R154
402
10K1%
1/16WMF
R153
402
402CERM10V20%
0.1UFC224
10K1%
1/16WMF
R144
402
FEPR-1MX8
VCCVPP
DQ7
DQ4DQ3DQ2
DQ5DQ6
DQ1DQ0
GNDPWDWPWEOECE
A19A18A17
A20
A16A15A14A13A12A11A10
A7A8A9
A5A4A3A2
A6
A1A0
U173.3VTSOP
805CERM10V20%2.2UFC441
402CERM10V20%0.1UFC451
402CERM10V20%0.1UFC459
10K5%
1/16WMF
R312
402
+3V_MAIN
(2 OF 9)
DDR_VREF_1
DDR_VREF_0
DDR_DATA_0
DDR_DATA_1
DDR_DATA_2
DDR_DATA_3
DDR_DATA_4
DDR_DATA_5
DDR_DATA_6
DDR_DATA_7
DDR_DATA_8
DDR_DATA_9
DDR_DATA_10
DDR_DATA_11
DDR_DATA_12
DDR_DATA_13
DDR_DATA_14
DDR_DATA_15
DDR_DATA_16
DDR_DATA_17
DDR_DATA_18
DDR_DATA_19
DDR_DATA_20
DDR_DATA_21
DDR_DATA_25
DDR_DATA_26
DDR_DATA_27
DDR_DATA_28
DDR_DATA_29
DDR_DATA_30
DDR_DATA_33
DDR_DATA_34
DDR_DATA_35
DDR_DATA_36
DDR_DATA_37
DDR_DATA_38
DDR_DATA_39
DDR_DATA_40
DDR_DATA_41
DDR_DATA_42
DDR_DATA_43
DDR_DATA_44
DDR_DATA_45
DDR_DATA_46
DDR_DATA_47
DDR_DATA_48
DDR_DATA_49
DDR_DATA_50
DDR_DATA_51
DDR_DATA_52
DDR_DATA_53
DDR_DATA_54
DDR_DATA_55
DDR_DATA_56
DDR_DATA_57
DDR_DATA_58
DDR_DATA_59
DDR_DATA_60
DDR_DATA_61
DDR_DATA_62
DDR_DATA_63
DDR_DATA_22
DDR_DATA_23
DDR_DATA_24
DDR_DATA_31
DDR_DATA_32
DDR_BA_0
DDR_BA_1
DDRCS_3
DDRCS_2
DDRCS_1
DDRCS_0
DDR_DQS_7
DDR_DQS_6
DDR_DQS_5
DDR_DQS_4
DDR_DQS_3
DDR_DQS_2
DDR_DQS_1
DDR_DQS_0
DDR_DM_7
DDR_DM_6
DDR_DM_5
DDR_DM_4
DDR_DM_3
DDR_DM_2
DDR_DM_1
DDR_DM_0
DDRRAS
DDRCAS
DDRWE
DDRCKE0
DDRCKE1
DDRCKE2
DDRCKE3
DDR_MCLK_0_P
DDR_MCLK_0_N
DDR_MCLK_1_P
DDR_MCLK_1_N
DDR_MCLK_2_P
DDR_MCLK_2_N
DDR_MCLK_3_P
DDR_MCLK_3_N
DDR_MCLK_4_P
DDR_MCLK_4_N
DDR_MCLK_5_P
DDR_MCLK_5_N
DDR_REF
DDR_SELHI_0
DDR_SELHI_1
DDR_SELLO_0
DDR_SELLO_1
MEMORYDDR
INTERFACE
DDR_A_10
DDR_A_11
DDR_A_12
DDR_A_9
DDR_A_8
DDR_A_7
DDR_A_6
DDR_A_5
DDR_A_4
DDR_A_3
DDR_A_2
DDR_A_1
DDR_A_0
BGAINTREPID-REV2.1
U44
10K5%
1/16WMF
R268
402
402MF
1/16W5%
1KR280
SM11/16W5%
22RP31
SM11/16W5%
22RP31
SM11/16W5%
22RP32
SM11/16W5%
22RP32
SM11/16W5%
22RP31
SM11/16W5%
22RP32
402MF
1/16W5%
22R199
SM11/16W5%
22RP31
SM11/16W5%
22RP32
SM11/16W5%
22RP34
SM11/16W5%
22RP33
SM11/16W5%
22RP34
SM11/16W5%
22RP34
SM11/16W5%
22RP34
SM11/16W5%
22RP33
SM11/16W5%
22RP33
SM11/16W5%
22RP33
SM11/16W5%
22RP30
SM11/16W5%
22RP26
SM11/16W5%
22RP26
SM11/16W5%
22RP26SM1
1/16W5%
22RP26
SM11/16W5%
22RP29
SM11/16W5%
22RP29
SM11/16W5%
22RP30
SM11/16W5%
22RP29
SM11/16W5%
22RP30
SM11/16W5%
22RP30
SM11/16W5%
22RP27
SM11/16W5%
22RP29
SM11/16W5%
22RP27
SM11/16W5%
22RP27
SM11/16W5%
22RP27
+3V_MAIN
10K5%
1/16WMF
R770
402
10K5%
1/16WMF
R771
402
10K5%
1/16WMF
R772
402
TABLE_5_ITEM
CRITICAL ?341S1193 1 BOOTROM,P84 U17
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 10 44A051-6278
SERIES RESISTORS FOR CLOCK/CONTROL SIGNALS
INT - DDR/BOOTROM
CLOCKS
PINS ARE SWAPABLE FOR RPAKS
CS
CKE
ADDR
BA
CNTL
’0’S ARE SAME POLARITY (ACTIVE-LO)’1’S ARE SAME POLARITY (ACTIVE-HI)
’0’ & ’1’ GO TO SLOT A’2’ & ’3’ GO TO SLOT B
’0’ & ’1’ GO TO SLOT A’2’ & ’3’ GO TO SLOT B
MEM_VREF
INTERCEPTS ROM CHIP SELECTOVERRIDE ROM MODULE
1MB BOOT ROM
2.5V I/O SHUTS OFFCKE STAYS LOW AFTER INTREPIDPULL-DOWN RESISTORS TO ENSURE
2
1
21
2
1
2
1
2
1
2
1
12
9
11 3130
10
24
3923
35
34
33
32
28
27
26
25
22
7
8
14
15
16
17
18
38
19
37
13
40
1
2
3
4
5
6
36
20
21
OMIT
2
1
2
1
2
1
2
1
T22
Y22
T32
N30
AE29
AB32
AA22
W35
W36
V33
V32
W32
W33
Y30
W30
Y35
Y36
Y32
Y33
L32
N29
P32
V30
AB30
AD32
AH31
AJ31
L33
N32
T33
T35
AC35
AD33
AH33
AJ33
AG35
AG33
AJ36
K35
K36
J36
K33
AJ35
K32
J35
J33
J32
M30
N33
L36
M33
M35
L35
AJ32
M36
N35
R32
R33
R35
R36
P36
P35
R30
P33
AK36
T36
U35
U36
T30
V35
U32
U33
V36
AB33
AA32
AK35
AC36
AB35
AB36
AA33
AA35
AA36
AD35
AD36
AE33
AE35
AK31
AE36
AF36
AF35
AE32
AG31
AG32
AH32
AH36
AG36
AH35
AK33
AK32
M29
L30
H36
D36
G32
E36
E35
F35
F36
G36
D35
H33
G33
G35
H35
K30
L29
AL33
AL35
AN36
AN34
AL36
AM36
AM35
AN35
H32
CRITICAL
2
1
21
54
63
81
72
72
63
21
81
54
81
54
63
72
54
72
81
63
81
81
72
63
54
81
72
63
54
54
72
54
63
81
72
63
2
1
2
1
2
1
CR-10
ROM_WP_L
ROM_ONBOARD_CS_LROM_CS_L
INT_RESET_L
ROM_RW_L
ROM_OE_L
PCI_AD<0>
PCI_AD<1>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<2>
PCI_AD<20>
PCI_AD<3>
PCI_AD<4>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<24>
PCI_AD<25>
PCI_AD<26>
PCI_AD<27>
PCI_AD<28>
PCI_AD<29>
PCI_AD<30>
PCI_AD<31>
INT_MEM_REF_H
INT_MEM_VREF
INT_DDRCLK2_N_TP
INT_DDRCLK2_P_TP
INT_DDRCLK5_P_TP
SYSCLK_DDRCLK_B0_UF
SYSCLK_DDRCLK_B0_L_UF
SYSCLK_DDRCLK_B1_UF
SYSCLK_DDRCLK_B1_L_UF
SYSCLK_DDRCLK_A0_L_UF
SYSCLK_DDRCLK_A0_UF
SYSCLK_DDRCLK_A1_UF
SYSCLK_DDRCLK_A1_L_UF
INT_DDRCLK5_N_TP
MEM_MUXSEL_L<0>
MEM_DATA<0>
MEM_DATA<1>
MEM_DATA<2>
MEM_DATA<3>
MEM_DATA<4>
MEM_DATA<5>
MEM_DATA<6>
MEM_DATA<7>
MEM_DATA<8>
MEM_DATA<9>
MEM_DATA<10>
MEM_DATA<11>
MEM_DATA<12>
MEM_DATA<13>
MEM_DATA<14>
MEM_DATA<16>
MEM_DATA<17>
MEM_DATA<18>
MEM_DATA<19>
MEM_DATA<20>
MEM_DATA<21>
MEM_DATA<22>
MEM_DATA<23>
MEM_DATA<26>
MEM_DATA<27>
MEM_DATA<28>
MEM_DATA<30>
MEM_DATA<32>
MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<35>
MEM_DATA<36>
MEM_DATA<37>
MEM_DATA<38>
MEM_DATA<39>
MEM_DATA<40>
MEM_DATA<41>
MEM_DATA<42>
MEM_DATA<43>
MEM_DATA<44>
MEM_DATA<45>
MEM_DATA<46>
MEM_DATA<47>
MEM_DATA<48>
MEM_DATA<49>
MEM_DATA<50>
MEM_DATA<51>
MEM_DATA<52>
MEM_DATA<53>
MEM_DATA<55>
MEM_DATA<56>
MEM_DATA<57>
MEM_DATA<58>
MEM_DATA<59>
MEM_DATA<60>
MEM_DATA<61>
MEM_DATA<62>
MEM_DATA<63>
MEM_DATA<15>
MEM_DATA<24>
MEM_DATA<25>
MEM_DATA<29>
MEM_DATA<31>
MEM_DATA<54>
MEM_BA<0>
MEM_BA<1>
MEM_CS_L<3>
MEM_CS_L<0>
MEM_CS_L<1>
MEM_CS_L<2>
MEM_DQS<0>
MEM_DQS<1>
MEM_DQS<2>
MEM_DQS<3>
MEM_DQS<4>
MEM_DQS<5>
MEM_DQS<6>
MEM_DQS<7>
MEM_DQM<2>
MEM_DQM<0>
MEM_DQM<1>
MEM_DQM<3>
MEM_DQM<4>
MEM_DQM<5>
MEM_DQM<6>
MEM_DQM<7>
MEM_RAS_L
MEM_CAS_L
MEM_WE_L
MEM_CKE<0>
MEM_CKE<1>
MEM_CKE<2>
MEM_CKE<3>
MEM_MUXSEL_H<0>
MEM_MUXSEL_H<1>
MEM_MUXSEL_L<1>
MEM_ADDR<0>
MEM_ADDR<1>
MEM_ADDR<2>
MEM_ADDR<3>
MEM_ADDR<4>
MEM_ADDR<5>
MEM_ADDR<6>
MEM_ADDR<7>
MEM_ADDR<8>
MEM_ADDR<9>
MEM_ADDR<10>
MEM_ADDR<11>
MEM_ADDR<12>
INT_MEM_VREF
SYSCLK_DDRCLK_A1_UF SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A0_UF SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A1_L_UF SYSCLK_DDRCLK_A1_L
SYSCLK_DDRCLK_B1_UF SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B0_UF SYSCLK_DDRCLK_B0
MEM_CS_L<0> RAM_CS_L<0>
SYSCLK_DDRCLK_A0_L_UF SYSCLK_DDRCLK_A0_L
SYSCLK_DDRCLK_B1_L_UF SYSCLK_DDRCLK_B1_L
SYSCLK_DDRCLK_B0_L_UF SYSCLK_DDRCLK_B0_L
MEM_CS_L<1> RAM_CS_L<1>
MEM_CS_L<2> RAM_CS_L<2>
MEM_CKE<0> RAM_CKE<0>
MEM_CKE<2> RAM_CKE<2>
MEM_CS_L<3> RAM_CS_L<3>
MEM_CKE<1> RAM_CKE<1>
MEM_CKE<3> RAM_CKE<3>
MEM_ADDR<0> RAM_ADDR<0>
MEM_ADDR<2> RAM_ADDR<2>
MEM_ADDR<4> RAM_ADDR<4>
MEM_ADDR<6> RAM_ADDR<6>
MEM_ADDR<1> RAM_ADDR<1>
MEM_ADDR<3> RAM_ADDR<3>
MEM_ADDR<5> RAM_ADDR<5>
MEM_ADDR<7> RAM_ADDR<7>
MEM_ADDR<8> RAM_ADDR<8>
MEM_ADDR<10> RAM_ADDR<10>
MEM_ADDR<12> RAM_ADDR<12>
MEM_ADDR<9> RAM_ADDR<9>
MEM_ADDR<11> RAM_ADDR<11>
MEM_BA<0> RAM_BA<0>
MEM_BA<1> RAM_BA<1>
RAM_CAS_LMEM_CAS_L
MEM_WE_L RAM_WE_L
RAM_RAS_LMEM_RAS_L
+2_5V_INTREPID
RAM_CKE<3>
RAM_CKE<2>
RAM_CKE<1>
RAM_CKE<0>
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
38
39
39
39
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
36
36
36
36
17
36
36
36
36
39 24
30
24
24
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 12
36 12
36 36
36 12
36 12
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
36 36
16
12
12
12
12
24 13
14
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
38
10
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
11
11
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 10
10 10
10 12
10 10
10 10
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
10 12
12 10
10 12
12 10
11
10
10
10
10
402CERM10V20%0.1UFC706
402CERM10V20%0.1UFC712
402CERM10V20%0.1UFC717
402CERM10V20%0.1UFC700
402CERM10V20%0.1UFC701
402CERM10V20%0.1UFC699
402CERM10V20%0.1UFC716
402CERM10V20%0.1UFC711
402CERM10V20%0.1UFC705
402CERM10V20%0.1UFC707
402CERM10V20%0.1UFC691
402CERM10V20%0.1UFC698
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U14CBTV4020
BGA
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U13CBTV4020
BGA
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U12CBTV4020
BGA
GND
DA10 SEL
DH19
DH18
DH17
DH16
DH15
DH14
DH13
DH12
DH11
DH10
DH9
DH8
DH7
DH6
DH5
DH4
DH3
DH2
DH1
DH0
DA19
DA18
DA17
DA16
DA15
DA14
DA13
DA12
DA11DB0*
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
DB19*
DB18*
DB17*
DB16*
DB15*
DB14*
DB13*
DB12*
DB11*
DB10*
DB9*
DB8*
DB7*
DB6*
DB5*
DB4*
DB3*
DB2*
DB1*
VDD
U11CBTV4020
BGA
402MF
1/16W5%
0R192
402MF
1/16W5%
0R202
402MF
1/16W5%
0R193
402MF
1/16W5%
0R189
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 11 44A051-6278
MEM_MUXSEL_H<0> AND MEM_MUXSEL_L<0> ARE ACTIVE LOW
BIT 0..15 BIT 16..31 BIT 32..47 BIT 48..63
16BIT 2:1 DDR MUXES
SEL = HIGH; HOST = A PORT; B PORT = 100OHM TO GNDSEL = LOW; HOST = B PORT; A PORT = 100OHM TO GND
ADDED 0 OHM RESISTORS IN CASE POLARITY IS WRONG
MEM_MUXSEL_H<1> AND MEM_MUXSEL_L<1> ARE ACTIVE HIGH
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
CRITICAL F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
CRITICAL F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
CRITICAL
F8
F3
E8
E3
H6
H5
G9
G2
D9
D2
C6
C5
E2
C2
B2
B3
B5
B6
B8
B9
C9
E9
F9
H9
J9
J8
J6
J5
J3
J2
H2
F2
E1
C1
A1
A3
A4
A6
B7
A9
B10
D10
F10
H10
K10
K8
K7
K5
J4
K2
J1
G1
D1
B1
A2
B4
A5
A7
A8
A10
C10
E10
G10
J10
K9
J7
K6
K4
K3
K1
H1
F1
CRITICAL
21
NO STUFF
21
NO STUFF
21
21
CR-11
MEM_MUXSEL_H<0> RAM_MUXSEL_H
MEM_MUXSEL_L<0> RAM_MUXSEL_L
MEM_MUXSEL_H<1> RAM_MUXSEL_H
MEM_MUXSEL_L<1> RAM_MUXSEL_L
RAM_DATA_B<0>
RAM_DATA_B<1>
RAM_DATA_B<2>
RAM_DATA_B<10>
RAM_DATA_B<9>
RAM_DATA_B<8>
RAM_DQM_B<0>
RAM_DQS_B<0>
RAM_DATA_B<4>
RAM_DATA_B<3>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DATA_B<5>
RAM_DQM_B<1>
RAM_DQS_B<1>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DATA_B<13>
RAM_DATA_B<12>
RAM_DATA_B<11>
RAM_DATA_A<10>
RAM_DATA_A<11>
RAM_DATA_A<13>
RAM_DATA_A<12>
RAM_DATA_A<15>
RAM_DATA_A<14>
RAM_DQS_A<1>
MEM_DATA<0>
RAM_DQM_A<1>
MEM_DATA<3>
MEM_DATA<1>
MEM_DATA<2>
MEM_DATA<5>
MEM_DATA<4>
MEM_DQS<0>
MEM_DATA<6>
MEM_DATA<7>
MEM_DQM<0>
MEM_DATA<8>
MEM_DATA<11>
MEM_DATA<10>
MEM_DATA<9>
MEM_DATA<13>
MEM_DATA<12>
MEM_DATA<14>
MEM_DQS<1>
MEM_DATA<15>
RAM_MUXSEL_L
RAM_DQM_A<0>
RAM_DQS_A<0>
RAM_DATA_A<7>
RAM_DATA_A<6>
RAM_DATA_A<4>
RAM_DATA_A<5>
RAM_DATA_A<1>
RAM_DATA_A<3>
RAM_DATA_A<2>
RAM_DATA_A<0>
RAM_DATA_A<8>
MEM_DQM<1>
RAM_DATA_A<9>RAM_DATA_B<16>
RAM_DATA_B<17>
RAM_DATA_B<18>
RAM_DATA_B<26>
RAM_DATA_B<25>
RAM_DATA_B<24>
RAM_DQM_B<2>
RAM_DQS_B<2>
RAM_DATA_B<20>
RAM_DATA_B<19>
RAM_DATA_B<23>
RAM_DATA_B<22>
RAM_DATA_B<21>
RAM_DQM_B<3>
RAM_DQS_B<3>
RAM_DATA_B<31>
RAM_DATA_B<30>
RAM_DATA_B<29>
RAM_DATA_B<28>
RAM_DATA_B<27>
RAM_DATA_A<26>
RAM_DATA_A<27>
RAM_DATA_A<29>
RAM_DATA_A<28>
RAM_DATA_A<31>
RAM_DATA_A<30>
RAM_DQS_A<3>
MEM_DATA<16>
RAM_DQM_A<3>
MEM_DATA<19>
MEM_DATA<17>
MEM_DATA<18>
MEM_DATA<21>
MEM_DATA<20>
MEM_DQS<2>
MEM_DATA<22>
MEM_DATA<23>
MEM_DQM<2>
MEM_DATA<24>
MEM_DATA<27>
MEM_DATA<26>
MEM_DATA<25>
MEM_DATA<29>
MEM_DATA<28>
MEM_DATA<30>
MEM_DQS<3>
MEM_DATA<31>
RAM_MUXSEL_L
RAM_DQM_A<2>
RAM_DQS_A<2>
RAM_DATA_A<23>
RAM_DATA_A<22>
RAM_DATA_A<20>
RAM_DATA_A<21>
RAM_DATA_A<17>
RAM_DATA_A<19>
RAM_DATA_A<18>
RAM_DATA_A<16>
RAM_DATA_A<24>
MEM_DQM<3>
RAM_DATA_A<25>RAM_DATA_B<32>
RAM_DATA_B<33>
RAM_DATA_B<34>
RAM_DATA_B<42>
RAM_DATA_B<41>
RAM_DATA_B<40>
RAM_DQM_B<4>
RAM_DQS_B<4>
RAM_DATA_B<36>
RAM_DATA_B<35>
RAM_DATA_B<39>
RAM_DATA_B<38>
RAM_DATA_B<37>
RAM_DQM_B<5>
RAM_DQS_B<5>
RAM_DATA_B<47>
RAM_DATA_B<46>
RAM_DATA_B<45>
RAM_DATA_B<44>
RAM_DATA_B<43>
RAM_DATA_A<42>
RAM_DATA_A<43>
RAM_DATA_A<45>
RAM_DATA_A<44>
RAM_DATA_A<47>
RAM_DATA_A<46>
RAM_DQS_A<5>
MEM_DATA<32>
RAM_DQM_A<5>
MEM_DATA<35>
MEM_DATA<33>
MEM_DATA<34>
MEM_DATA<37>
MEM_DATA<36>
MEM_DQS<4>
MEM_DATA<38>
MEM_DATA<39>
MEM_DQM<4>
MEM_DATA<40>
MEM_DATA<43>
MEM_DATA<42>
MEM_DATA<41>
MEM_DATA<45>
MEM_DATA<44>
MEM_DATA<46>
MEM_DQS<5>
MEM_DATA<47>
RAM_MUXSEL_H
RAM_DQM_A<4>
RAM_DQS_A<4>
RAM_DATA_A<39>
RAM_DATA_A<38>
RAM_DATA_A<36>
RAM_DATA_A<37>
RAM_DATA_A<33>
RAM_DATA_A<35>
RAM_DATA_A<34>
RAM_DATA_A<32>
RAM_DATA_A<40>
MEM_DQM<5>
RAM_DATA_A<41> RAM_DATA_B<48>
RAM_DATA_B<49>
RAM_DATA_B<50>
RAM_DATA_B<58>
RAM_DATA_B<57>
RAM_DATA_B<56>
RAM_DQM_B<6>
RAM_DQS_B<6>
RAM_DATA_B<52>
RAM_DATA_B<51>
RAM_DATA_B<55>
RAM_DATA_B<54>
RAM_DATA_B<53>
RAM_DQM_B<7>
RAM_DQS_B<7>
RAM_DATA_B<63>
RAM_DATA_B<62>
RAM_DATA_B<61>
RAM_DATA_B<60>
RAM_DATA_B<59>
RAM_DATA_A<58>
RAM_DATA_A<59>
RAM_DATA_A<61>
RAM_DATA_A<60>
RAM_DATA_A<63>
RAM_DATA_A<62>
RAM_DQS_A<7>
MEM_DATA<48>
RAM_DQM_A<7>
MEM_DATA<51>
MEM_DATA<49>
MEM_DATA<50>
MEM_DATA<53>
MEM_DATA<52>
MEM_DQS<6>
MEM_DATA<54>
MEM_DATA<55>
MEM_DQM<6>
MEM_DATA<56>
MEM_DATA<59>
MEM_DATA<58>
MEM_DATA<57>
MEM_DATA<61>
MEM_DATA<60>
MEM_DATA<62>
MEM_DQS<7>
MEM_DATA<63>
RAM_MUXSEL_H
RAM_DQM_A<6>
RAM_DQS_A<6>
RAM_DATA_A<55>
RAM_DATA_A<54>
RAM_DATA_A<52>
RAM_DATA_A<53>
RAM_DATA_A<49>
RAM_DATA_A<51>
RAM_DATA_A<50>
RAM_DATA_A<48>
RAM_DATA_A<56>
MEM_DQM<7>
RAM_DATA_A<57>
+2_5V_INTREPID +2_5V_INTREPID +2_5V_INTREPID +2_5V_INTREPID38
38 38 38
17 17
17 17 16
16 16 16
36 36
36 36
36 36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36 36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
11 11
11 11
10 11
10 11
10 11
10 11
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
10
12
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
12
12
12
12
12
12
12
12
12
12
12
10
12 12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
10
12
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
12
12
12
12
12
12
12
12
12
12
12
10
12 12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
10
12
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
12
12
12
12
12
12
12
12
12
12
12
10
12 12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
12
10
12
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
12
12
12
12
12
12
12
12
12
12
12
10
12
10 10
10 10
DQ58
RFU18
KEY
VDD6
VSS6
VSS8
VDD5
DQ15
DQ13
DQ14
VSS5
DM1
VDD3
VSS3
DQ7
DQ12
DQ6
DM0
DQ4
DQ5
VSS1
VREF1
VDD1
SA1
SA2
RFU19
SA0
VDD32
DQ63
DQ62
VSS32
DQ61
VDD30
DQ60
DQ55
DM7
VSS30
DQ54
DM6
VDD28
DQ53
DQ52
VDD25
CK1*
CK1
VSS28
DQ47
DQ46
VDD23
VSS25
DM5
DQ45
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RFU17
DQ36
VSS21
VDD21
VDD19
RAS*
BA1
CAS*
S1*
A6
A4
A2
A0
VSS19
A8
A11
VDD17
RFU15
CKE0
VDD15
VSS17
RFU11
VSS16
RFU9
VDD14
RFU3
VSS14
RFU5
RFU7
RFU1
VDD12
VSS12
DM3
DQ31
DQ30
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
DQ20
VDD8
DQ21
DQ22
VDDSPD
SCL
SDA
VDD31
VSS31
DQ59
DQS7
DQ51
VDD29
DQ56
VSS29
DQ57
DQ48
DQS6
VDD27
DQ49
DQ50
DQ43
VSS26
VDD26
VDD24
VSS27
DQ41
DQS5
VSS24
VDD22
DQ42
DQ34
VSS22
DQ35
DQS4
DQ40
VDD20
RFU16
DQ32
VSS20
DQ33
S0*
VDD18
BA0
A10_AP
WE*
A1
A5
A3
A9
A7
VSS18
CKE1
RFU14
RFU13
VDD16
VDD13
VSS15
RFU10
RFU8
RFU12
RFU0
RFU4
VSS13
RFU2
RFU6
VSS11
DQ26
DQ27
DQS3
VDD11
DQ19
DQ24
VDD9
VSS9
DQ25
DQ18
DQ16
VDD7
DQ17
DQS2
DQ11
VDD4
VSS7
CK0*
CK0
DQS1
VSS4
DQ10
VDD2
DQ9
DQ2
DQS0
DQ8
DQ3
VSS2
VDD0
DQ0
DQ1
VSS0
VREF0
A12
J20AS0A42-D2S
F-RT-SM
805CERM6.3V20%10UFC553
805CERM6.3V20%10UFC552
DQ58
RFU18
KEY
VREF0
VDD0
DQ0
DQ1
VSS0
DQS0
VSS2
DQ3
DQ8
DQ2
VDD2
VSS4
DQS1
DQ10
DQ9
DQ11
CK0
CK0*
VSS7
VDD4
DQ16
DQ18
VDD7
DQ17
DQS2
VSS9
DQ25
VDD9
DQ24
DQ19
DQS3
VDD11
DQ27
DQ26
VSS11
RFU0
VDD13
RFU4
VSS13
RFU2
RFU6
RFU13
RFU12
RFU8
RFU10
VSS15
A9
CKE1
RFU14
VDD16
A1
A5
A7
VSS18
A3
BA0
VDD18
S0*
WE*
A10_AP
DQ33
VSS20
DQ32
VDD20
RFU16
DQS4
DQ34
VSS22
DQ35
DQ40
VDD22
DQ41
DQS5
VSS24
DQ42
DQ43
DQ48
VSS26
VDD26
VDD24
VSS27
VSS29
DQ50
DQ49
DQS6
VDD27
DQS7
DQ51
VDD29
DQ56
DQ57
SDA
VDD31
VSS31
DQ59
VDDSPD
SCL
RFU19
VDD32
VSS28
CK1
DQ52
VDD28
DM6
DQ54
VSS30
DM7
DQ55
DQ60
VDD30
DQ61
DQ53
SA1
SA2
SA0
DQ63
DQ62
VSS32
VSS25
DM5
DQ45
VDD23
VDD21
VSS21
DQ36
RFU17
DQ44
DM4
DQ39
VSS23
DQ38
DQ37
RAS*
CAS*
S1*
DQ46
DQ47
CK1*
VDD25
RFU7
RFU5
VDD14
VSS17
VDD15
CKE0
RFU15
VDD17
A11
A8
RFU11
VSS16
RFU9
VSS19
A0
A2
A4
A6
BA1
VDD19
VDD12
VSS12
DQ31
DQ30
DM3
DQ22
DQ21
VDD8
DQ20
DQ29
VSS10
VDD10
DQ28
DQ23
DM2
VSS6
VSS8
RFU1
VSS14
RFU3
VREF1
DQ5
DQ4
DM0
DQ6
DQ12
DQ7
VSS3
VSS1
VDD1
VDD3
DM1
VSS5
DQ14
DQ13
DQ15
VDD5
VDD6
A12
F-RT-SMAS0A42-D2RJ23
805CERM6.3V20%10UFC498
805CERM6.3V20%10UFC543
1K1%1/16WMF
R372
402
1K1%1/16WMF
R359
402 402CERM10V20%0.1UFC509
402CERM10V20%0.1UFC460
+2_5V_MAIN+2_5V_MAIN +2_5V_MAIN +2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+2_5V_MAIN
+3V_MAIN
402CERM10V20%0.1UFC804
402CERM10V20%0.1UFC808
402CERM10V20%0.1UFC812
+3V_MAIN
402CERM10V20%0.1UFC816
402CERM10V20%0.1UFC820
402CERM10V20%0.1UFC821
402CERM10V20%0.1UFC817
402CERM10V20%0.1UFC813
402CERM10V20%0.1UFC809
402CERM10V20%0.1UFC805
402CERM10V20%0.1UFC822
402CERM10V20%0.1UFC818
402CERM10V20%0.1UFC823
+3V_MAIN
402CERM10V20%0.1UFC819
402CERM10V20%0.1UFC814
402CERM10V20%0.1UFC815
402CERM10V20%0.1UFC811
402CERM10V20%0.1UFC810
402CERM10V20%0.1UFC806
402CERM10V20%0.1UFC807
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 12 44A051-6278
FOR RETURN CURRENT
DDR BYPASS CAPS
SLOT "B"
SLOT "A"
ADDR=0XA2(WR)/0XA3(RD)ADDR=0XA0(WR)/0XA1(RD)
CUSTOMER SLOTSLOT "B"REVERSEDSTANDARD
SLOT "A"FACTORY SLOT
DDR SODIMM CONNS
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NCNC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NCNC
DDR VREFONE 0.1UF PER SLOT
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
119
51
4039
38
2827
186185
174
16
173
162161
159
150149
138137
126125
15
104103
90
8887
7675
6463
52
43
21
197
57
4645
36
3433
192191
180
22
179
168167
157
156155
144143
132131
21
114113
9493
92
8281
7069
58
109
193
195
198
196
194
122121
8483
8079
7877
7473
200199
124123
9897
91
89
8685
7271
118
202
201
183
169
147
133
61
47
25
11
23
19
18
190
188
182
178
14
189
187
181
177
176
172
166
164
175
171
8
165
163
154
152
146
142
153
151
145
141
6
140
136
130
128
139
135
129
127
68
66
17
60
56
67
65
59
55
54
50
44
42
13
53
49
43
41
32
30
24
20
31
29
7
5
184
170
148
134
62
48
26
12
95 96
158
160
37
35
120
116
117
101 102
105 106
107 108
109 110
99 100
115
111 112
CRITICAL
2
1
2
1
119
51
40 39
38
28 27
186 185
174
16
173
162 161
159
150 149
138 137
126 125
15
104 103
90
88 87
76 75
64 63
52
4 3
2 1
197
57
46 45
36
34 33
192 191
180
22
179
168 167
157
156 155
144 143
132 131
21
114 113
94 93
92
82 81
70 69
58
10 9
193
195
198
196
194
122 121
84 83
80 79
78 77
74 73
200 199
124 123
98 97
91
89
86 85
72 71
118
202
201
183
169
147
133
61
47
25
11
23
19
18
190
188
182
178
14
189
187
181
177
176
172
166
164
175
171
8
165
163
154
152
146
142
153
151
145
141
6
140
136
130
128
139
135
129
127
68
66
17
60
56
67
65
59
55
54
50
44
42
13
53
49
43
41
32
30
24
20
31
29
7
5
184
170
148
134
62
48
26
12
9596
158
160
37
35
120
116
117
101102
105106
107108
109110
99100
115
111112
CRITICAL
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
CR-12
RAM_DATA_B<19>
RAM_DATA_B<24>
RAM_DATA_B<18>
RAM_DQS_B<2>
RAM_DATA_B<17>
RAM_DATA_B<16>
SYSCLK_DDRCLK_B0_L
SYSCLK_DDRCLK_B0
RAM_DATA_B<11>
RAM_DATA_B<10>
RAM_ADDR<12>
RAM_DATA_B<35>
RAM_DATA_B<34>
RAM_DQS_B<4>
RAM_DATA_B<33>
RAM_DATA_B<32>
RAM_WE_L
RAM_CS_L<2>
RAM_BA<0>
RAM_ADDR<10>
RAM_ADDR<1>
RAM_ADDR<3>
RAM_ADDR<5>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_CKE<3>
RAM_DATA_B<27>
RAM_DATA_B<26>
RAM_DQS_B<3>
RAM_DATA_B<25>
RAM_DQS_B<5>
RAM_DATA_B<41>
RAM_DATA_B<40>
DDR_VREF
RAM_DATA_A<21>
RAM_DATA_A<61>
RAM_DATA_A<62>
RAM_DQM_A<7>
RAM_DATA_A<60>
RAM_DATA_A<55>
RAM_DQM_A<6>
RAM_DATA_A<54>
RAM_DATA_A<53>
RAM_DATA_A<52>
SYSCLK_DDRCLK_A1
SYSCLK_DDRCLK_A1_L
RAM_DATA_A<47>
RAM_DATA_A<46>
RAM_DQM_A<5>
RAM_DATA_A<45>
RAM_DATA_A<39>
RAM_DATA_A<44>
RAM_DATA_A<38>
RAM_DQM_A<4>
RAM_DATA_A<36>
RAM_DATA_A<37>
RAM_CS_L<1>
RAM_RAS_L
RAM_CAS_L
RAM_BA<1>
RAM_ADDR<0>
RAM_ADDR<4>
RAM_ADDR<2>
RAM_ADDR<6>
RAM_ADDR<8>
RAM_ADDR<11>
RAM_CKE<0>
RAM_DATA_A<30>
RAM_DQM_A<3>
RAM_DATA_A<29>
RAM_DATA_A<28>
RAM_DATA_A<23>
RAM_DATA_A<22>
RAM_DATA_A<20>
RAM_DATA_A<15>
RAM_DATA_A<14>
RAM_DQM_A<1>
RAM_DATA_A<13>
RAM_DATA_A<7>
RAM_DATA_A<12>
RAM_DATA_A<6>
RAM_DQM_A<0>
RAM_DATA_A<5>
RAM_DATA_A<4>
DDR_VREF
INT_I2C_CLK0
INT_I2C_DATA0
RAM_DATA_A<59>
RAM_DATA_A<58>
RAM_DQS_A<7>
RAM_DATA_A<57>
RAM_DATA_A<56>
RAM_DATA_A<51>
RAM_DQS_A<6>
RAM_DATA_A<50>
RAM_DATA_A<49>
RAM_DATA_A<48>
RAM_DATA_A<43>
RAM_DQS_A<5>
RAM_DATA_A<42>
RAM_DATA_A<41>
RAM_DATA_A<35>
RAM_DATA_A<40>
RAM_DQS_A<4>
RAM_DATA_A<34>
RAM_DATA_A<32>
RAM_DATA_A<33>
RAM_CS_L<0>
RAM_BA<0>
RAM_WE_L
RAM_ADDR<10>
RAM_ADDR<1>
RAM_ADDR<5>
RAM_ADDR<3>
RAM_ADDR<7>
RAM_ADDR<9>
RAM_ADDR<12>
RAM_CKE<1>
RAM_DATA_A<27>
RAM_DATA_A<26>
RAM_DQS_A<3>
RAM_DATA_A<24>
RAM_DATA_A<25>
RAM_DATA_A<19>
RAM_DATA_A<18>
RAM_DQS_A<2>
RAM_DATA_A<17>
RAM_DATA_A<16>
SYSCLK_DDRCLK_A0
SYSCLK_DDRCLK_A0_L
RAM_DATA_A<11>
RAM_DQS_A<1>
RAM_DATA_A<10>
RAM_DATA_A<9>
RAM_DATA_A<3>
RAM_DATA_A<8>
RAM_DATA_A<2>
RAM_DQS_A<0>
RAM_DATA_A<1>
RAM_DATA_A<0>
DDR_VREF
RAM_DATA_A<63>
RAM_DQM_A<2>
RAM_DATA_A<31>
DDR_VREF
RAM_DATA_B<0>
RAM_DATA_B<1>
RAM_DQS_B<0>
RAM_DATA_B<2>
RAM_DATA_B<3>
RAM_DATA_B<8>
RAM_DATA_B<9>
RAM_DQS_B<1>
RAM_DATA_B<42>
RAM_DATA_B<43>
RAM_DATA_B<48>
RAM_DATA_B<49>
RAM_DATA_B<50>
RAM_DQS_B<6>
RAM_DATA_B<56>
RAM_DATA_B<51>
RAM_DQS_B<7>
RAM_DATA_B<57>
RAM_DATA_B<58>
RAM_DATA_B<59>
INT_I2C_DATA0
INT_I2C_CLK0
RAM_DATA_B<62>
RAM_DQM_B<7>
RAM_DATA_B<61>
RAM_DATA_B<63>
RAM_DATA_B<60>
RAM_DATA_B<55>
RAM_DQM_B<6>
RAM_DATA_B<54>
RAM_DATA_B<53>
RAM_DATA_B<52>
SYSCLK_DDRCLK_B1
SYSCLK_DDRCLK_B1_L
RAM_DATA_B<45>
RAM_DQM_B<5>
RAM_DATA_B<44>
RAM_DATA_B<39>
RAM_DATA_B<46>
RAM_DATA_B<47>
RAM_DATA_B<38>
RAM_DQM_B<4>
RAM_DATA_B<37>
RAM_DATA_B<36>
RAM_CAS_L
RAM_RAS_L
RAM_CS_L<3>
RAM_ADDR<4>
RAM_ADDR<0>
RAM_ADDR<6>
RAM_ADDR<8>
RAM_ADDR<11>
RAM_ADDR<2>
RAM_BA<1>
RAM_CKE<2>
RAM_DATA_B<31>
RAM_DQM_B<3>
RAM_DATA_B<30>
RAM_DATA_B<29>
RAM_DATA_B<28>
RAM_DATA_B<23>
RAM_DQM_B<2>
RAM_DATA_B<22>
RAM_DATA_B<21>
RAM_DATA_B<20>
RAM_DATA_B<15>
RAM_DATA_B<14>
RAM_DATA_B<13>
RAM_DQM_B<1>
RAM_DATA_B<12>
RAM_DATA_B<7>
RAM_DATA_B<6>
RAM_DQM_B<0>
RAM_DATA_B<5>
RAM_DATA_B<4>
DDR_VREF
39
39 39
39
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
23
23
36
36
36
36
36
36
36
36
36
23
23
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
12
36
36
36
36
36
12
36
12
12
12
12
12
12
12
36
36
36
36
36
36
36
36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
12
12
12
12
12
12
12
12
12
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
14
14
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
12
12
12
12
12
12
12
12
12
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
36
36
36
38
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
14
14
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
12
12
36
12
12
12
12
12
12
12
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
36
38
11
11
11
11
11
11
10
10
11
11
10
11
11
11
11
11
10
10
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
12
11
11
11
11
11
11
11
11
11
11
10
10
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
12
12
12
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
10
10
11
11
11
11
11
11
11
11
11
11
12
11
11
11
12
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
12
12
11
11
11
11
11
11
11
11
11
11
10
10
11
11
11
11
11
11
11
11
11
11
10
10
10
10
10
10
10
10
10
10
10
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
12
402MF
1/16W5%
4.7R106
402MF
1/16W5%
0R170
60.41%1/16WMF
R163
402
SM11/16W5%
10KRP23
SM11/16W5%
10KRP21
SM11/16W5%
10KRP20 SM1
1/16W5%
10KRP20
402MF
1/16W5%
4.7R77
402CERM6.3V20%
0.22UFC87
(PLL4)VDD15A_6
(PLL4)VSSA_6
ROM_WE
ROM_OE
PCI_STOP
PCI_DEVSEL
PCI_CBE_3
PCI_CBE_2
PCI_CBE_1
PCI_CBE_0
ROM_CS
PCI_CLK_IN
PCI_CLK_OUT
PCI_CLK2
PCI_CLK1
PCI_CLK0
PCI_FRAME
PCI_PAR
PCI_TRDY
PCI_IRDY
PCI_REQ_2
PCI_REQ_1
PCI_REQ_0
PCI_GNT_0
PCI_GNT_1
PCI_GNT_2
PCI/ROMINTERFACE
PCIAD_31
PCIAD_30
PCIAD_28
PCIAD_27
PCIAD_26
PCIAD_25
PCIAD_29
PCIAD_19
PCIAD_18
PCIAD_17
PCIAD_16
PCIAD_15
PCIAD_23
PCIAD_24
PCIAD_20
PCIAD_21
PCIAD_22
PCIAD_14
(7 OF 9)
PCIAD_11
PCIAD_10
PCIAD_12
PCIAD_13
PCIAD_9
PCIAD_6
PCIAD_5
PCIAD_7
PCIAD_8
PCIAD_4
PCIAD_3
PCIAD_1
PCIAD_2
PCIAD_0
ROM_OVRLY_EN
U44BGA
INTREPID-REV2.1
402MF
1/16W5%
33R146
402MF
1/16W5%
33R107
402MF
1/16W5%
33R126
475%1/16WMF
R141
402
+3V_SLEEP
SM11/16W5%
10KRP19
SM11/16W5%
10KRP18
SM11/16W5%
10KRP18
SM11/16W5%
10KRP18
SM11/16W5%
10KRP19
SM11/16W5%
10KRP18
SM11/16W5%
10KRP19
SM11/16W5%
10KRP19
402MF
1/16W5%
22R49
402MF
1/16W5%
22R54
402MF
1/16W5%
22R71
402MF
1/16W5%
33R1399
402MF
1/16W5%
22R1350
+3V_MAIN
402MF
1/16W5%
10KR145
402MF
1/16W5%
10KR181
402MF
1/16W5%
10KR147
402MF
1/16W5%
10KR125
402MF
1/16W5%
10KR148
402MF
1/16W5%
10KR169
4.99K1%
1/16WMF
R140
402
4.99K1%
1/16WMF
R135
402 402CERM6.3V20%0.22UFC226
SM11/16W5%
10KRP21
SM11/16W5%
10KRP23
SM11/16W5%
10KRP21
SM11/16W5%
10KRP20
SM11/16W5%
10KRP20SM1
1/16W5%
10KRP21
SM11/16W5%
10KRP23
SM11/16W5%
10KRP23
VSSA_5(PLL5)
(PLL5)VDD15A_5
STP_AGP
AGPPVT
AGPVREF0
AGPVREF1
AGP_BUSY
AGP_CLK
AGP_FB_IN
AGP_FB_OUT
AGPAD0
AGPREQ
AGPGNT
AGP_SBA3
AGP_SBA2
AGP_SBA1
AGP_SBA0
AGPCBE_3
AGPFRAME
AGPTRDY
AGPIRDY
AGPSTOP
AGPDEVSEL
AGPPAR
AGPAD31
AGPAD30
AGPCBE_0
AGPCBE_1
AGPCBE_2
AGP_ST2
AGP_AD_STB0_P
AGP_AD_STB0_N
AGP_AD_STB1_P
AGP_AD_STB1_N
AGPPIPE
AGPRBF
AGP_ST1
AGP_SBA7
AGP_SB_STB_P
AGP_SB_STB_N
AGP_ST0
AGP_WBF
AGPINTERFACES
AGP_SBA6
AGP_SBA5
AGP_SBA4
AGPAD29
AGPAD28
AGPAD27
AGPAD26
AGPAD25
AGPAD24
AGPAD23
AGPAD22
AGPAD21
AGPAD20
AGPAD19
AGPAD18
AGPAD17
AGPAD16
AGPAD15
AGPAD14
AGPAD13
AGPAD12
AGPAD11
AGPAD10
AGPAD9
AGPAD8
AGPAD7
AGPAD6
AGPAD5
AGPAD4
AGPAD3
AGPAD2
AGPAD1
(3 OF 9)BGA
INTREPID-REV2.1U44
402CERM6.3V20%
0.22UFC144
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 13 44A051-6278ARE POWERED IN SLEEP
+3V_MAIN BECAUSE THESE CHIPSUSB2 AND CBUS REQ REMAINS ON
AGP_FB_CLK IS ROUTED THE SAME LENGTH AS CLK66M_GPU_AGP
PLACE CLOSE TO INTREPID SIDE
SERIES RESISTORS FOR BOOTROM CONTROL SIGNALS
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPSSIMPLY PROVIDING REFERENCE TO CHIP
(PLACE CLOSE TO INTREPID AGP BALLS)
AGP I/O REFERENCE
OUTPUT IMPEDANCE IS ABOUT 20OHMNeed divider for 3.3V slot!
INTREPID AGP/PCI
AGP PULL-UPS/PULL DOWNS
Vin = Vcore (1.5V)
Vout = AGPIO (1.5V)
use 52-ohm a resistor here.NOTE: Designs using AGP slot should
PCI PULL-UPS
VOUT = 3.3V
VIN = 1.5V (CORE)
PCI FEEDBACK CLOCK MATCHES LONGEST PCI CLOCK ROUTE
21
21
2
1
81
81
81
72
21
2
1
J10
J11
AN9
AK17
AR7
AM9
AT15
AR15
AT17
AR16
AR17
AT14
AH16
AN17
AN18
AT16
AN16
AM17
AM18
AJ19
AT18
AH18
AR18
AJ15
AM16
AK16
AR14
AR9
AK13
AH13
AN11
AT8
AN10
AM15
AN15
AJ8
AK14
AT13
AN14
AH15
AK15
AR13
AM11
AT12
AJ11
AR12
AK12
AM13
AN13
AT10
AT11
AK11
AN12
AM12
AR11
AT9
AR10
AR8
AM10
CRITICAL
21
21
21
2
1
81
63
81
72
63
54
54
72
21
21
21
21
21
NEC_USB
21
21
21
21
21
21
2
1
2
1
2
1
54
72
72
63
54
63
54
63
V13
V14
AN19
AK30
AR30
AT30
AN29
AH25
AG25
AN30
AM30
AT31
AR31
AN31
AM31
AR32
AT32
AK25
AK27
AK28
AT19
AK21
AK22
AK20
AK19
AB21
AB20
AR29
AM28
AT33
AK24
AJ24
AJ29
AT29
AT28
AM29
AN28
AM27
AL25
AN24
AT23
AM20
AT22
AM21
AN21
AR21
AN20
AT21
AN27
AR28
AR20
AT27
AR27
AM26
AN26
AM25
AT26
AR26
AL24
AN25
AM24
AT20
AR25
AT25
AR24
AM23
AT24
AR23
AN23
AM22
AN22
AR22
AM19
AR19CRITICAL
2
1
CR-13
CLK33M_CBUS_UF
CLK66M_GPU_AGP
CLK66M_GPU_AGP_UF
CLK33M_USB2 CLK33M_USB2_UF
INT_PCI_FB_IN
INT_PCI_FB_OUT
CLK33M_CBUS
CLK33M_AIRPORT
CLK33M_AIRPORT_UF
INT_ROM_RW_L
INT_ROM_CS_L
INT_ROM_OE_L
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_IRDY_L
PCI_PAR
CBUS_PCI_GNT_L
AIRPORT_PCI_GNT_L
USB2_PCI_GNT_L
USB2_PCI_REQ_L
CBUS_PCI_REQ_L
AIRPORT_PCI_REQ_L
+1_5V_INTREPID_PLL6
PCI_AD<30>
PCI_AD<31>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
PCI_AD<26>
PCI_AD<25>
PCI_AD<24>
PCI_AD<23>
PCI_AD<22>
PCI_AD<19>
PCI_AD<21>
PCI_AD<20>
PCI_AD<17>
PCI_AD<18>
PCI_AD<15>
PCI_AD<14>
PCI_AD<16>
PCI_AD<12>
PCI_AD<13>
PCI_AD<9>
PCI_AD<11>
PCI_AD<10>
PCI_AD<7>
PCI_AD<8>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<2>
PCI_AD<1>
PCI_AD<3>
PCI_AD<0>
+1_5V_INTREPID_PLL
PCI_STOP_L
PCI_TRDY_L
PCI_IRDY_L
PCI_DEVSEL_L
PCI_FRAME_L
+1_5V_AGP
INT_AGPPVT
+1_5V_INTREPID_PLL5
AGP_SBA<1>
AGP_REQ_L
AGP_GNT_L
STOP_AGP_L
AGP_BUSY_L
INT_AGP_VREFAGP_AD<0>
AGP_AD<1>
AGP_AD<2>
AGP_AD<3>
AGP_AD<4>
AGP_AD<5>
AGP_AD<6>
AGP_AD<8>
AGP_AD<9>
AGP_AD<10>
AGP_AD<11>
AGP_AD<12>
AGP_AD<13>
AGP_AD<14>
AGP_AD<15>
AGP_AD<16>
AGP_AD<17>
AGP_AD<18>
AGP_AD<19>
AGP_AD<20>
AGP_AD<21>
AGP_AD<22>
AGP_AD<23>
AGP_AD<24>
AGP_AD<25>
AGP_AD<26>
AGP_AD<27>
AGP_AD<28>
AGP_AD<29>
AGP_AD<30>
AGP_AD<31>
AGP_AD<7>
AGP_CBE<0>
AGP_CBE<1>
AGP_CBE<2>
AGP_CBE<3>
AGP_PAR
AGP_FRAME_L
AGP_TRDY_L
AGP_IRDY_L
AGP_STOP_L
AGP_DEVSEL_L
AGP_SBA<0>
AGP_SBA<2>
AGP_SBA<3>
AGP_SBA<4>
AGP_SBA<5>
AGP_SBA<6>
AGP_SBA<7>
AGP_SB_STB
AGP_SB_STB_L
AGP_ST<0>
AGP_ST<2>
AGP_ST<1>
AGP_AD_STB<1>
AGP_AD_STB_L<1>
AGP_AD_STB<0>
AGP_AD_STB_L<0>
AGP_PIPE_L
AGP_RBF_L
AGP_WBF_L
+1_5V_INTREPID_PLL
AGP_BUSY_L
AGP_GNT_L
STOP_AGP_L
+3V_GPU
AGP_FRAME_L
AGP_REQ_L
AGP_DEVSEL_L
AGP_TRDY_L
AGP_RBF_L
AGP_PIPE_L
AGP_AD_STB<1>
AGP_AD_STB_L<0>
AGP_IRDY_L
AGP_WBF_L
AGP_STOP_L
AGP_AD_STB<0>
+1_5V_AGP
AGP_SB_STB
AGP_AD_STB_L<1>
AGP_SB_STB_L
CLK66M_AGP_15V_TP
INT_AGP_FB_IN
INT_AGP_FB_OUT
+1_5V_AGP
INT_AGP_VREF
ROM_CS_LINT_ROM_CS_L
ROM_OE_LINT_ROM_OE_L
ROM_RW_LINT_ROM_RW_L
AIRPORT_PCI_REQ_L
USB2_PCI_REQ_L
CBUS_PCI_REQ_L
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
38
38
38
39
39
39
39
37
37
37
37
37
39
37
37
37
37
37
37
37
37
39
39
37
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
20
38
20
20
37
37
37
37
26
26
26
26
26
37
26
26
26
26
26
26
26
26
37
37
26
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
38
26
26
26
26
26
19
38
21
19
19
39
26
26
26
26
24
24
24
24
24
26
39
24
24
24
24
24
24
24
24
26
26
24
26
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
15
24
24
24
24
24
17
37
37
37
37
37
37
37
37
37
37
37
37
37
37
15
37
20
37
37
37
37
37
37
37
37
37
37
17
37
37
37
17
39
39
39
39
36
36
36
36
24
24
24
24
18
18
18
18
18
24
39
26
18
24
18
18
18
18
18
18
18
18
24
24
18
24
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
13
18
18
18
18
18
16
37
19
19
19
19
38 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
19
19
19
19
19
37
37
37
37
37
37
37
19
19
19
19
19
19
19
19
19
13
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
16
19
19
19
16
38
24
24
24
24
26
18
36
19
36
26 36
36
36
18
24
36
13
13
13
18
18
18
18
13
13
13
13
13
18
18
24
26
13
13
13
38
10
10
10
10
10
10
10
10
18
18
10
18
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
9
13
13
13
13
13
13
38
19
13
13
13
13
13 19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
13
13
13
13
13
19
19
19
19
19
19
19
13
13
19
19
19
13
13
13
13
13
13
13
9
13
13
13
15
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
36
36
13
13
10 13
10 13
10 13
13
13
13
402MF
1/16W5%
1KR549
SM11/16W5%
10KRP17
402MF
1/16W5%
10KR547
10K5%1/16WMF
R27
402
SM11/16W5%
22RP16
SM11/16W5%
22RP15
SM11/16W5%
22RP15
SM11/16W5%
22RP15
SM11/16W5%
22RP15
SM11/16W5%
22RP16
SM11/16W5%
22RP16
SM11/16W5%
22RP16
+3V_MAIN
402MF
1/16W5%
10KR1402
+3V_MAIN
+3V_MAIN
402MF
1/16W5%
1KR544
SM11/16W5%
10KRP13
SM11/16W
5%
10KRP13
SM11/16W5%
10KRP13
SM11/16W5%
10KRP13
SM11/16W5%
10KRP17
SM11/16W5%
10KRP17
SM11/16W5%
10KRP17
1K1%1/16WMF
R112
402
CS_CE2
CS_CE1
CS_IORD
CS_IOWR
ATA_CS1
ATA_CS0
IDE
IDEINTRQ
IDECHRDY
IDECS0
IDECS1
IDEDMACKIDEDMARQ
IDERD
IDEWR
IDERST
IDEA9
IDEA8
IDEA7
IDEA6
IDEA5
IDEA4
IDEA3
IDEA2
IDEA1
IDEA0
IDEDD15
IDEDD14
IDEDD13
IDEDD12
IDEDD11
IDEDD10
IDEDD9
IDEDD8
IDEDD7
IDEDD6
IDEDD5
IDEDD4
IDEDD3
IDEDD2
IDEDD1
IDEDD0
CARDSLOT
CS_WAIT
CS_OE
CS_WE
ATA_INTRQ
ATA_DMARQ
ATA_CHRDY
ATA_DMACK
ATA_RD
ATA_WR
ATA_RST
ATA_VREF
UATA100
ATA_A1ATA_A2
ATA_A0
ATA_D12
ATA_D11
ATA_D15
ATA_D14
ATA_D13
ATA_D10
ATA_D9
ATA_D3
ATA_D2
ATA_D1
ATA_D0
ATA_D4
ATA_D8
ATA_D7
ATA_D6
ATA_D5
(5 OF 9)
U44INTREPID-REV2.1
BGA
402MF
1/16W5%
82R26
402MF
1/16W5%
82R61
IICDATA_1
IICCLK_1
IICCLK_0
IICDATA_0
TST_PLLEN
TST_MONOUT
TST_MONIN
TEI
TRSTN
TMS
TCK
TDO
TDI
TEST
MDC
GBE_REFCLK
MDIO
COL
CRS
GTX_CLK
RXD_6
RXD_4
RXD_5
RXD_3
RXD_7
RXD_2
RXD_1
RX_ER
RX_DV
RX_CLK
RXD_0
FW_PINT
FW_LINKON
FWR_LCLK
TX_ER
TX_EN
TX_CLK
TXD_0
RESET
PURESET
PHY_LPS
PHY_CTL0
PHY_CTL1
PHY_LREQ
FWR_PCLK
(4 OF 9)
MISCTXD_3
TXD_2
TXD_1
TXD_4
TXD_5
TXD_6
TXD_7
GB ETHERNET
FIREWIRE
PHY_DATA0
PHY_DATA1
PHY_DATA2
PHY_DATA3
PHY_DATA5
PHY_DATA7
PHY_DATA4
PHY_DATA6
BGAINTREPID-REV2.1
U44
402MF
1/16W5%
22R105
402MF
1/16W5%
22R15
402MF
1/16W5%
10R543 402
MF1/16W5%
10R548
402MF
1/16W5%
10R88
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 14 44A051-6278
D1-RDD0-WR
6A-WR6B-RD
59-RD58-WR
A1-RD
ADDR
84-WR85-RD
AD-RD
A0-WR
A2-WRA3-RD
AE-WRAF-RD
AC-WR
BUS
LMU
(MAIN)
RAM - STANDARD
ADDR LSB INDICATES READ (’1’) OR WRITE (’0’) MODES
N/A
N/A
N/A
I2C-0
RAM - REVERSED
N/ABOOTBANG E2PROM
N/ACLOCK SLEW SSCG
N/A
N/AFAN CONTROLLER
SNAPPER SOUND
N/A
N/A
N/A
N/A
N/A
N/A
(MAIN)
N/A
N/A
I2C-1
N/A
(SLEEP)
I2C-2
N/A
N/A
DASH MODEM
N/A N/A
N/A
N/A
N/A
(SLEEP)
N/A
PMU
000
00
0
0
1
0
0
JTG_RSTN_L
11
111
0(I)0(I)
1(I)1(I)1(I)
0(I) 1X
0
01(I)1(I)
10(I)
1(I)
EXTPLL
X
0
0
X
TST_TEI_H(I/O)
HWPLL_
0
1
SHUTDOWN(OUTPUT)
JTG_TDO_H
TESTSEL5
(OUTPUT)
(INPUT)
0(I)
X
(OUTPUT)
DDR_TPDENABLE
1
X
1
0(I)
0(I)
1(I)
0
(I/O)JTG_TDI_H TST_PLLEN_H
MEMWE
X(I)X(I)X(I)X(I)X(I)
ATPG IDDQ
POSTSCALAR BYPASS
POSTSCALAR BYPASS
PLL OUTPUTSSELECTED
SELECTEDPLL OUTPUTS
X(OUTPUT)
SYNC/MEM DATABYPASS
ANALYZER_CLK
JTAG MODE
ATPG NORMAL
DESCRIPTION
VIEW PLLS (SOFTWARE)
NORMAL OPERATION
TEST TRI-STATE
VIEW PLLS (HARDWARE)
FUNCTIONAL TEST WITHOUT
FUNCTIONAL TEST IDDQ
FUNCTIONAL TEST WITH
UDMA - STOP
UDMA - HOSTDMARDY/HSTROBE
UDMA - DEVICEDMARDY/DSTROBE
NOT USING CARDSLOT INTERFACE
CS_WAIT IS AN INPUT
EIDE/I2CINT - ENET/FW/UATA
ENET_TXD SERIES TERMINATION
I2C PULL-UPS
TEST PULL-UPS/DOWNS
J20 - PG 12
J23 - PG 12
U37 - PG 23
U36 - PG 23
U48 - PG 25
U56 - PG 15
J14 - PG 25
J9 - PG 25
21
81
21
2
1
72
54
63
81
72
63
81
54
12
21
72
81
54
63
63
72
54
2
1
AM2
AJ4
AL2
AA7
AH7
AG8
AE5
AE4
AG2
AD5
AH1
AF2
AG1
AF1
AJ2
AJ1
AG4
AD7
AH2
AF4
AD4
AC5
AM1
AB7
AK4
AG7
AF7
AH5
AK2
AL1
AH4
AG5
AK1
AE7
AF5
AE1
AE2
AC4
AD2
AB5
AB4
AD1
AA1
Y15
Y4
AA2
AA8
AC2
AC1
W8
W2
V1
W1
V2
V4
U2
U1
Y8
W7
Y1
Y2
W5
W4
T1
V5
AB2
AA4
AA5
Y7
AB1
Y5
CRITICAL
21
21
A5
A7
H9
E10
D9
G10
B7
A6
D8
E9
H10
AR6
AK10
AM7
AN6
AR5
AH10
AT5
AK8
AP5
D2
C4
J12
E8
G9
D7
A4
B4
D6
E7
D3
U5
T2
M2
M1
N4
L2
K2
K1
N5
P7
M4
L4
L1
P5
B5
B6
AM3
AN1
AK5
AN2
H12
L13
N1
N2
T7
U14
E6
C5
CRITICAL
21
21
21
21
21
CR-14
JTAG_ASIC_TMS
JTAG_ENET_TDI
JTAG_ASIC_TDI
INT_TST_PLLEN_PD
INT_TST_MONIN_PD
JTAG_ASIC_TRST_L
INT_JTAG_TEI
JTAG_ASIC_TCK
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_CLK0
INT_I2C_DATA0
ENET_LINK_TXD<6>ENET_PHY_TXD<6>
ENET_LINK_TXD<7>ENET_PHY_TXD<7>
ENET_LINK_TXD<5>ENET_PHY_TXD<5>
ENET_LINK_TXD<2>ENET_PHY_TXD<2>
ENET_LINK_TXD<4>ENET_PHY_TXD<4>
ENET_LINK_TXD<3>ENET_PHY_TXD<3>
ENET_LINK_TXD<0>ENET_PHY_TXD<0>
ENET_LINK_TXD<1>ENET_PHY_TXD<1>
CLKENET_PHY_GTX CLKENET_LINK_GTX
INT_PU_RESET_L
INT_RESET_L
JTAG_ASIC_TDI
JTAG_ENET_TDI
JTAG_ASIC_TCK
JTAG_ASIC_TMS
JTAG_ASIC_TRST_L
INT_JTAG_TEI
INT_I2C_CLK1
INT_I2C_DATA1
INT_I2C_DATA0
INT_I2C_CLK0
INT_TST_MONOUT_TP
INT_TST_PLLEN_PD
INT_TST_MONIN_PD
ENET_MDC
ENET_MDIO
ENET_COL
ENET_CRS
CLKENET_LINK_GBE_REF
ENET_LINK_RXD<7>
ENET_LINK_RXD<6>
ENET_LINK_RXD<5>
ENET_LINK_RXD<4>
ENET_LINK_RXD<2>
ENET_LINK_RXD<3>
ENET_LINK_RXD<1>
ENET_LINK_RXD<0>
ENET_RX_ER
ENET_RX_DV
CLKENET_LINK_RX
CLKFW_LINK_LCLK
FW_PINT
FW_LKON
ENET_LINK_TX_ER
CLKENET_LINK_TX
ENET_LINK_TX_EN
ENET_LINK_TXD<1>
ENET_LINK_TXD<0>
ENET_LINK_TXD<2>
ENET_LINK_TXD<3>
ENET_LINK_TXD<4>
ENET_LINK_TXD<6>
ENET_LINK_TXD<5>
ENET_LINK_TXD<7>FW_LINK_DATA<1>
FW_LINK_DATA<3>
FW_LINK_DATA<0>
FW_LINK_DATA<2>
FW_LINK_DATA<4>
FW_LINK_DATA<5>
FW_LINK_DATA<6>
FW_LINK_DATA<7>
FW_PHY_LPS
FW_LINK_CNTL<1>
FW_LINK_CNTL<0>
FW_LINK_LREQ
CLKFW_LINK_PCLK
ENET_PHY_TX_ER
ENET_PHY_TX_EN
CLKFW_PHY_LCLK
FW_PHY_LREQ
UIDE_REF
UIDE_CS1_L
UIDE_CS0_L
UIDE_IOCHRDY
UIDE_DMACK_L
UIDE_DIOR_L
UIDE_DIOW_L
UIDE_RST_L
UIDE_ADDR<2>
UIDE_ADDR<1>
UIDE_ADDR<0>
UIDE_DATA<5>
UIDE_DATA<15>
UIDE_DATA<14>
UIDE_DATA<13>
UIDE_DATA<12>
UIDE_DATA<11>
UIDE_DATA<10>
UIDE_DATA<9>
UIDE_DATA<8>
UIDE_DATA<7>
UIDE_DATA<6>
UIDE_DATA<4>
UIDE_DATA<3>
UIDE_DATA<2>
UIDE_DATA<1>
UIDE_DATA<0>
EIDE_DATA<11>
EIDE_DATA<13>
EIDE_DATA<15>
EIDE_DATA<14>
EIDE_ADDR<0>
EIDE_ADDR<1>
EIDE_IOCHRDY
EIDE_ADDR<2>
EIDE_DATA<12>
EIDE_DATA<9>
EIDE_DATA<10>
EIDE_DATA<8>
EIDE_DATA<6>
EIDE_DATA<7>
EIDE_DATA<4>
EIDE_DATA<5>
EIDE_DATA<3>
EIDE_DATA<2>
EIDE_DATA<1>
EIDE_DATA<0>
EIDE_CS0_L
EIDE_CS1_L
EIDE_INT
EIDE_DMACK_L
EIDE_DMARQ
EIDE_WR_L
EIDE_RD_L
EIDE_RST_L
HD_DMARQ
UIDE_DMARQ
HD_INTRQUIDE_INTRQ
CSLOT_IOWAIT_L_PU
CSLOT_CE1_L_SPNNO_TEST=TRUE
CSLOT_CE2_L_SPNNO_TEST=TRUE
CSLOT_IORD_L_SPNNO_TEST=TRUE
CSLOT_IOWR_L_SPNNO_TEST=TRUE
CSLOT_OE_L_SPNNO_TEST=TRUE
CSLOT_WE_L_SPNNO_TEST=TRUE
CSLOT_ADDR3_SPNNO_TEST=TRUE
CSLOT_ADDR4_SPNNO_TEST=TRUE
CSLOT_ADDR5_SPNNO_TEST=TRUE
CSLOT_ADDR6_SPNNO_TEST=TRUE
CSLOT_ADDR7_SPNNO_TEST=TRUE
CSLOT_ADDR8_SPNNO_TEST=TRUE
CSLOT_ADDR9_SPNNO_TEST=TRUE
39
39
39
39
39
39
39
39
39
39
39
25
25
23
23
39
39
39
25
25
23
23
27
27
39
27
27
15
15
14
14
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
36
30
30
39
27
27
27
27
15
15
14
14
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
36
37
36
37
37
37
37
37
37
37
37 37
37
37
37
37
37
37
37
37
37
36
37
37
36
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
14
14
14
14
14
14
14
14
14
14
12
12
14 27
14 27
14 27
14 27
14 27
14 27
14 27
14 27
27 36
25
10
14
14
14
14
14
14
14
14
12
12
14
14
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
36
28
28
37
27
37
14
14
14
14
14
14
14
14 28
28
28
28
28
28
28
28
28
28
28
37
28
27
27
28
28
38
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
37
24 37
+3V_MAIN
805CERM6.3V20%10UFC99
402MF
1/16W5%
100KR76
+3V_MAIN
402CERM10V20%0.1UFC89
402CERM16V20%0.01UFC88
402MF
1/16W5%
22R45
402MF
1/16W5%
22R4
402MF
1/16W5%
22R60
SM11/16W5%
47RP8
SM11/16W5%
47RP8
SM11/16W5%
47RP8
SM11/16W5%
47RP8
402MF
1/16W5%
22R59
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VSSA_8
VSSA4
VSSA3
VSSA2
VSSA1
(PLL9)
(PLL7)
(PLL3)
(PLL2)
(PLL1)
VDD15A_8
VDD15A_4
VDD15A_3
VDD15A_2
VDD15A_1
CPU_INT
PCIPME
EXTINT12
EXTINT13
EXTINT14
EXTINT15
EXTINT16
EXTINT17
GPIO16
GPIO15
GPIO12
GPIO11
GPIO9
GPIO6
GPIO5
GPIO4
GPIO3
GPIO2
GPIO1
GPIO0
VSSU_2
VDDU33_2
VDDU33_1
(6 OF 9)
SCCRTSA
SCCTXDA
SCCDTRA
SCCRXDA
SCCGPIOA
SCCTRXCA
SCCTXDB
SCCGPIOB
SCCTRXCB
SCCRXDB
SCCRTSB
PURPOSEGENERAL
I/O’S
EXTINT8
EXTINT7
EXTINT6
EXTINT0
INTERRUPTS
EXTINT11
EXTINT4
EXTINT5
EXTINT10
EXTINT9
EXTINT3
EXTINT2
EXTINT1
AUD_DTO
AUD_DTI
AUD_SYNC
MOD_DTO
AUD_BITCLK
AUD_CLKOUT
IICCLK_2
MOD_SYNC
MOD_DTI
MOD_CLKOUT
IICDATA_2
MOD_BITCLK
IIC
AUDIO/I2S
CLOCKS
XTAL_OUT
PROCSLEEPREQ
PENDPROCINT
XTAL_IN
SS_REF_CLK_IN
BUF_REF_CLK_OUT
STOPXTAL
WATCHDOG
PCI_
PCI_
PCI_
VSSU_1
PCI_
USB_VD0_P
USB_VD0_N
USB_VD1_P
USB_VD1_N
USB_VD2_N
USB_VD2_P
USB_PWRFLT0
USB_PRTPWR0
USB_VD3_N
USB_VD3_P
USB
USB_PRTPWR1
USB_PWRFLT1
USB_VD4_N
USB_VD4_P
USB_VD5_N
USB_VD5_P
USB_PRTPWR2
USB_PWRFLT2
BGAINTREPID-REV2.1
U44
+3V_SLEEP
402MF
1/16W5%
24R504
15K5%1/16WMF
R80
402
402MF
1/16W5%
24R532
402MF
1/16W5%
24R58
402MF
1/16W5%
24R52
402CERM6.3V20%
0.22UFC176
402MF
1/16W5%
4.7R113
402CERM6.3V20%
0.22UFC137
402MF
1/16W5%
4.7R89
402CERM6.3V20%
0.22UFC166
402MF
1/16W5%
4.7R114
402CERM6.3V20%
0.22UFC331
15K5%
1/16WMF
R79
402
402CERM6.3V20%
0.22UFC178
402MF
1/16W5%
4.7R194
402MF
1/16W5%
4.7R123
Y1
SM
18.432M
402MF
1/16W5%
10MR540
402CERM50V5%22PFC129
402CERM50V5%
22PFC16
402MF
1/16W5%
0R25
F-ST-SMU.FL-R_SMT
J1
515%1/16WMF
R7
402
05%1/16WMF
R550
402
603CERM10V20%1UF
C411
68.1K1%
1/16WMF
R225
402
15.8K1%
1/16WMF
R226
402
805CERM6.3V20%10UFC399
603MF
1/16W5%
0R242
603MF
1/16W5%
0R207
+2_5V_MAIN
+1_8V_MAIN
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U10LT1962-ADJ
MSOP
402CERM16V20%
0.01UFC404
10K5%
1/16WMF
R599
402
402MF
1/16W5%
10KR2
402MF
1/16W5%
10KR78
10K5%1/16WMF
R8
402
10K5%1/16WMF
R70
402
SM11/16W5%
10KRP42
SM11/16W5%
10KRP7
SM11/16W5%
10KRP40
SM11/16W5%
10KRP40
SM11/16W5%
10KRP41
SM11/16W5%
10KRP41
SM11/16W5%
10KRP7
SM11/16W5%
10KRP41
SM11/16W5%
10KRP42
SM11/16W5%
10KRP6
SM11/16W5%
10KRP28
SM11/16W5%
10KRP28
SM11/16W5%
10KRP47
SM11/16W5%
10KRP41
SM11/16W5%
10KRP40
SM11/16W5%
10KRP47
SM11/16W5%
10KRP47
SM11/16W5%
10KRP28
SM11/16W5%
10KRP1
SM11/16W5%
10KRP6
SM1
1/16W5%
10KRP42
SM11/16W5%
10KRP6
SM11/16W5%
10KRP42
SM11/16W5%
10KRP28
SM11/16W5%
10KRP25
SM11/16W5%
10KRP7
SM11/16W5%
10KRP6
755%1/16WMF
R68
402
SM11/16W5%
10KRP40
SM11/16W5%
10KRP1
SM11/16W5%
10KRP1
SM11/16W5%
10KRP1
402MF
1/16W5%
0R889
10K5%1/16WMF
R888
402
402CERM10V20%0.1UFC841
603CERM10V20%1UFC840
402CERM10V20%
0.1UFC839
SM-1400-OHM-EMIL49
+3V_MAIN
SM-1400-OHM-EMIL50
402CERM10V20%0.1UFC842
+2_5V_MAIN
402MF
1/16W5%
0R891
10K5%1/16WMF
R887
402
10K5%1/16WMF
R886
402
SM11/16W5%
10KRP47
CPU0
VDDA
VDD0
VDD1
VDDC
VDDQ
VSS1
VSS0
VSSA
VSSC
VSSQ
LOCK
ODSEL
PD*
SDATA
SCLK
FSEL
CLKIN
RESET*
ADDRSEL
TSSOP
U56CY28512B
402MF
1/16W5%
33R890
10K5%
1/16WMF
R758
402
05%
1/16WMF
R759
402
+3V_SLEEP
SMFERR-EMI-100-OHM
L1
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 15 44A051-6278
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#TABLE_5_ITEM
NO_SSCG116S1104 1 RES,METAL FILM,10 K OHM,5,1/16W,0402,SM R68
USB POWER FAULT SIGNALS
CONTRAST PWM
BRIGHTNESS PWM
FAN PWM
NC
NC
POWERBOOK SPARE
CBUS_IREQ_L
MISO
REQ*
MOSI
ACK*
SCK
VIA
CRYSTAL LOAD CAPACITANCE IS 16PF
PORT B - UNUSED
PORT D - UNUSED
PORT E - BLUETOOTH
PORT F - MODEM
USB PORT ASSIGNMENTS
SIGNAL NAME
MOD_BITCLK_B_H
MOD_CLKOUT_B_H
MOD_DTO_B_H
MOD_SYNC_B_H
MOD_DTI_B_H
JTG_TDO_H
10
2345
HWPLL_TESTMUXSEL
INT - USB/GPIOS/I2S
VGATE/LOCK INTERRUPT
VCORE_A/B SEL
FOR D3COLD SUPPORT
INTERNAL 250K PULL-DOWN
INTERNAL 250K PULL-UP
OPEN-DRAIN OUTPUT
OTHERWISE A LOT OF OVERSHOOT/UNDERSHOOTPLACE R68 CLOSE TO INTREPID SIDE
OUTPUT IMPEDANCE ~18-20OHMINTERNAL 250K PULL-UP
PORT A - RIGHT USB 1
PORT C - LEFT USB
2
1
21
2
1
2
1
21
21
21
72
63
54
81
21
V15
U4
AT7
R8
R9
AH29
AK18
AJ16
AJ13
AA15
U8
T8
AG29
P8
N8
K5
L5
M7
M8
H2
H1
G2
G1
L8
L7
N7
J1
K4
M5
J2
J4
AN7
K9
AR4
AF9
AM5
AT4
AG10
AG11
AL5
AN3
AP4
AG9
AF10
AT6
AN8
AJ18
AJ17
AJ12
AA16
AJ7
R1
R2
T4
P1
V8
AH8
AL4
H4
L9
H5
J8
F2
J7
K7
F1
K8
J5
E1
G5
C32
D31
G30
E31
A33
B33
D34
C33
G4
H7
E2
D1
F4
J9
E30
B32
E34
F33
D30
U15
T5
R4
R7
R5
P2
CRITICAL
21
INTREPID_USB
2
1
21
INTREPID_USB
21
INTREPID_USB
21
INTREPID_USB
2
1
21
2
1
21
2
1
21
2
1
2
1
2
1
21
21
21
CRITICAL
2 1
NO STUFF
2
1
2
1
21
NO STUFF
1
2
3
NO STUFF
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
21
NO STUFF
21
5
1
7
6
8
4
3
2
2
1
2
1
12
12
1
2
1
2
36
45
27
18
18
36
81
27
81
54
72
54
72
45
63
54
81
81
81
72
54
63
72
63
81
63
81
1
2SSCG
54
54
63
72
21
SSCG
2
1NO STUFF
2
1SSCG
2
1SSCG
2
1
SSCG
2
1
SSCG
2
1
SSCG
2
1SSCG
21
SSCG
2
1NO STUFF
2
1NO STUFF
63
156
11
197
18
512
10
1
8
9
17
13
4
2
3
1620
14
SSCG
CRITICAL
21
SSCG
2
1SSCG
2
1
NO STUFF
1
2
CR-15
CG_RESET_L
SYSTEM_CLK_EN
CG_LOCK
SYSTEM_CLK_EN
CG_ADDRSEL
INT_I2C_DATA1
INT_I2C_CLK1
CG_FSEL
INT_REF_CLK_OUTINT_REF_CLK_INCG_CLKOUT
VCORE_VGATE
+2_5V_CG_MAIN
AGP_NV_INT_L
+3V_GPU
VCORE_VGATE INT_EXTINT10_PU
LTC1962_INT_VIN
LT1962_INT_BYP
LT1962_INT_ADJ
+1_5V_INTREPID_PLL
USB_DFM MODEM_USB_DM
USB_DEM BT_USB_DM
USB_DFP MODEM_USB_DP
USB_DEP BT_USB_DP
USB_DDM
USB_DDP
USB_DCM USB_D1M
USB_DCP USB_D1P
USB_DBP
USB_DAM USB_D2M
USB_DAP USB_D2P
USB_DBM
INT_I2C_DATA2
INT_I2C_CLK2
+3V_INTREPID_USB
+1_5V_INTREPID_PLL2
+1_5V_INTREPID_PLL3
+1_5V_INTREPID_PLL4
+1_5V_INTREPID_PLL8
FW_PHY_PD
CG_FSEL
INT_GPIO1_PU
+1_5V_INTREPID_PLL1
COMM_TXD_L
COMM_RTS_L
COMM_GPIO_L
COMM_DTR_L
PMU_FROM_INT
PMU_ACK_L
PMU_REQ_L
INT_GPIO12_PU
SND_HW_RESET_L
INT_GPIO9_PU
PMU_INT_L
COMM_RING_DET_L
INT_EXTINT3_PU
SND_LIN_SENSE_L
CBUS_INT_L
AIRPORT_PCI_INT_L
ENET_ENERGY_DET
INT_EXTINT8_PU
PMU_INT_NMI
INT_EXTINT11_PU
INT_MOD_DTO_PU
INT_MOD_DTI_PD
INT_MOD_SYNC_PD
INT_MOD_CLKOUT_PU
INT_MOD_BITCLK_PD
INT_PROC_SLEEP_REQ_L
INT_PEND_PROC_INT
SYSTEM_CLK_EN
INT_WATCHDOG_L
INT_REF_CLK_OUT
INT_REF_CLK_IN
COMM_TRXC
COMM_RXD
PMU_CLK
PMU_TO_INT
USB_DAM
USB_DAP
USB_DBP
USB_DBM
USB_DCP
USB_DCM
USB_PWREN_AB_L
USB_OC_AB_L
USB_DDP
USB_DDM
USB_PWREN_CD_L
USB_OC_CD_L
USB_DEP
USB_DEM
USB_OC_EF_L
USB_PWREN_EF_L
USB_DFP
USB_DFM
COMM_SHUTDOWN
COMM_RESET_L
SND_HP_MUTE_L
SND_AMP_MUTE_L
INT_GPIO15_PU
INT_ENET_RST_L
PMU_PME_L
MPIC_CPU_INT_L
SND_HP_SENSE_L
USB2_PCI_INT_L
INT_EXTINT16_PU
INT_EXTINT14_PU
INT_EXTINT13_PU
INT_EXTINT12_PU
SND_SYNC
INT_SND_CLKOUT SND_CLKOUT
SND_SCLK
INT_SND_SCLK
INT_SND_SYNC
INT_SND_TO_AUDIO
SND_TO_AUDIO
INT_AUDIO_TO_SND
CLK18M_XTAL_IN
CLK18M_INT_XIN
CLK18M_INT_XOUT
CLK18M_INT_EXT
USB_PWREN_EF_L
USB_OC_EF_L
USB_OC_AB_L
USB_PWREN_AB_L
USB_PWREN_CD_L
USB_OC_CD_L
USB2_PCI_INT_L
INT_EXTINT8_PU
INT_EXTINT14_PU
INT_GPIO1_PU
COMM_RING_DET_L
INT_MOD_CLKOUT_PU
INT_GPIO15_PU
PMU_INT_L
CBUS_INT_L
PMU_REQ_L
PMU_INT_NMI
INT_MOD_DTO_PU
INT_GPIO12_PU
INT_EXTINT13_PU
INT_EXTINT3_PU
INT_EXTINT16_PU
INT_EXTINT11_PU
INT_EXTINT12_PU
INT_EXTINT10_PU
INT_GPIO9_PU
INT_MOD_DTI_PD
INT_MOD_SYNC_PD
INT_MOD_BITCLK_PD
SND_HW_RESET_L
AIRPORT_PCI_INT_L
+3V_CG_PLL_MAIN
38 21
39
39
39
39
38
20
38
38
39
39
39
39
39
30
39
39
39
30
39
39
30
30
25
25
36 36
34
19
34
13
37 37
37 37
37 37
37 37
26 39
26 39
26 39
26 39
39
39
34
39
39
39
39
30
25
30
25
39
18
24
30
30
36
36
39
39
26
26
26
26
37
37
37
37
39
39
39
39
30
39
26
39
36
36
39
39
26
34
25
30
18
30
30
25
24
15
15
14
14
15
15 15
15
38
19
13
15 15
38
9
15 25
15 24
15 25
15 24
15
15
15 26
15 26
15
15 26
15 26
15
25
25
38
38
38
38
38
28
15
15
38
25
25
25
25
30
30
15
15
15
15
15
15
15
25
15
15
27
15
15
15
15
15
15
15
15
30
30
15
30
15
15
25
25
30
30
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
25
25
25
25
15
27
26
5
25
15
15
15
15
15
25
25
25
25
25
36
36
36
36
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
15
38
POWER/GROUND
VSS
(8 OF 9)
VDD2.5
VSS
VDD1.8/CPUVIO
BGAINTREPID-REV2.1
U44
GROUND
POWER
(9 OF 9)
VDD1.5
AGP_IO_VDD
VDD3.3
AGP_IO_VSS
VSS
VSS
VDD3.3
BGAINTREPID-REV2.1
U44
+1_5V_MAIN +3V_MAIN
805CERM6.3V20%10UFC1602
15.8K1%1/16WMF
R1601
402
68.1K1%1/16WMF
R1602
402
402CERM16V20%
0.01UFC1601
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U1600LT1962-ADJ
MSOP
603CERM10V20%1UFC1600
+1_8V_MAIN
05%1/16WMF
R1600
603
603MF
1/16W5%
0R1603
+2_5V_MAIN
05%
1/10WFF
R764
805
05%1/10WFF
R765
805
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 16 44A051-6278
1.5V LDO GENERATORTHIS LDO WAS ADDED IN CASE INTREPID CORE DOES NOT RUN AT 1.5V
NC
NC
Intrepid Power
M34
M32
M31
M3
M28
M24
M21
M20
M18
M17
M14
L24
J6
J34
J31
J3
G7
F6
F34
F31
F3
F28
F25
F22
F19
F16
F13
F10
D4
D33
C7
C36
C34
C31
C3
C28
C25
C22
C19
C16
C13
C10
C1
B35
B2
AT34
AT3
AR35
AR2
AP9
AP6
AP36
AP34
AP33
AP30
AP3
AP27
AP24
AP21
AP18
AP15
AP12
AP1
AN4
AN33
U16
U10
T27
T24
T23
T14
T11
R6
R34
R31
R3
R29
R26
R24
R23
R21
R19
R18
R16
R14
P4
P29
P22
P17
P12
N25
N15
M9
M6
AE31
AC28
AC27
AC25
AB34
E33
Y29
Y27
W34
AB31
W31
W25
V29
V25
U28
U25
T34
T31
T29
T28
AB27
T25
R27
R25
P28
P25
N36
N34
N31
N28
K34
AB25
K31
G34
G31
C35
AP35
AK34
AH34
AH30
AF28
AE34
AA29
AA25
F12
C9
C30
C27
C24
C21
C18
P19
P16
N23
N21
N18
C15
M23
M22
M19
M16
M15
F27
F24
F21
F18
F15
C12
AE21
AE19
AE18
AE16
AE14
AD6
AL9
AL6
AL34
AL31
AL27
AD34
AL21
AL18
AL15
AL12
AK7
AK3
AH27
AH23
AH21
AD31
AH20
AG6
AG34
AG30
Y25
Y24
Y23
Y19
Y16
AG3
Y14
Y12
Y11
W26
W23
W14
W11
V6
V34
V31
AG24
V3
V24
V21
V18
V17
V12
V10
U29
U27
U22
AG23
U19
AG21
AE28
AE22
AD3
AD28
G3
F9
F7
F30
E4
B34
D5
D32
C6
C2
B3
AR3
AC13
AP7
AP2
W6
W3
W13
W12
U12
T6
T3
T18
AC12
T12
R22
P14
P13
N6
N3
N24
K6
K3
AP16
AB6
AP13
AP10
AN5
AM4
AL7
AL3
AL16
AL13
AL10
AK6
AB3
AH6
AH3
AF25
AE6
AE3
AE17
AE15
AD21
AC14
G6
AA12
AA11
AD13
AC23
AC19
AC17
AB19
AB17
AB15
Y18
Y13
W24
W16
V22
V20
V19
V16
U24
U18
AB13
U17
T13
R20
R17
P21
P20
P18
P15
AD22
AD15
AA24
AA21
AA6
AA34
AA31
AA3
AA27
AA20
A34
AD25
AD23
AD12
AC26
AC22
AC20
AC18
AC16
A3
AC15
AC11
AB29
AB28
AB24
AB18
AB16
AB14
AB12
AB11
AL19
AJ23
AJ21
AH28
AH22
AH19
AF22
AR34
AE23
AR33
AP31
AP28
AP25
AP22
AP19
AN32
AL30
AL28
AL22
AE20
AD20
2
1
NO STUFF2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
5
1
7
6
8
4
3
2
NO STUFF
2
1NO STUFF
2
1
NO STUFF21
NO STUFF
2
1
2
1
NO STUFF
CR-16
+2_5V_INTREPID
+2_5V_SLEEP
+1_5V_AGP
+1_5V_LDO
LT1962_1V5__BYP
LT1962_1V5_ADJ
LTC1962_1V5_VOUT
LTC1962_1V5_VIN
MAXBUS_SLEEP38 34
38
23
38
20
17
17
19
38
9
11
17
35
7
10
38
13
19 38
38
5
402CERM6.3V20%0.22uFC219
402CERM6.3V20%0.22uFC218
402CERM6.3V20%0.22uFC158
402CERM6.3V20%0.22uFC183
805CERM6.3V20%
10uFC326
805CERM6.3V20%
10uFC11
402CERM6.3V20%0.22uFC328
402CERM6.3V20%0.22uFC240
402CERM6.3V20%0.22uFC298
402CERM6.3V20%0.22uFC216
402CERM6.3V20%0.22uFC160
402CERM6.3V20%0.22uFC217
402CERM6.3V20%0.22uFC269
402CERM6.3V20%0.22uFC97
402CERM6.3V20%0.22uFC299
402CERM6.3V20%0.22uFC113
402CERM6.3V20%0.22uFC96
402CERM6.3V20%0.22uFC220
402CERM6.3V20%0.22uFC205
402CERM6.3V20%0.22uFC159
402CERM6.3V20%0.22uFC155
402CERM6.3V20%0.22uFC157
805CERM6.3V20%
10uFC181
805CERM6.3V20%
10uFC215
402CERM6.3V20%0.22uFC306
402CERM6.3V20%0.22uFC350
402CERM6.3V20%0.22uFC372
402CERM6.3V20%0.22uFC276
402CERM6.3V20%0.22uFC308
402CERM6.3V20%0.22uFC364
402CERM6.3V20%0.22uFC370
402CERM6.3V20%0.22uFC330
402CERM6.3V20%0.22uFC349
402CERM6.3V20%0.22uFC272
402CERM6.3V20%0.22uFC303
402CERM6.3V20%0.22uFC273
402CERM6.3V20%0.22uFC321
402CERM6.3V20%0.22uFC385
402CERM6.3V20%0.22uFC392
402CERM6.3V20%0.22uFC293
402CERM6.3V20%0.22uFC371
402CERM6.3V20%0.22uFC277
402CERM6.3V20%0.22uFC381
402CERM6.3V20%0.22uFC274
402CERM6.3V20%0.22uFC304
402CERM6.3V20%0.22uFC389
402CERM6.3V20%0.22uFC347
402CERM6.3V20%0.22uFC307
805CERM6.3V20%
10uFC397
805CERM6.3V20%
10uFC402
805CERM6.3V20%
10uFC403
805CERM6.3V20%
10uFC398
402CERM6.3V20%0.22uFC369
402CERM6.3V20%0.22uFC332
402CERM6.3V20%0.22uFC383
402CERM6.3V20%0.22uFC367
402CERM6.3V20%0.22uFC270
402CERM6.3V20%0.22uFC379
402CERM6.3V20%0.22uFC366
402CERM6.3V20%0.22uFC384
402CERM6.3V20%0.22uFC382
402CERM6.3V20%0.22uFC271
402CERM6.3V20%0.22uFC386
402CERM6.3V20%0.22uFC323
402CERM6.3V20%0.22uFC280
402CERM6.3V20%0.22uFC373
402CERM6.3V20%0.22uFC311
402CERM6.3V20%0.22uFC248
402CERM6.3V20%0.22uFC208
402CERM6.3V20%0.22uFC333
402CERM6.3V20%0.22uFC194
402CERM6.3V20%0.22uFC335
402CERM6.3V20%0.22uFC358
402CERM6.3V20%0.22uFC229
402CERM6.3V20%0.22uFC249
402CERM6.3V20%0.22uFC279
402CERM6.3V20%0.22uFC246
402CERM6.3V20%0.22uFC228
402CERM6.3V20%0.22uFC209
402CERM6.3V20%0.22uFC247
402CERM6.3V20%0.22uFC334
402CERM6.3V20%0.22uFC207
402CERM6.3V20%0.22uFC230
805CERM6.3V20%
10uFC210
805CERM6.3V20%
10uFC374
805CERM6.3V20%
10uFC336
805CERM6.3V20%
10uFC262
402CERM6.3V20%0.22uFC192
402CERM6.3V20%0.22uFC131
402CERM6.3V20%0.22uFC146
402CERM6.3V20%0.22uFC185
402CERM6.3V20%0.22uFC145
402CERM6.3V20%0.22uFC175
402CERM6.3V20%0.22uFC165
402CERM6.3V20%0.22uFC143
402CERM6.3V20%0.22uFC190
402CERM6.3V20%0.22uFC206
402CERM6.3V20%0.22uFC221
402CERM6.3V20%0.22uFC161
402CERM6.3V20%0.22uFC164
402CERM6.3V20%0.22uFC163
402CERM6.3V20%0.22uFC244
402CERM6.3V20%0.22uFC243
402CERM6.3V20%0.22uFC222
402CERM6.3V20%0.22uFC162
402CERM6.3V20%0.22uFC188
402CERM6.3V20%0.22uFC189
402CERM6.3V20%0.22uFC225
402CERM6.3V20%0.22uFC136
402CERM6.3V20%0.22uFC223
402CERM6.3V20%0.22uFC133
805CERM6.3V20%
10uFC103
805CERM6.3V20%
10uFC301
805CERM6.3V20%
10uFC124
805CERM6.3V20%
10uFC154
402CERM6.3V20%0.22uFC132
402CERM6.3V20%0.22uFC38
402CERM6.3V20%0.22uFC23
402CERM6.3V20%0.22uFC46
402CERM6.3V20%0.22uFC56
402CERM6.3V20%0.22uFC329
402CERM6.3V20%0.22uFC177
402CERM6.3V20%0.22uFC55
402CERM6.3V20%0.22uFC258
402CERM6.3V20%0.22uFC98
402CERM6.3V20%0.22uFC79
402CERM6.3V20%0.22uFC134
402CERM6.3V20%0.22uFC63
402CERM6.3V20%0.22uFC49
402CERM6.3V20%0.22uFC37
402CERM6.3V20%0.22uFC107
402CERM6.3V20%0.22uFC100
402CERM6.3V20%0.22uFC122
402CERM6.3V20%0.22uFC242
402CERM6.3V20%0.22uFC42
402CERM6.3V20%0.22uFC121
402CERM6.3V20%0.22uFC130
402CERM6.3V20%0.22uFC39
402CERM6.3V20%0.22uFC135
402CERM6.3V20%0.22uFC47
402CERM6.3V20%0.22uFC168
402CERM6.3V20%0.22uFC58
402CERM6.3V20%0.22uFC116
402CERM6.3V20%0.22uFC106
402CERM6.3V20%0.22uFC26
402CERM6.3V20%0.22uFC147
402CERM6.3V20%0.22uFC62
402CERM6.3V20%0.22uFC54
402CERM6.3V20%0.22uFC118
402CERM6.3V20%0.22uFC355
805CERM6.3V20%
10uFC377
805CERM6.3V20%
10uFC148
402CERM6.3V20%0.22uFC40
402CERM6.3V20%0.22uFC17
402CERM6.3V20%0.22uFC41
805CERM6.3V20%
10uFC10
805CERM6.3V20%
10uFC12
402CERM6.3V20%0.22uFC78
402CERM6.3V20%0.22uFC48
402CERM6.3V20%0.22uFC64
402CERM6.3V20%0.22uFC22
402CERM6.3V20%0.22uFC25
402CERM6.3V20%0.22uFC61
402CERM6.3V20%0.22uFC187
402CERM6.3V20%0.22uFC227
402CERM6.3V20%0.22uFC120
402CERM6.3V20%0.22uFC378
402CERM6.3V20%0.22uFC101
402CERM6.3V20%0.22uFC18
402CERM6.3V20%0.22uFC43
402CERM6.3V20%0.22uFC19
402CERM6.3V20%0.22uFC278
402CERM6.3V20%0.22uFC167
402CERM6.3V20%0.22uFC191
402CERM6.3V20%0.22uFC261
402CERM6.3V20%0.22uFC259
402CERM6.3V20%0.22uFC260
402CERM6.3V20%0.22uFC245
402CERM6.3V20%0.22uFC117
402CERM6.3V20%0.22uFC119
402CERM6.3V20%0.22uFC21
402CERM6.3V20%0.22uFC60
402CERM6.3V20%0.22uFC33
402CERM6.3V20%0.22uFC35
402CERM6.3V20%0.22uFC53
402CERM6.3V20%0.22uFC57
402CERM6.3V20%0.22uFC34
402CERM6.3V20%0.22uFC59
402CERM6.3V20%0.22uFC27
402CERM6.3V20%0.22uFC36
402CERM6.3V20%0.22uFC346
402CERM6.3V20%0.22uFC345
402CERM6.3V20%0.22uFC356
402CERM6.3V20%0.22uFC365
402CERM6.3V20%0.22uFC387
402CERM6.3V20%0.22uFC388
402CERM6.3V20%0.22uFC380
402CERM6.3V20%0.22uFC292
402CERM6.3V20%0.22uFC322
402CERM6.3V20%0.22uFC305
402CERM6.3V20%0.22uFC275
402CERM6.3V20%0.22uFC368
402CERM6.3V20%0.22uFC320
402CERM6.3V20%0.22uFC348
402CERM6.3V20%0.22uFC302
402CERM6.3V20%0.22uFC193
402CERM6.3V20%0.22uFC357
402CERM6.3V20%0.22uFC309
402CERM6.3V20%0.22uFC310
402CERM6.3V20%0.22uFC142
402CERM6.3V20%0.22uFC267
402CERM6.3V20%0.22uFC300
402CERM6.3V20%0.22uFC241
402CERM6.3V20%0.22uFC327
402CERM6.3V20%0.22uFC115
402CERM6.3V20%0.22uFC268
402CERM6.3V20%0.22uFC114
402CERM6.3V20%0.22uFC184
402CERM6.3V20%0.22uFC156
402CERM6.3V20%0.22uFC182
402CERM6.3V20%0.22uFC186
402CERM6.3V20%0.22uFC123
402CERM6.3V20%0.22uFC102
402CERM6.3V20%0.22uFC169
+1_5V_MAIN
+3V_MAIN
402CERM6.3V20%0.22uFC52
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 17 44A051-6278
29 X 0.22UF (0402)
Intrepid Decoupling
24 Balls 4 X 10UF (0805) 4 X 10UF (0805)
30 Balls
4 X 10UF (0805)57 Balls
4 X 10UF (0805)51 X 0.22UF (0402)
44 Balls
32 X 0.22UF (0402)
72 X 0.22UF (0402)
INTREPID DDR DECOUPLING
INTREPID MAXBUS DECOUPLING
24 X 0.22UF (0402) 4 X 10UF (0805)21 Balls
INTREPID AGP I/O DECOUPLING
INTREPID CORE DECOUPLING
INTREPID 3.3V DECOUPLING
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
CR-17
MAXBUS_SLEEP
+1_5V_AGP
+2_5V_INTREPID
38 34 23
38
16
20
38
9
19
16
7
16
11
5
13
10
+3V_MAIN
+5V_MAIN
+3V_MAIN
402CERM10V20%0.1UFC448
402MF
1/16W5%
10KR670
402MF
1/16W5%
10KR669
402MF
1/16W5%
10KR662
SM
RP38
25V1/32W5%10K
+3V_MAIN
J10QT500806-L111
M-ST-SM
805CERM6.3V20%10UFC579
C/BE3*C/BE2*C/BE1*C/BE0*
VR_EN*VR_PORT
VCCCBVCCP
GND
VCC
GRST
MFUNC4MFUNC5MFUNC6
MFUNC3
MFUNC0
SUSPEND
MFUNC1MFUNC2
PCLK
SPKROUT
GNT
TRDYSTOPFRAME
PRSTREQ
DEVSEL
PERRIDSELSERRIRDY
AD31
PAR
AD30AD29AD28AD27
AD20AD21
AD18AD19
AD26AD25AD24AD23AD22
AD17
AD10AD11
AD9AD8
AD16AD15AD14AD13AD12
AD7
AD0
AD2AD3AD4AD5AD6
AD1
D14/RSVDD13/CAD6D12/CAD4D11/CAD2
D10/CAD31
D15/CAD8
D9/CAD30D8/CAD28D7/CAD7D6/CAD5D5/CAD3D4/CAD1D3/CAD0D2/RSVDD1/CAD29D0/CAD27
A22/CTRDY*
A20/CSTOP*
A23/CFRAME*
A21/CDEVSEL*
A19/CBLOCK*
A15/CIRDY*A14/CPERR*
A12/CC/BE2*
A8/CC/BE1*
A25/CAD19A24/CAD17
A18/RSVDA17/CAD16A16/CCLK
A13/CPAR
A11/CAD12A10/CAD9A9/CAD14
A7/CAD18A6/CAD20A5/CAD21
CE2/CAD10*INPACK/CREQ*WAIT/CSERR*
A4/CAD22A3/CAD23A2/CAD24A1/CAD25A0/CAD26
VPPD1VPPD0
VCCD0*VCCD1*
IORD*/CAD13IOWR*/CAD15
OE*/CAD11
WE*/CGNT*
CD2*/CCD2*CD1*/CCD1*
CE1*/CC/BE0*
RDY/IREQ*/CINT*
VS1*/CVS1VS2*/CVS2
REG*/CC/BE3*RESET/CRST*
BVD1/CSTSCHG/STSCHG*/RI*BVD2/SPKR*/CAUDIO
WP/IOIS16*/CCLKRUN*
RI_OUT/PME
CLK_48_RSVD/NCU26BGA
PCI1510GGU
+2_5V_MAIN
10K5%
1/16WMF
R676
402
805CERM10V20%2.2UFC748
805CERM10V20%2.2UFC742
402MF
1/16W5%
47R763
475%1/16WMF
R774
402
10K5%
1/16WMF
R299
402
402CERM6.3V20%0.22UFC754
TPS2211
OC
AVPP
AVCC2AVCC1AVCC0
GND
SHTDWN
VCCD0VCCD1VPPD0VPPD1
V_5_2V_5_1
V_3_2V_3_1
V_12 SSOI
U20
402CERM6.3V20%0.22UFC756
402CERM6.3V20%0.22UFC763
402CERM6.3V20%0.22UFC755
402CERM6.3V20%0.22UFC762
402CERM6.3V20%0.22UFC764
402MF
1/16W5%
47R661
402CERM6.3V20%0.22UFC761
402CERM10V20%
0.1UFC739
225%
1/16WMF
R684
402
402MF
1/16W5%
47R675
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 18 44A051-6278
THIS PROPERLY SHUTS DOWNCARDBUS POWER FOR PSUEDO-D3COLD
PCI1510 PULL-UPS
0.1UF ARE USED TO INCREASE ESD DISCHARGES OF UP TO 10KV
MAKE SURE VCC AND VPP ARE WIDE PLANE/TRACES
NC
NC
TO MINIMIZE INDUCTANCE!
CARDBUS
NC
NC
NCCLAMP FOR PCICLAMP FOR PC-CARD
INTEGRATED PULL-UP
TI REFERENCE SCHEMATIC DID NOT HAVE BULK ON +VCC_CBUS_SW
PC CARD/CARDBUS CONNECTOR
2
1
21
21
21
1
2
8
9
3
7
4
6
10
5
9
84
83 82
81
80
8
79
78 77
76 75
74 73
72 71
70
7
69
68 67
66 65
64 63
62 61
60
6
59
58 57
56 55
54 53
52 51
50
5
49
48 47
46 45
44 43
42 41
40
4
39
38 37
36 35
34 33
32 31
30
3
29
28 27
26 25
24 23
22 21
20
2
19
18 17
16 15
14 13
12 11
10
1
CRITICAL
2
1
A5
D13
B6
A9
B2
L8
D4
M11
K9
L3
L12
N13
B11
N11N7M1E1D5C13A7
J3
N10
L1
M9
L2
M8
D8
C2
A8
A6
G3
K3
G1
N1
G10
L10
N12
M10
K10
L9
N9
K7
K1
C11
F12
B8
F2
L11
C1
N2M13K8H4F13D1A11A2
J1
K2
B4
C5
H12
J10
J13
K12
K11
A3
H11
J12
K13
J11
M12
B3
C4
A4
H10
G13
H13
B5
L13
A1
J2
M3
K6
D6
C6
M2
N4
N5
L6
M6
K4
E3
D3
N6
E4
D2
B1
F4
E2
F3
C3
F1
G4
G2
L7
H2
H3
H1
J4
M4
L5
K5
N3
L4
M5
M7
N8
F11
E11
A12
C9
C8
B12
D10
B9
B10
A10
C12
D11
E10
B7
A13
E13
F10
B13
C10
D12
E12
D9
G12
G11
D7
C7
CRITICAL
2
1
2
1
2
1
21
2
1
2
1
NO STUFF
2
1
6
5
4
3
9
14
15
2
1
16
87
10
13
12
11
2
1
2
1
2
1
2
1
2
1
21
2
1
2
1
2
1
21
NO STUFF
CR-18
IO_RESET_L CBUS_PCI_RESET_L
CBUS_DET_2_L
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_BVD1_L
CBUS_BVD2_L
CBUS_REG_L
CBUS_INPACK_L
CBUS_WAIT_L
CBUS_RESET_L
CBUS_VS2
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_IOWR_L
CBUS_IORD_L
CBUS_VS1
CBUS_CE2_L
CBUS_DATA<15>
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DET_1_L
CBUS_ADDR<25>
CBUS_ADDR<8>
CBUS_WP_L
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<0>
CBUS_ADDR<1>
CBUS_ADDR<2>
CBUS_ADDR<3>
CBUS_ADDR<4>
CBUS_ADDR<5>
CBUS_ADDR<6>
CBUS_ADDR<7>
CBUS_ADDR<12>
CBUS_ADDR<15>
CBUS_ADDR<16>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_READY
CBUS_WE_L
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<9>
CBUS_ADDR<11>
CBUS_OE_L
CBUS_ADDR<10>
CBUS_CE1_L
CBUS_DATA<7>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
PCI1510_VR_EN_L
CBUS_MFUNC3_PD
CBUS_MFUNC2_PD
CBUS_MFUNC1_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD
CBUS_BVD1_L
CBUS_DET_1_L
CBUS_DET_2_L
CBUS_IORD_L
CBUS_IOWR_L
CBUS_OE_L
CBUS_CE1_L
CBUS_WE_L
CBUS_READY
CBUS_RESET_L
CBUS_REG_L
CBUS_BVD2_L
CBUS_WP_L
CBUS_CE2_L
CBUS_INPACK_L
CBUS_WAIT_L
CBUS_DATA<14>
CBUS_DATA<13>
CBUS_DATA<12>
CBUS_DATA<11>
CBUS_DATA<10>
CBUS_DATA<9>
CBUS_DATA<8>
CBUS_DATA<7>
CBUS_DATA<6>
CBUS_DATA<5>
CBUS_DATA<4>
CBUS_DATA<3>
CBUS_DATA<2>
CBUS_DATA<1>
CBUS_DATA<0>
CBUS_ADDR<25>
CBUS_ADDR<24>
CBUS_ADDR<23>
CBUS_ADDR<22>
CBUS_ADDR<21>
CBUS_ADDR<20>
CBUS_ADDR<19>
CBUS_ADDR<18>
CBUS_ADDR<17>
CBUS_ADDR_16_UF
CBUS_ADDR<15>
CBUS_ADDR<14>
CBUS_ADDR<13>
CBUS_ADDR<12>
CBUS_ADDR<11>
CBUS_ADDR<10>
CBUS_ADDR<9>
CBUS_ADDR<8>
CBUS_ADDR<7>
CBUS_ADDR<6>
CBUS_ADDR<5>
CBUS_ADDR<4>
CBUS_ADDR<3>
CBUS_ADDR<2>
CBUS_ADDR<1>
CBUS_ADDR<0>
CBUS_DATA<15>
CBUS_VS1
CBUS_VS2
CBUS_ADDR<16>
CBUS_PCI_PERR_L
CBUS_PCI_SERR_L
PCI_FRAME_L
PCI_IRDY_L
PCI_PAR
CBUS_MFUNC1_PD
CBUS_MFUNC2_PD
CBUS_MFUNC3_PD
CBUS_MFUNC4_PD
CBUS_MFUNC5_PD
CBUS_MFUNC6_PD
CBUS_SUSPEND_PU
CBUS_INT_L
CBUS_PCI_GNT_L
CBUS_PCI_REQ_L
PCI_DEVSEL_L
PCI_TRDY_L
PCI_STOP_L
CLK33M_CBUS
PCI_AD<0>
PCI_AD<1>
PCI_CBE<3>
PCI_CBE<2>
PCI_CBE<1>
PCI_CBE<0>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<2>
PCI_AD<20>
PCI_AD<21>
PCI_AD<22>
PCI_AD<23>
PCI_AD<24>
PCI_AD<25>
PCI_AD<9>
PCI_AD<8>
PCI_AD<7>
PCI_AD<6>
PCI_AD<5>
PCI_AD<4>
PCI_AD<31>
PCI_AD<30>
PCI_AD<3>
PCI_AD<29>
PCI_AD<28>
PCI_AD<27>
CBUS_PCI_IDSEL
PCI_AD<26>
PCI_AD<19>
+VPP_CBUS_SW
+VCC_CBUS_SW
CBUS_VPPD1
CBUS_VPPD0
CBUS_VCCD1_L
CBUS_VCCD0_L
MAIN_RESET_L
CBUS_PCI_PERR_L
CBUS_SUSPEND_PU
CBUS_PCI_SERR_L
TPS2211_SHDN_L_PU
MAIN_RESET_L
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
30
30
39
39
39
39
39
39
37
37
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
26
26
30
37
37
37
37
37
37
26
26
37
37
37
37
26
26
26
26
26
26
26
26
26
26
26
37
37
37
26
26
26
26
26
26
26
26
26
26
26
26
26
26
26
24
24
27
26
26
26
26
26
26
24
24
26
26
26
26
24
24
24
24
24
24
24
24
24
24
24
26
26
26
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
21
21
26
39
38
38
39
38
38
39
39
24
24
24
24
24
24
36
13
13
24
24
24
24
13
13
13
13
13
13
13
13
13
13
13
24
24
24
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
38
38
19
19
19
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
13
13
13
18
18
18
18
18
18
18
15
13
13
13
13
13
13
10
10
13
13
13
13
10
10
10
10
10
10
10
10
10
10
10
13
13
13
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
18
18
18
18
18
18
18
402MF
1/16W5%
47R155
4.99K1%
1/16WMF
R28
402
4.99K1%
1/16WMF
R22
402
402CERM6.3V20%0.22UFC13
402MF
1/16W5%
0R115
402MF
1/16W5%
0R99
402CERM10V20%0.1UFC94
402CERM10V20%0.1UFC251
402CERM10V20%0.1UFC84
402CERM10V20%0.1UFC44
402CERM16V20%0.01UFC28
402CERM10V20%0.1UFC150
402CERM16V20%0.01UFC196
402CERM10V20%0.1UFC93
402CERM10V20%0.1UFC104
402CERM10V20%0.1UFC125
402CERM16V20%0.01UFC149
402CERM10V20%0.1UFC92
402CERM16V20%0.01UFC65
402CERM10V20%0.1UFC288
402CERM10V20%0.1UFC283
402CERM10V20%0.1UFC289
805CERM6.3V20%10UFC264
402CERM10V20%0.1UFC85
402CERM16V20%0.01UFC66
402CERM10V20%0.1UFC81
402CERM16V20%0.01UFC294
402CERM10V20%0.1UFC67
402CERM16V20%0.01UFC314
402CERM10V20%0.1UFC72
402CERM10V20%0.1UFC313
402CERM10V20%0.1UFC254
402CERM10V20%0.1UFC80
402CERM16V20%0.01UFC105
805CERM6.3V20%10UFC170
402CERM10V20%0.1UFC317
402CERM10V20%0.1UFC318
402CERM10V20%0.1UFC282
10K5%
1/16WMF
R35
402
05%1/16WMF
R635
603
05%1/16WMF
R634
603
+1_5V_MAIN
402MF
1/16W5%
47R601
05%1/10WFF
R245
805
05%1/10WFF
R244
805
+3V_MAIN +3V_SLEEP
05%1/10WFF
R648
805
05%1/10WFF
R647
805
+2_5V_MAIN
+1_5V_SLEEP
49.91%1/16WMF
R136
402
49.91%1/16WMF
R128
402
10K5%
1/16WMF
R173
402
1005%1/16WMF
R82
402
1005%1/16WMF
R185
402
402MF
1/16W5%
120R72
402MF
1/16W5%
120R83
402MF
1/16W5%
120R186
402MF
1/16W5%
120R191
(1 OF 5)
AGPRBF*
VDDAGP9VDDAGP8VDDAGP7VDDAGP6VDDAGP5VDDAGP4VDDAGP3VDDAGP2VDDAGP1VDDAGP0
NC
PCIINTA*
PCIPARPCISTOP*PCIDEVSEL*PCITRDY*PCIIRDY*PCIFRAME*
PCIREQ*
PCICBE3*
PCICBE1*PCICBE2*
PCICBE0*
PCIAD27
PCIAD31
PCIAD28
PCIAD30PCIAD29
PCIAD21PCIAD22PCIAD23PCIAD24PCIAD25PCIAD26
PCIAD19PCIAD18PCIAD17
PCIAD20
PCIAD16
PCIAD9PCIAD10PCIAD11PCIAD12PCIAD13PCIAD14
PCIAD8PCIAD7
PCIAD15
PCIAD6PCIAD5PCIAD4PCIAD3PCIAD2PCIAD1PCIAD0
AGPPIPE*AGPWBF*
AGPSBA7AGPSBA6AGPSBA5AGPSBA4AGPSBA3AGPSBA2AGPSBA1AGPSBA0
AGP_MB_DET*
AGPSBSTBAGPSBSTB*
AGPVREF
AGPSTOP*AGPBUSY*
PCIGNT*
PCIRST*PCICLK
AGPADSTB0*AGPADSTB0AGPADSTB1*AGPADSTB1
AGPST2AGPST1AGPST0
AGP_CAL_PDAGP_CAL_PUAGP_DBI_LO
U43BGA
MAP31-64MB
FBDQS2
MEM_CAL_CLKMEM_CAL_PUMEM_CAL_PD
(3 OF 5)
FBDQS3
FBDQS0FBDQS1
VDDFBIO0
FBCLK1*
FBD1
FBCLK0FBCLK0*
FBAA0_0FBAA0_1
FBAWE*
FBD33
FBD8_0FBD8_1FBVREF
ROMA14
ROMCS*ROMA15
FBCLK1
FBACKE
VDDFBC
VIPD
VIPHAD0VIPHAD1
VIPHCTLVIPHCLK
VIPPCLK
BGAMAP31-64MB
U43
49.91%1/16WMF
R31
402
49.91%
1/16WMF
R30
402
49.91%1/16WMF
R29
402
05%1/16WMF
R1605
603
+2_5V_SLEEP
10K5%
1/16WMF
R1900
402
10K5%
1/16WMF
R1901
402
GND GND
(4 OF 5)BGA
MAP31-64MBU43
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 19 44A051-6278
IO_RESET_L IS NOT TOGGLED FOR SLEEP
MAIN_RESET_L IS TOGGLED FOR SLEEP
MEMORY CORE - 2.5V
MEMORY I/O - 2.5V
NC
NC
NC
NC
NC
NCCHANGE TO NC FOR NEXT SYMBOL UPDATEFB SIGNALS USED FOR INTERNAL TESTING ONLY NC
FBACKE PULL-DOWN IS NEEDED
THERE’S NO ON-CHIP VOLTAGE DIVIDER
NC
NC
NC
NC
HARDWARE DEBUG PORT
D3HOT VS. D3COLD POWER INTAKE
INTREPID AGP IS ALSO CONNECTED TO +1_5V_AGP
3V
2.5V
1.5V
FRAME BUFFER CLOCK TERMINATION
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
NC
MAP17 AGP/DDR RAM
NEED TO RESET GRAPHIC CHIP DURING RESTARTS
IMPORTANT NOTES ON MAP17
AGP 4X I/O - 1.5V
NCFOR AGP 8X
BECAUSE SINGLE AGP PWR PLANE AND CLOSE PROXIMITY OF CHIPS
(PLACE CLOSE TO NV17M AGP BALLS) AGP I/O REFERENCE
BULK CAP ON INTREPID SIDE
USE SIMPLE REFERENCE TO CHIP
21
D3HOT
2
1
2
1
2
1
21
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
D3HOT
2
1
D3COLD
21
D3COLD
2
1D3HOT
2
1D3COLD
2
1
D3HOT
2
1D3COLD
2
1MAP31
2
1
MAP31
2
1
2
1
NO STUFF
2
1
NO STUFF
21
NO STUFF
21
NO STUFF
21
NO STUFF
21
NO STUFF
AK29
AK26
AK23
AK20
AK17
AK14
AG20
AG17
AG14
AF30
AH25
AH26
AH11
AK12
AH27
AJ25
AK11
AG12
AH24
AK27
AJ12
AF21
AK25
AJ27
AH28
AC28
AH30
AG29
AF28
AG30
AD28
AK18
AF19
AE29
AJ18
AG19
AK19
AG18
AJ19
AG21
AK22
AH20
AJ22
AH21
AD29
AK24
AH22
AJ24
AH23
AG27
AK30
AG28
AJ30
AE28
AH29
AE30
AD30
C16
C15
C14
C13
C10
C1
B3
B28
B27
B25
B24
B22
B21
B19
B18
B16
B15
B13
B1
AB30
AB29
AB28
AA5
AA4
AA30
AA29
AA28
A3
A28
A27
A26
A25
A23
A22
A21
A20
A2
A17
A16
A15
A14
A13
A11
A10
A1
AK13
AH19
AH14
AH15
AG15
AC30
AG10
AG13
AF13
AF12
AH17
AH16
AH18
AJ16
AF16
AK16
AG16
AK15
AF15
AJ15
AJ13
AF18
AF10
AJ21
AK21
AJ28
AK28
OMIT
B7
B6
A5
C7
C8
G3
F1
G1
G2
K5
H3
J3
K4
AF6
AF4
AF27
AF25
AE5
AE26
J4
J27
AD4
G4
G27
F5
F26
E6
E4
E27
E25
D9
D7
AD27
D5
D26
D24
D22
AG7
AG5
AG26
AG24
AB27
F24
F22
AE9
AE7
AE24
AE22
AD6
AD25
J6
J25
G6
G25
F9
F7
AB6
AB25
AH2
F2
J1
J30
G30
K30
A18
E12
K28
AA26
F28
J28
AA27
D13
D28
A4
B4
C20
C21
C11
N28
B10
A24
OMIT
1
2MAP31
2
1MAP31
2
1MAP31
2
1
NO STUFF
2
1
2
1
J5J26J24H29H2G9G7G5
G26G24G22G20G17G14G11F6F4
F27F25E9E7E5
E29E26E24E22E20E2
E17E14E11D6
D25B8B5
B26B23B20B2
B17B14B11AJ5AJ29AJ26AJ23AJ20AJ2AJ17AJ14AJ11
AH12AG6AG25AF9AF7AF5AF29AF26AF24AF22AF20AF2AF17AF14AF11AE6AE4AE27AE25AD9AD7
Y7
AD5
Y5Y29Y26Y24
AD26
W19W18
AD24
W17W16W15W14W13W12
AD22
V19V18V17V16V15V14V13V12
AD20
U7U29U26U24
U19U18U17U16U15U14U13U12
T19T18
AD14
T17T16T15T14T13T12
AD11
R19R18R17R16R15R14R13R12
AC29
P7P29P26P24
P19P18P17P16
AC2
P15P14P13P12
N19N18
AB7
N17N16N15N14N13N12
AB5M19M18M17M16M15M14M13M12
AB26
L7L5L29L26
L24
AB24
J7
OMIT
CR-19
+1_5V_AGP
GPU_AGP_VREF
+1_5V_AGP
AGP_SB_STB
AGP_SB_STB_L
AGP_SBA<6>
AGP_SBA<7>
AGP_SBA<5>
AGP_SBA<4>
AGP_SBA<2>
AGP_SBA<1>
AGP_SBA<3>
AGP_SBA<0>
GPU_AGP_VREF
STOP_AGP_L
AGP_AD<31>
AGP_CBE<0>
CLK66M_GPU_AGP
AGP_CBE<1>
AGP_CBE<2>
AGP_CBE<3>
AGP_REQ_L
AGP_IRDY_L
AGP_FRAME_L
AGP_TRDY_L
AGP_DEVSEL_L
AGP_STOP_L
AGP_NV_WBF_L
AGP_PAR
AGP_NV_INT_L
AGP_RBF_L
AGP_ST<2>
AGP_NV_PIPE_L
AGP_ST<0>
AGP_ST<1>
AGP_AD_STB_L<0>
AGP_AD_STB<1>
AGP_AD_STB_L<1>
AGP_AD_STB<0>
AGP_BUSY_L
AGP_AD<28>
AGP_AD<29>
AGP_AD<30>
AGP_AD<15>
AGP_AD<18>
AGP_AD<17>
AGP_AD<16>
AGP_AD<20>
AGP_AD<19>
AGP_AD<21>
AGP_AD<22>
AGP_AD<23>
AGP_AD<25>
AGP_AD<24>
AGP_AD<26>
AGP_AD<27>
AGP_AD<2>
AGP_AD<0>
AGP_AD<1>
AGP_AD<3>
AGP_AD<5>
AGP_AD<4>
AGP_AD<7>
AGP_AD<6>
AGP_AD<8>
AGP_AD<10>
AGP_AD<9>
AGP_AD<13>
AGP_AD<12>
AGP_AD<11>
AGP_AD<14>
AGP_GNT_L
AGP_WBF_L
AGP_PIPE_L
GPU_FBCLK0
+2_5V_GPU_FB
GPU_FBCLK0_L
GPU_FBCLK1
+2_5V_GPU_FB
GPU_FBCLK1_L
+3V_GPU
+2_5V_GPU_FB
+1_5V_AGP
+1_5V_LDO
GPU_FBCLK1
GPU_VIPD7_TP
GPU_VIPD6_CRYSTAL<1>
GPU_VIPD5_PCI_DEVID<1>
GPU_VIPD4_PCI_DEVID<0>
GPU_VIPD3_PCI_DEVID<2>
GPU_VIPD2_ROMTYPE<1>
GPU_VIPD1_TP
GPU_VIPD0_TP
GPU_FBCLK1_L
GPU_FBCLK0_L
GPU_FBCLK0
GPU_FBACKE
+2_5V_GPU_FB
GPU_FB_VREF
+2_5V_GPU_FB
+2_5V_GPU_FB
MEM_CAL_PU
VIPPCLK_PD
MEM_CAL_CLK
MAIN_RESET_L
IO_RESET_L AGP_GPU_RESET_L
AGP_CAL_PD
+1_5V_AGP
AGP_CAL_PU
GPU_ROMA14_TP
GPU_ROMA15_TP
GPU_ROMCS_TP
+2_5V_GPU_FB
MEM_CAL_PD
GPU_VIPHTCL_TP
GPU_VIPHCLK_TP
GPU_VIPHAD0_TP
GPU_VIPHAD1_TP
38
38
38
39
38
20
20
38 20
30
20
19
19
21 19
26
30
19
17
17
20 17
38
24
27
17
16
38
16
37
37
37
37
37
37
37
37
37
37
38
37
37
36
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
36
38
36
36
38
36
15
38
16
35
36
36
36
36
38
38
38
21
26
16
38
13
19
13
13
13
13
13
13
13
13
13
13
13
19
13
13
13
13
13
13
13
13
13
13
13
13
13
13
15
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
19
19
19
19
19
19
13
19
13
16
19
21
21
21
21
21
19
19
19
19
38
19
19
18
18
13
19
402CERM6.3V20%0.22UFC234
805CERM6.3V20%10UFC213
805CERM6.3V20%10UFC212
402CERM6.3V20%0.22UFC126
402CERM6.3V20%0.22UFC83
402CERM6.3V20%0.22UFC71
402CERM6.3V20%0.22UFC69
402CERM6.3V20%0.22UFC82
402CERM6.3V20%0.22UFC286
402CERM6.3V20%0.22UFC127
402CERM6.3V20%0.22UFC197
402CERM6.3V20%0.22UFC50
402CERM6.3V20%0.22UFC128
402CERM6.3V20%0.22UFC199
402CERM6.3V20%0.22UFC284
402CERM6.3V20%0.22UFC70
402CERM6.3V20%0.22UFC235
402CERM6.3V20%0.22UFC198
402CERM6.3V20%0.22UFC287
402CERM6.3V20%0.22UFC151
402CERM6.3V20%0.22UFC233
402CERM6.3V20%0.22UFC152
402CERM6.3V20%0.22UFC285
402CERM16V20%0.01UFC363
402CERM16V20%0.01UFC340
402CERM6.3V20%0.22UFC68
10K5%1/16WMF
R229
402
10K1%1/16WMF
R276
402
1210CERM10V20%
22UFC658
C680330UF20%6.3VTANTSMD
MBRS130LT3SMD24
1N914SOT23
D5
603CERM25V20%
0.1UFC481603MF
1/16W1%
15R339
603CERM25V20%
0.1UFC467
15%1/16WMF
R347
603
576K1%1/16WMF
R281
402
1206CERM10V20%4.7UFC453
+5V_MAIN
05%1/16WMF
R283
402
49.9K1%1/16WMF
R374
40220K1%1/16WMF
R275
402
402CERM10V20%0.1UFC482402
MF1/16W
5%
10KR333
XW4SM
B00ST
SW
TG
EXTVCC VCC
INT VIN
SGND PGND
RUN/SS
BG
VFB
ITH
ION
PGOOD
VRNG
FCB
U19LTC1778SSOP
05%1/16WMF
R271
402402CERM25V5%
220PFC442
1210CERM25V20%
4.7UFC728
+PBUS
1M5%1/16WMF
R340
402
402CERM10V20%0.1UFC461
402CERM50V10%
470PFC432
20K1%
1/16WMF
R282
402
402CERM16V20%0.01UFC354
402CERM16V20%0.01UFC342
402CERM10V20%0.1UFC361
402CERM10V20%0.1UFC360
805CERM6.3V20%10UFC390
16.2K1%1/16WMF
R220
402
12.7K1%1/16WMF
R230
402
805CERM10V20%
2.2UFC408
402CERM10V20%0.1UFC339
805CERM6.3V20%10UFC393
805CERM6.3V20%10UFC391
05%1/16WMF
R219
603
05%1/16WMF
R217
603
1K1%1/16WMF
R206
402
1K1%1/16WMF
R201
402402CERM16V10%0.047UFC343
402CERM16V10%0.047UFC341
10K5%
1/16WMF
R227
402
10K5%1/16WMF
R218
402
402MF
1/16W1%
49.9R236
63.4K1%1/16WMF
R284
402
05%1/16WMF
R277
402
10K5%
1/16WMF
R187
402
10K5%
1/16WMF
R198
402
10K5%
1/16WMF
R167
402
10K5%1/16WMF
R174
402
402MF
1/16W1%
49.9R237
402CERM50V10%470PFC406
402CERM50V10%
470PFC407
402MF
1/16W1%
49.9R157
402MF
1/16W1%
49.9R158
402CERM50V10%470PFC252
402CERM50V10%
470PFC253
402MF
1/16W1%
49.9R240
402CERM50V10%470PFC410
402CERM50V10%
470PFC409
402MF
1/16W1%
49.9R241
402MF
1/16W1%
49.9R216
402CERM50V10%470PFC375
402CERM50V10%
470PFC376
402MF
1/16W1%
49.9R215
Q42IRF7805SM
1210CERM25V20%
4.7UFC733
C681330UF
20%6.3VTANTSMD
C682330UF
20%6.3VTANTSMD
3.8UHL25
SM402
CERM16V20%
0.01UFC510
05%
1/16WMF
R378
402
G
D
SSOT-3632N7002DWQ12
G
D
SSOT-3632N7002DWQ12
SYM_VER2
GND
OUTIN
BYP ADJ
SOT-23-1LTC1761ES5-BYP
U8
402CERM10V20%0.1UFC400
GPIOD9
GPIOD8
GPIOD7
(5 OF 5)
TXD10TXD10*
TXC1TXC1*
TXD7*TXD7
TXD6TXD6*TXD5
TXD5*TXD4
TXD4*
TXC2TXC2*
TXC0*TXC0
TXD3TXD3*
TXD2*TXD2
TXD1TXD1*TXD0
TXD0*
TXD9TXD9*TXD8
TXD8*
GPIOD2
GPIOD3
GPIOD4
GPIOD5
GPIOD6
GPIOD1
I2C2SCLI2C2SDA
I2C0SDAI2C0SCL
I2C1SDAI2C1SCL
IFP0IOBGND
IFP0PLLGND
IFP0PLLVDD
IFP0VREF
IFP0RSET
TESTMODE
IFP0IOAVDD
IFP0IOAGND
IFP0IOBVDDIFP1IOGND
IFP1PLLVDD
IFP1PLLGND
IFP1VREF
IFP1RSET
BUFRST*
IFP1IOVDD
GPIOD0
VDDCORE
BGAMAP31-64MB
U43
10K5%
1/16WMF
R142
402
10K5%1/16WMF
R150
402
402MF
1/16W5%
0R2000
05%
1/16WMF
R2001
402
100K5%
1/16WMF
R2003
402
100K5%
1/16WMF
R2002
402 SOT-363BAS16TWDP20
SM2N3904Q2000
SM2N3904Q2001
10K5%
1/16WMF
R2004
402
SOT-363BAS16TWDP20
SOT-363BAS16TWDP20
+5V_MAIN
Q39IRF7811WSO-8
402CERM10V20%0.1UFC362
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 20 44A051-6278
ACTIVE HIGH
ACTIVE HIGH
ONLY "GPIO"
PLACE VREF AND RSET DISCRETE CLOSE TO PIN
CHANGE TO FERRITE IF NECESSARY
2.8V IS DEPENDENT ON CORE VOLTAGE
ADDR X36
ADDR X3E
ADDR X50
LVDS
TMDSVGA
UNUSED
MAP17 PWR/LVDS/TMDS
THIS IS A BUFFERED VERSION OF PCI RESETNVIDIA CONFIRMED NO CONNECT ON BUFRST*
2.8V IFP PLL SUPPLY
SHARES 10UF
FOR IFP0 AND IFP1
ONE SET OF ,0.1UF,0.01UFVOUT = 1.22(1 + R2/R1) + IADJ*R2
IADJ = 30NA AT 25C
GPIOS ARE PLACED IN TRISTATE DURING SLEEP
GPIOS HAVE CLAMP TO 5V
ALL I2C ARE 5V TOLERANT
ONLY GPIO6 IS ENABLED
I2C1 PULL-UP
TRACE SO THAT IT MAY BE CUT BETWEEN CAPS
CMF LINE SHOULD BE ROUTED AS 4MIL SURFACE
TMDS TERMINATIONTERMINATION NETWORK SHOULD BE CONNECTED AS SHOWN
WHEN LOW => 1.2V
GPU VCORE SUPPLY
’0’ DURING SLEEP/RUN’1’ DURING SHUTDOWN
VOUT = 0.8V * (1 + UPPER R / LOWER R)
57.6K IN PARALLEL => VOUT = 1.338V53.6K IN PARALLEL => VOUT = 1.35V49.9K IN PARALLEL => VOUT = 1.36V
WHEN HIGH => 1.36V
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
12
1
3
1
2
1
21
2
1
2
1
2
1
2
1
4.7UF
2
1NO STUFF
2
1
GPU_SWITCH
2
1
2
1
GPU_SWITCH
21
GPU_SWITCH21
OMIT
3
10
8
15
14
6
1
2
13
5
7
11
4
9
16
12
CRITICAL
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
12
1
2
12
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
2
1
2 1
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
2 1
2
1
2
1
2 12 1
2
1
2
1
2 1
2
1
2
1
2 1
2 1
2
1
2
1
2 1
321
4
8765
CRITICAL 2
1
2
1
2
1
21
CRITICAL
2
1
D3HOT
2
1 D3HOT
4
5
3
1
2
6
CRITICAL
2
1
F14
F11
D20
D17
D14
D11
AE20
Y6Y27
Y25
U6
AE17
U27
U25
P6P27
P25
L6L27
L25
F20
F17
AE14
AE11
M4
M5
M3
N3
W4
W5
V4
V5
T3
U3
U4
U5
P1
P2
P3
R3
N4
N5
R4
R5
P4
P5
K3
L3
T4
T5
K1
K2
AJ3
L2
L1
N1
N2
M1
M2
R2
R1
V1
V2
U1
U2
T1
T2
AJ6
AK6
AH4
AH5
AJ4
AK4
C12
B12
F3
C5
B9
C9
A8
A7
A6
C6
A9
OMIT
2
1
MAP31
2
1
MAP31
2 1
D3HOT
2
1D3COLD
2
1
2
1
6 1
2
3
1
2
3
1
2
1
52
43
321
4
8765
CRITICAL
2
1
CR-20
GPU_VCORE_CNTL_L_RC
1778_VFB
GPU_IFP0RSET
GPU_IFP0VREF
GPU_XOR_TESTMODE_ENABLE
+3V_GPU_AVDD0
GPU_IFP1VREF
GPU_VCORE
GPU_SSCLK_S0
GPU_TMDS_DN<0>
GPU_TMDS_DP<0>
GPU_TMDS_DN<1>
GPU_TMDS_DP<1>
+3V_GPU_AVDD1
+2_8V_IFP_PLLVDD
GPU_IFP1RSET
+2_8V_IFP_PLLVDD
GPU_DVI_DDC_CLK
GPU_DVI_DDC_DATA
GPU_I2C1SDA
GPU_I2C1SCL
LVDS_DDC_DATA
LVDS_DDC_CLK
INV_ON_PWM
FP_PWR_EN27 26
HPD_PWR_SNS_EN
GPU_HPD
GPU_SUS_STAT_L_PU
GPU_SSCLK_S1
GPU_TMDS_CLKN
GPU_TMDS_CLKP
LVDS_L3N_SPN
LVDS_L3P_SPN
LVDS_L0N
LVDS_L0P
LVDS_L1N
LVDS_L1P
LVDS_L2N
LVDS_L2P
CLKLVDS_LN
CLKLVDS_LP
GPU_TMDS_DP<2>
GPU_TMDS_DN<2>
LVDS_U0N
LVDS_U0P
LVDS_U1N
LVDS_U1P
LVDS_U2N
LVDS_U2P
LVDS_U3N_SPN
LVDS_U3P_SPN
CLKLVDS_UN
CLKLVDS_UP
GPU_VCORE_CNTL_L
GPU_GPIO8
GPU_GPIO9
GPU_BUFRST_TP
SLEEP_L_LS5
1778_SHDN_L_D3COLD
DCDC_EN
1778_VIN
+3V_GPU
1778_GND
1778_SHDN_L
GPU_VCORE_SEQ_L
GPU_VCORE_SEQ
GPU_VCORE_PWR_SEQ
+1_5V_AGP
1778_ITH_RC
1778_FCB
1778_ITH
1778_VRNG
1778_BST
1778_TG
1778_VCC
1778_ION
LTC1778_SHDN
1_5V_2_5V_OK
DCDC_EN_L
1778_GND
1778_BST_RC
GPU_VCORE_CNTL_L
HIGH_VCORE
TMDS_D2_CMF
TMDS_DP<2> TMDS_DN<2>
TMDS_D1_CMF
TMDS_DP<1> TMDS_DN<1>
TMDS_D0_CMF
TMDS_DP<0> TMDS_DN<0>
+3V_GPU
+2_8V_IFP_PLLVDD
2_8V_BYP
+3V_GPU
2_8V_ADJ1
TMDS_CLK_CMF
TMDS_CLKP TMDS_CLKN
+3V_GPU
+3V_GPU
1778_BG
GPU_VCORE_SW
GPU_VCORE
38
38
38
38
38
39
21
38
21
21
21
21
35
34
20
19
39 39
39 39
39 39
20
20
20
20
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
34
33
19
17
37 37
37 37
37 37
19
19
37 37
19
19
39
38
38 38
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
33
32
15
38
16
38
35
38
22 22
22 22
22 22
15
38
15
22 22
15
15
38
38
38
20
21
21
21
21
21
38
20 20
22
22
22
22
22
22
22
22
21
21
21
22
22
22
22
22
22
22
22
21
21
22
22
22
22
22
22
22
22
20
27
29
38
13
20
13
38
38
38
38
38
38
38
38
35
33
20
38
20
21 21
21 21
21 21
13
20
13
21 21
13
13
38
38
20
805CERM6.3V20%10UFC324
05%1/16WMF
R127
603
1131%1/16WMF
R164
402
63.41%1/16WMF
R196
402402CERM16V20%0.01UFC353
05%1/16WMF
R228
603
05%1/16WMF
R183
603
402CERM10V20%0.1UFC359
402CERM10V20%0.1UFC325
805CERM6.3V20%10UFC395
805CERM6.3V20%10UFC211
805CERM6.3V20%10UFC629
402CERM10V20%0.1UFC634
402MF
1/16W5%
33R620
+3V_SLEEP
SMFERR-EMI-100-OHML19
XIN/CLKINSSCLK
VSSS0S1
FRSEL
XOUT
VDD
SOICY25811U46
10K5%1/16WMF
R235
402
10K5%1/16WMF
R234
402
10K5%
1/16WMF
R211
402
10K5%1/16WMF
R243
402
10K5%
1/16WMF
R197
402
10K5%1/16WMF
R208
402
10K5%
1/16WMF
R223
402
10K5%1/16WMF
R222
402
10K5%
1/16WMF
R224
402
10K5%1/16WMF
R221
402
10K5%
1/16WMF
R159
402
10K5%
1/16WMF
R160
402
10K5%
1/16WMF
R195
402
751%1/16WMF
R605
402
751%1/16WMF
R149
402
751%1/16WMF
R165
402
751%1/16WMF
R205
402
751%1/16WMF
R203
402
751%1/16WMF
R204
40210K5%
1/16WMF
R631
402
10K5%
1/16WMF
R632
402
10K5%1/16WMF
R200
402
10K5%
1/16WMF
R210
40210K
5%1/16W
MF
R233
40210K5%1/16WMF
R238
402
10K5%1/16WMF
R239
402
10K5%
1/16WMF
R209
402
10K5%1/16WMF
R212
402
10K5%
1/16WMF
R232
402
10K5%
1/16WMF
R633
402
402CERM50V5%27PFC351
402CERM50V5%
27PFC281
402MF
1/16W5%
10MR172
05%
1/16WMF
R171
402
402MF
1/16W5%
0R180
402MF
1/16W5%
0R613
10K5%1/16WMF
R184
402
10K5%
1/16WMF
R213
402
10K5%1/16WMF
R190
402
10K5%
1/16WMF
R214
402
Y2SM-3
27.000M
05%
1/16WMF
R615
402
05%1/16WMF
R619
402
05%
1/16WMF
R614
402
05%1/16WMF
R623
402
MSTRAPSEL3MSTRAPSEL2MSTRAPSEL1MSTRAPSEL0
THERMDATHERMDC
XTALSSIN
XTALIN
VDD(MAP31)3.3V
VDD3.3V
VDD5V
PLLVDD
(2 OF 5)
DACVREFDACRSET
NCNC
XTALOUTBUFFVDDDVO_1
DVOD8
DVOD0DVOD1DVOD2DVOD3DVOD4
DVOVSYNCDVOHSYNCDVOCLKIN
VDDDVO_0
DVOD11DVOD10DVOD9
DVOD7DVOD6DVOD5
XTALOUT
DVOCLKOUT*DVOCLKOUTDVODEDVOVREF
DAC2BLUE
CRT2VSYNC
DAC2VDDDAC2GND
CRT2HSYNC
DAC2REDDAC2GREEN
DAC2VREFDAC2RSET
DACREDDACGREENDACBLUE
CRTVSYNCCRTHSYNC
DACGNDDACVDD
U43MAP31-64MB
BGA
402CERM10V20%0.1UFC316
402CERM10V20%0.1UFC344
805CERM6.3V20%10UFC394
402CERM10V20%0.1UFC232
402CERM10V20%0.1UFC315
402CERM10V20%0.1UFC338
402CERM10V20%0.1UFC319
402CERM10V20%0.1UFC337
402MF
1/16W5%
33R179
10K5%1/16WMF
R750
402
10K5%
1/16WMF
R751
402
10K5%
1/16WMF
R749
402
10K5%
1/16WMF
R748
402
400-OHM-EMIL4
SM-1
402CERM50V5%
100PFC846
402CERM50V5%
100PFC848
402CERM50V5%
100PFC847
402CERM50V5%
100PFC849
402CERM50V5%100PFC850
400-OHM-EMIL5
SM-1
400-OHM-EMIL53
SM-1
805CERM6.3V20%
10UFC845
805CERM6.3V20%
10UFC844
402MF
1/16W5%
33R166
402MF
1/16W5%
33R156
805CERM6.3V20%10UFC852
402CERM50V5%100PFC851
805CERM6.3V20%
10UFC24
3305%1/16WMF
R752
402
SM11/16W
RP55335%
SM11/16W
RP56335%
SM11/16W
RP570K5%
SM11/16W
RP580K5%
PAD
THRML
GND
SDA/DK0SCL/DK1
AGND
PD*EDGE/HTPLG
DEHSYNCVSYNCIDCK+IDCK-
D11D10
D2D3D4D5D6D7D8D9
D1D0
GND
GND
AVCC
PVCC2
PVCC1
VCC
AVCC
VCC
EXT_SWING
VREF
TX1+
TX2-
TX1-
TX2+
TX0+TX0-
TXC-TXC+
MSEN
PGND
AGND
PGND
AGND
CTL3/A2ISEL/RST*
TSSOP
SIL1162U55
10K5%
1/16WMF
R757
402
05%1/16WMF
R760
603
402CERM16V20%0.01UFC352
402CERM16V20%0.01UFC250
402CERM10V20%0.1UFC231
402CERM16V20%0.01UFC312
402CERM16V20%
0.01UFC263
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 21 44A051-6278
PLL NOISE SHOULD BE LESS THAN 100MV PEAK-TO-PEAK
OKAY PER ICT
PTREEOUT
DVOCLKOUT* NOT USED IN HIGH SWING
MAP17 BOOT STRAPS
SET TO HIGH SWING MODE
FOR EXTERNAL TV OUT SUPPORTDVOCLKIN IS USED ONLY
TO GND OR UNCONNECTED ON SUBSTRATEMSTRAPSEL WILL BE CONNECTED
CRYSTAL = 2: 27MHZ CRYSTALPCI_AD = 1: NORMAL AGP PIN OUTSUBVENDOR = 0: NO VIDEO BIOS ROM
BUSTYPE
ROMTYPE<0>
CRYSTAL<1>
CRYSTAL<0>
RAMCFG<3>
RAMCFG<2>
RAMCFG<1>
RAMCFG<0>
DEVID<3>
DEVID<2>
DEVID<1>
DEVID<0>
SUBVENDOR
PCI_AD
BUS TYPE = 1: AGPROM TYPE <1..0> = 00: ONLY
PCI_DEVID<3..0> = 1001: MAP17(464)RAM CONFIG<3..0> = 1101: 4MX32, 1 DQS PER BYTE, LOW DRIVE STRENGTH
(NVIDIA CONFIRMED OKAY)
MAP17 ANALOG DAC/BOOT STRAPS
SPREAD SPECTRUM SUPPORT
MAP TMDSSILICON IMAGE 1162 TMDS
REPLACE WITH FERRITE IF NECESSARY
PLACE SERIES R CLOSE TO GPU
Y2 LOAD CAPACITANCE IS 18PF
DVO<7..0> HARDWARE DEBUG PORT
TESTCTL0_TP
TESTCTL1_TP
TESTCTL2_TP
S0=1;S1=M => -1.5% DOWN-SPREADDIVIDER ON CHIP - SO M IS TO FLOAT THE LINES
THERE’S 20K (10K/10K) RESISTOR
NC
NC
3.3V IO SUPPLY
REPLACE WITH FERRITE IF NECESSARY
REPLACE WITH FERRITE IF NECESSARY
NCNCNC
XTALOUTBUFF GENERATED INTERNALLY
TESTCTL3_TP
PLACE CLOSE TO PIN
DVO VREF
NC
NCNC
NC
NCNC
NCNC
NC
NC
NCNC
NC
NC
NCNCNCNC
NC
NCNCNCNC
NC
NCNCNC
NC
NCNCNCNCNC
NCNC
NC
NCNC
NCNC
NCNC
NC
NCNCNC
NCNC
NCNCNCNCNCNCNCNCNCNCNCNC
NCNCNCNCNCNCNCNCNCNC
NCNCNC
NCNC
NC
NCNC
NCNC
NCNC
EXTERNAL SPREAD SPECTRUM CLOCK INPUT
IPDIPDIPDNC
NC
SHOULD BE 10MIL SPACINGCHANGED TO 8MIL BECAUSE OF PACKAGE PWR PINS
2
1
2
1
1
2
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1GPU_SS
2
1GPU_SS
21
GPU_SS
2
1
GPU_SS
8
1
2
7
5
3
4
6
GPU_SS
CRITICAL
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1
NO STUFF2
1
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
12
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
NO STUFF
2
1
21
NO STUFF
21
NO STUFF
2
1
NO STUFF2
1
2
1
2
1NO STUFF
31
CRITICAL
2
1NO STUFF
2
1NO STUFF
2
1NO STUFF
2
1
GPU_SS
AH7
AH6
AK7
AJ7
AG4
AF3
D4
AG11
AG22
AD17
A19
A12
Y4
L4
H1
E1
W30
M30
AH13
AF1
AC1
D3
E3
AK5
Y30Y28
W29W28W27W26V30V3V29V28V27V26U30U28T30T29T28T27T26R30R29R28R27R26
P30
P28N30N29
N27N26
M29M28M27M26L30L28
K29K27K26
J29J2
H30H28
G29G28F30F29E30E28E21E19E18E16E15E13E10D30D29D27D21D2
D19D18D16D15D12D10D1C4
C30C3
C29C28C27C26C25C24C23C22C2
C19C18C17
AG9AB4
A29
A30
B29
B30
AC3
AB1
AB3
AK1
AE2
AE3
AE1
AD3
AG2
AG1
AJ1
AH3
AH1
AG3
AK3
AK2
AD1
AD2
AB2
AK9
AK10
AJ8
AJ9
AJ10
AK8
AH8
Y1
AA1
W2
Y2
AA2
W1
W3
AH9
AH10
Y3
AA3 OMIT
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
GPU_SS
2
1
NO STUFF
2
1
2
1
NO STUFF
2
1
21
2
1
2
1
2
1
2
1
2
1
21
21
2
1
2
1
12
12
2
1
2
1
2
1
2
1
5
6
7
8
4
3
2
1
5
6
7
8
4
3
2
1
5
6
7
8
4
3
2
1
NO STUFF
5
6
7
8
4
3
2
1
NO STUFF
21
2
22
3
32
33
41
42
38
39
35
36
49
26
27
46
28
45
29
47
48
25
11
12
20
1
23 4
30
44
19
7
8
9
10
13
14
15
16
5
6
17
18
24
40
34
31
43
37
2
1
NO STUFF
2
1
2
1
2
1
2
1
2
1
2
1
CR-21
GPU_CRT2HSYNC_TP
GPU_CRT2VSYNC_TP
+3V_GPU
+3V_GPU_DVO
+3V_GPU
SI_TMDS_DN<2>
SI_TMDS_CLKP
SI_TMDS_DP<0>
SI_TMDS_DP<1>
SI_TMDS_DP<2>
SI_TMDS_DN<1>
SI_TMDS_DN<0>
SI_TMDS_CLKN
MAIN_RESET_L
SI_DK<0>
SI_DK<1>
+3V_GPU
+3V_GPU13 15
GPU_DVO_CLKIN
+3V_GPU
GPU_SSCLK_UF
GPU_CLK27M_OUT
GPU_SSCLK_S1
CY25811_S1
GPU_SSCLK_S0 CY25811_S0
GPU_SSCLK_IN
+3V_GPU_SS
CLK27M_XTAL_IN
GPU_CLK27M_OUT
GPU_DVO_VREF
VGA_HSYNC
VGA_VSYNC
+3V_GPU
SI_TMDS_DP<0>
SI_TMDS_DN<0>
SI_TMDS_CLKP
SI_TMDS_CLKN
TMDS_DP<0>
TMDS_DN<0>
TMDS_CLKP
TMDS_CLKN
SI_TMDS_DN<2>
SI_TMDS_DP<1>
SI_TMDS_DN<1>
TMDS_DP<2>
TMDS_DN<2>
TMDS_DP<1>
TMDS_DN<1>
GPU_TMDS_CLKN
GPU_TMDS_CLKP
GPU_TMDS_DN<0>
GPU_TMDS_DP<0>
TMDS_CLKN
TMDS_CLKP
TMDS_DN<0>
TMDS_DP<0>
GPU_TMDS_DN<1>
GPU_TMDS_DP<1>
GPU_TMDS_DN<2>
GPU_TMDS_DP<2>
TMDS_DN<1>
TMDS_DP<1>
TMDS_DN<2>
TMDS_DP<2>
SI_TMDS_CLKN SI_CLKTMDS SI_TMDS:::50 8 MIL SPACING
SI_TMDS_CLKP SI_CLKTMDS SI_TMDS:::50 8 MIL SPACING
SI_TMDS_DN<0> SI_TMDS_D0 SI_TMDS:::50 8 MIL SPACING
SI_TMDS_DP<0> SI_TMDS_D0 SI_TMDS:::50 8 MIL SPACING
SI_TMDS_DN<1> SI_TMDS_D1 SI_TMDS:::50 8 MIL SPACING
SI_TMDS_DP<1> SI_TMDS_D1 SI_TMDS:::50 8 MIL SPACING
SI_TMDS_DN<2> SI_TMDS_D2 SI_TMDS:::50 8 MIL SPACING
SI_TMDS_DP<2> SI_TMDS_D2 SI_TMDS:::50 8 MIL SPACING
GPU_DVOD<1>
GPU_DVOD<10>
GPU_VIPD2_ROMTYPE<1>
GPU_DVOD<6>
GPU_DVOD<3>
GPU_DVOD<2>
GPU_DVOD<5>
GPU_DVOD<4>
+3V_GPU
+3V_GPU
GPU_TMDS:::50GPU_CLKTMDSGPU_TMDS_CLKP 10 MIL SPACING
GPU_TMDS:::50GPU_CLKTMDSGPU_TMDS_CLKN 10 MIL SPACING
GPU_TMDS:::50GPU_TMDS_D0GPU_TMDS_DN<0> 10 MIL SPACING
GPU_TMDS:::50GPU_TMDS_D1GPU_TMDS_DN<1> 10 MIL SPACING
GPU_TMDS:::50GPU_TMDS_D0GPU_TMDS_DP<0> 10 MIL SPACING
GPU_TMDS:::50GPU_TMDS_D1GPU_TMDS_DP<1> 10 MIL SPACING
GPU_TMDS:::50GPU_TMDS_D2GPU_TMDS_DN<2> 10 MIL SPACING
GPU_TMDS:::50GPU_TMDS_D2GPU_TMDS_DP<2> 10 MIL SPACING
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<5>
GPU_DVOD<6>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<2>
GPU_DVOD<1>
GPU_DVOD<0>
GPU_DVO_CLKP
GPU_DVO_VSYNC21
GPU_DVO_HSYNC21
GPU_DVO_DE
GPU_DVOD<11>
GPU_DVOD<10>
SI_EDGE
+3V_SI_AVCC
SI_EXT_SWING_SET
+3V_SI_VCC
SI_I2C_OFF
+3V_SI_PLLVCC
GPU_MSTRAPSEL<3>
GPU_MSTRAPSEL<2>
GPU_MSTRAPSEL<1>
GPU_MSTRAPSEL<0>
GPU_THERMDA_TP
GPU_THERMDC_TP
GPU_SSCLK_IN
GPU_CLK27M_UF
GPU_DVOD<11>
GPU_DVOD<10>
GPU_DVOD<7>
GPU_DVOD<8>
GPU_DVOD<9>
GPU_DVOD<6>
GPU_DVOD<5>
GPU_DVOD<2>
GPU_DVOD<3>
GPU_DVOD<4>
GPU_DVOD<1>
GPU_DVOD<0>
GPU_DVO_VSYNC21
GPU_DVO_CLKN_TP
GPU_DVO_HSYNC
GPU_DVO_CLKIN
GPU_DVO_CLKP
GPU_VSYNC
GPU_HSYNC
+3V_DAC1VDD
GPU_B
GPU_R
GPU_G
CLK27M_GPU_XOUT
GPU_COMP
+3V_DAC2VDD
GPU_C
GPU_Y
GPU_RSET2
GPU_DACVREF2
GPU_RSET1
GPU_DACVREF1
+3V_GPU_PLLVDD
CLK27M_GPU_XIN
GPU_DVO_DE
GPU_DVO_VREF
GPU_MSTRAPSEL<2>
GPU_MSTRAPSEL<3>
GPU_MSTRAPSEL<1>
GPU_MSTRAPSEL<0>
GPU_VIPD6_CRYSTAL<1>
GPU_DVOD<11>
GPU_DVO_HSYNC
GPU_VIPD3_PCI_DEVID<2>
GPU_VIPD4_PCI_DEVID<0>
GPU_VIPD5_PCI_DEVID<1>
GPU_DVOD<0>
13 +3V_GPU15
GPU_FBACAS_TP
SI_TMDS_DP<2>NO_TEST=TRUE
38
38
39
38
38
38
38
38
38
38
21
21
30
21
21
21
21
39
39
39
39
39
39
39
39
39
39
39
39
21
21
21
20
20
26
20
20
20
20
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
20
20
20
19
19
24
19
19
19
19
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
19
19
19
15
15
19
15
15
15
36
36
36
39
39
15
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
37
37
37
37
37
37
37
15
15
21
21
21
21
21
21
21
21
37
37
37
37
37
37
37
37
37
37
36
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
37
37
37
37
36
37
37
37
15
13
38
13
21
21
21
21
21
21
21
21
18
13
13
21
13
36
21
20
20
21
38
36
21
21
22
22
13
21
21
21
21
20
20
20
20
21
21
21
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
21
21
21
21
21
21
21
21
21
21
19
21
21
21
21
21
13
13
20
20
20
20
20
20
20
20
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
38 38
38
21
21
21
21
21
36
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
21
38
22
22
22
36
22
38
22
22
38
36
21
21
21
21
21
21
19
21
21
19
19
19
21
13
21
+5V_MAIN
100K5%
1/16WMF
R256
402
402CERM50V20%0.001UFC721
402CERM50V20%0.001UFC713
402CERM50V20%0.001UFC709
805CERM6.3V20%10UFC418
FERR-1K-OHM-EMIL26
SM
400-OHM-EMIL29
SM-1
+PBUS
+3V_PMU
402CERM10V20%
0.1UFC594
G2
D2S2
SC70-6FDG6324L
Q1
G1
S1
D1
Q1FDG6324LSC70-6
0.068uHL15
SM
402CERM50V0.25%3.3PFC616
402CERM50V0.25%3.3PFC608
402CERM50V0.25%3.3PFC615
0.068uHL10
SM
402CERM50V5%
4.7PFC618
0.068uHL12
SM
402CERM50V5%
4.7PFC609
0.068uHL16
SM
402CERM50V5%
4.7PFC617
0.068uHL11
SM
0.068uHL13
SM
10K5%1/16WMF
R585
402
10K5%1/16WMF
R576
402
G
SD
SOT-3632N7002DW
Q29
+3V_SLEEP
G
SD
SOT-3632N7002DW
Q29
100K5%1/16WMF
R607
402402CERM50V5%100pFC604
4.7K5%1/16WMF
R570
4024.7K
5%1/16W
MF
R575
402
402CERM50V5%100pFC633
603CERM50V20%0.01UFC657
400-OHM-EMIL18
SM-1
G
SD
SOT-3632N7002DW
Q68
F10.5AMP-13.2V
SM
MBR0530
D21SM
402CERM50V5%100pFC603
SM2N3904Q36
402MF
1/16W5%
20KR610
402CERM10V20%0.1UFC625
68.1K1%
1/16WMF
R593
402
SM
U45LMC7211
402MF
1/16W1%
10KR577
100K1%
1/16WMF
R594
402
10K1%
1/16WMF
R598
402
G
D
SSOT-3632N7002DWQ33
100K5%
1/16WMF
R611
402
SM2N3904Q34
402MF
1/16W5%
10KR604
3305%
1/16WMF
R600
402
G
DS
TP0610SM
Q32
603CERM50V20%
0.01UFC656
FERR-10-OHM-500MAL21
SM
3.3UHL20
0603
3.3UHL24
0603
603CERM50V20%
0.01UFC676
3.3UHL22
0603
FERR-10-OHM-500MAL23
SM
+3V_SLEEP
+5V_SLEEP
XW14SM
XW15SM
05%
1/16WMF
R618
402
05%1/16WMF
R500
402
402MF
1/16W5%
100R584
402MF
1/16W5%
100R563
402MF
1/16W5%
100R564
SM-2MTJ8
400-OHM-EMIL28
SM-1
SYM_VER-1
L17165-OHM
SM
MINIDINJ17RT-THMH1177
402CERM50V20%
0.001uFC405
100K5%
1/16WMF
R267
402
402CERM50V20%
0.001uFC433
+3V_SLEEP
100K5%
1/16WMF
R272
402
F-RT-SM
J7G-501973
C4730.001uF
402CERM50V20%
402CERM50V20%
0.001uFC443
FERR-250-OHML2
SM
+3V_MAIN
C4622200pF
603CERM50V5%
TSOP
Q5SI3443DV
402MF
1/16W5%
100KR313
100K5%1/16WMF
R320
402
S
D
G
Q22N7002SM
32U32
TSSOP74LVC32
402MF
1/16W5%
680R603
C6010.01uF
603CERM50V20%
F-RT-THQH1112J16
402MF
1/16W5%
0R2200
68K5%1/16WMF
R756
402
+PBUS
G
DS
TP0610SM
Q70 3305%1/16WMF
R755
402
1210CERM6.3V20%
47UFC853
D S
GSOT-3632N7002DWQ33
100K5%
1/16WMF
R754
402
100K5%
1/16WMF
R671
402
402CERM50V20%
0.001uFC865
402CERM50V10%
560PFC643
402CERM50V10%
560PFC690
402CERM50V10%
560PFC678
402CERM50V10%
560PFC632
402CERM50V10%
560PFC688
402CERM50V10%
560PFC677
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 22 44A051-6278
SHARES LOGIC WITH KB RESET SIGNALS (PG 28)
INVERTER INTERFACE
LCD POWER SWITCHES
LCD INTERFACE
DVI POWER SWITCHEXTERNAL VIDEO (DVI) INTERFACE
no-panel case (development)Panel has 2K pull-ups
100K pull-ups are for
NC
LVDS INTERFACE
INVERTER EXPECTS ACTIVE HIGH SIGNAL
PLACE CLOSE TO CONNECTOR
PLACE CLOSE TO CONNECTOR
ANALOG FILTERING
TMDS FILTERING NOTE: Pulldown for DVI_HPD provided by DVI power switch interface
VIDEO CONNECTORS
3904 from turning
has active, self-
Pulldown prevents
powered DDC clock
on when DVI monitor
pullup.
Isolation required for DVI power switch
(TMDS_DN<4>)
(+5V_DDC SLEEP)
(TMDS_DP<3>)
(TMDS_DP<4>)
(TMDS_DN<3>)
DVI DDC CURRENT LIMIT(55mA requirement per DVI spec)
3V LEVEL SHIFTERS
DDC_CLK is isolated from
into DDC_CLK. Since host rails
system is shutdown or asleep..
power key on remote deviceis pressed, 5V will be driven
Power key detect path when
NV17M DURING SHUTDOWN. WHEN
will be low, TP0610 will turnon, driving SOFT_PWR_ON_L low.
Isolation will be disabled as well.device path into DDC_CLK.
As host rails rise, TP0610will turn off, as will remote
(LVDS DDC POWER)
(TMDS_DN<5>)
(TMDS_DP<5>)
PLACE NEAR C5A & C5BPLACE NEAR 3, 11 & 19
S-VIDEO/COMP OUT INTERFACEPlace GND shorts at
Place GND shorts at
graphics controller
graphics controller
COMPARATOR ENABLED BY NV17MAP
Power key detect path
HPD will be driven to 5V.on remote device pressed,3.3V. When power keyHPD normally driven towhen system is running.
GPIO.
NOTE: DVI_HPD SHARES Q68 WITH ALSBECAUSE OF BOARD REAL ESTATE
NC
NC
NC
NC
NC
NC
NEED PULL-DOWN BECAUSE THISSIGNAL IS TRISTATED INITIALLY
2
1
2
1
CHGND2
2
1
2
1
2
1
12
21
2
1
4
3
2
6
1
5
6
21
2
1
2
1
2
1
21
2
1
21
2
1
21
2
1
21
21
2
1
2
1
1
2
6
4
5
3
2
1
2
1
2
1
2
1
2
1
2
1
CHGND1
21
4
5
3
21
21
2
1
2
3
121
2
1
2
1
2
5
1
3
4
21
2
1
2
1
1
2
6
2
1
2
3
121
2
1
2
1
3
2
1
CHGND1
CHGND1
21
21
21
2
1
21
21
21
21
2
1
2
1
21
21
21
4
3
2
1
6
5
CRITICAL
21
4
32
1
CRITICAL
5
4 3
2 1
1110
98
CRITICAL
CHGND4
2
1
2
1
2
1
CHGND4
2
1
9
8
7
6
5
4
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
34
33
CRITICAL
CHGND4
2 1
CHGND4
2
1
21
21 4
3 6
5
2
121
2
1
2
1
3
14
3
2
1
7
2 1
CHGND5
CHGND2
21
9
8
7
6
5
4
3
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
36
35
34
33
32
31
C5B C5A
C4
C3
C2
C1
CRITICAL
21
2
1
2
1
32
1
2
1
4
5
3
2
1
2
1
2
1
NO STUFF
2
1
2
1
2
1
2
1
2
1
2
1
CR-22
HPD_PWR_SNS_EN
HPD_ON
HPD_PWR_SW
COMP_ENABLEHPD_BASE
SOFT_PWR_ON_L
COMP_DISABLE
DVI_HPD_UF DVI_HPD_DIV
HPD_4V_REF
+3V_LCD
DVI_DDC_CLK_UF DVI_TURN_ON
+5V_DDC_SLEEP
DVI_TRUN_ON_ILIM
DVI_TURN_ON_BASE
GPU_R_FILTR
GPU_G_FILTRGPU_G
GPU_B_FILTRGPU_B
GPU_R VGA_R
VGA_G
VGA_B
GPU_DVI_DDC_CLK
DVI_HPD
DVI_DDC_DATA
DVI_DDC_CLK
DDC_CLK_ISO
GPU_HPD
GPU_DVI_DDC_DATA
+5V_DDC_SLEEP_UF
TMDS_CONN_CLKP
TMDS_CONN_CLKNTMDS_CLKN
TMDS_CLKP
TV_GND1
TV_Y
TV_C
TV_COMP
TV_GND2
BRIGHT_PWM
24 FP_PWR_EN
FP_PWR_EN_L
INV_ON_PWM
BRIGHT_PWM_UF
GPU_Y
GPU_C
GPU_COMP
GPU_TV_GND2
GPU_TV_GND1
LVDS_L0P
LVDS_L0N
LVDS_U0N
CLKLVDS_LN
CLKLVDS_LP
LVDS_L2P
LVDS_L2N
LVDS_L1P
LVDS_L1N
LVDS_U0P
LVDS_U1N
LVDS_U1P
LVDS_U2N
LVDS_U2P
CLKLVDS_UN
CLKLVDS_UP
+3V_LCD_SW
LCD_PWREN_L
24 FP_PWR_EN
LCD_DIGON_L
TMDS_DP<1>
TMDS_DP<0> TMDS_DP<2>
TMDS_DN<0>
TMDS_DN<1>
TMDS_DN<2>
VGA_HSYNC
VGA_B
TMDS_CONN_CLKN
TMDS_CONN_CLKP
VGA_G
DVI_HPD_UF
VGA_R
VGA_VSYNC
+5V_DDC_SLEEP
DVI_DDC_CLK_UF
DVI_DDC_DATA_UF
+5V_INV_UF_SW
+5V_INV_SW
+12_8V_INV
HPD_ON_RC
LVDS_DDC_DATA
LVDS_DDC_CLK
39
39 39
39
39
39
34
39
39
39 37
37
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37 37
37
37
37
39
39
39
30
39
39
38
39
39
39
37
37 21
21
39
39
22
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
22
21
21 21
21
21
21
39
39
37
37
39
39
39
39
38
39
39
39
39
39
20
23
22
38
22
22 21
21
21 22
22
22
20
20
20
38
22
22 20
20
38
39
39
39
38
39
20
20
21
21
21
38
38
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
38
20
20
20 20
20
20
20
21
22
22
22
22
22
22
21
22
22
39
38
38
38
20
20
402CERM10V20%0.1UFC788
402CERM50V5%27PFC778
402CERM10V20%0.1UFC789
Y4
SM
8.000M
402CERM50V5%
27PFC777
NC
PC4/OCMP2_B/AIN4PC3/ICAP2_B/AIN3
PC1/OCMP1_B/AIN1PC2/MCO/AIN2
PC5/EXTCLK_A/AIN5
PC0/ICAP1_B/AINO
PB3/OCMP2_APB2/ICAP2_APB1/OCMP1_APB0/ICAP1_A
PB6/SCKPB7/SS*
PB5/MISOPB4/MOSI
PA6/SDAIPA7/TDO
PA5/RDIPA4/SCLI
PA1/ICCDATAPA0/ICCCLK
PA2PA3
VDD
RESET*
OSC2OSC1
TEST
VSS
U36ST72264G2H1
256KX8BGA
SM11/16W5%
10KRP48
SM11/16W5%
10KRP48
SM11/16W5%
10KRP51
SM11/16W5%
10KRP51
SM11/16W5%
10KRP48
SM11/16W5%
10KRP48
VCC
VSS
E2E1E0 SDA
SCL
WC*
SOI16KX8_M24128BU37
10K5%1/16WMF
R495
402 402CERM10V20%0.1UFC600
10K5%1/16WMF
R493
402
+3V_PMU
402MF
1/16W5%
100KR693
SM
RP50
25V1/32W5%10K
SM
RP53
25V1/32W5%10K
GND
LED3
LED1
LED2EN
SET
U50MAX1916SOT23-6
Y
B
A
SN74AUC1G08SC70-5
U2
402MF
1/16W5%
0R1
+3V_MAIN
+3V_MAIN
V+
V-
MAX4236EUTTSOT23-6
U40
+3V_MAIN
402MF
1/16W1%
1KR537
402MF
1/16W5%
120KR534
C6060.22UF
402CERM6.3V20%
15K1%
1/16WMF
R501
402
1K1%1/16WMF
R533
402
402CERM10V20%0.1UFC602
402MF
1/16W1%
1KR531
5.1M5%1/16WMF
R530
402 402CERM16V20%0.01UFC605
THBS520PD1
10K5%
1/16WMF
R21
402
10K5%
1/16WMF
R33
402
Y
B
A
SN74AUC1G08SC70-5
U3
100K5%1/16WMF
R459
402
10K5%
1/16WMF
R20
402
+3V_SLEEP
402MF
1/16W5%
2.2KR708
402CERM10V20%0.1UFC470
402CERM10V20%0.1UFC494
SM11/16W5%
RP5110K
+3V_MAIN
1005%
1/16WMF
R470
402
+5V_MAIN
2.2K5%
1/16WMF
R469
402
2N3906SM
Q18
402MF
1/16W5%
4.7KR468
10K5%1/16WMF
R451
402
SM-1400-OHM-EMI
L39
603CERM50V10%
470pFC781
G
D
SSOT-3632N7002DWQ20
G
D
SSOT-363
2N7002DWQ20
10K5%1/16WMF
R608
402
F-RT-SM
J1540FLH-SM1-TB
+3V_MAIN
2N3906SM
Q63
402MF
1/16W5%
200R691
+3V_MAIN
402MF
1/16W5%
200R702
2N3906SM
Q64
400-OHM-EMIL44
SM-1
402CERM50V20%0.001UFC799
+5V_SLEEP
400-OHM-EMIL45
SM-1
400-OHM-EMIL43
SM-1
402CERM50V20%0.001UFC801
+3V_PMU
402MF
1/16W5%
22R692
402CERM50V20%0.001UFC803
400-OHM-EMIL46
SM-1
402CERM50V20%
0.001UFC800
400-OHM-EMIL42
SM-1
402CERM50V20%0.001UFC802
05%1/16WMF
R262
402
100K5%1/16WMF
R753
402
+3V_PMUG
D
SSOT-3632N7002DWQ68
+3V_MAIN
402MF
1/16W1%
17.4KR690
TABLE_5_ITEM
CRITICAL ?341S1194 1 IC,LMU,P84 U36
CRITICAL BOM OPTIONTABLE_5_HEAD
PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 23 44A051-6278
LMU
PULL-UP FOR I2C (IN-CIRCUIT PROGRAMMING)
NC
INPUTS ARE 3V TOLERANT
INPUTS ARE 3V TOLERANT
KEYBOARD PULLUPS
SPIDEY FLEX
3/ BBANG_JTAG_TCK (REGULAR OUTPUT)
2/ PMU_HRESET_L (3V INPUT INTO LMU)
BOOT BANGING SIGNAL DEFINITION
4/ JTAG_CPU_TMS (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
5/ JTAG_CPU_TDI (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
6/ JTAG_CPU_TRST_L (OPEN COLLECTOR OUTPUT - 470OHM PULLUP ON MLB)
1/ BBANG_HRESET_L (OPEN COLLECTOR OUTPUT - 10K PULLUP ON MLB)
MLB - ALS SENSOR
SHDN_L
(PMU_PWM)
NC
NC
NC
NC
NC
NC
NC
NC
LMU/BOOTBANGER/SPIDEY
LMU PULL-DOWNS
BOOT BANGER E2PROM
SLEEP LED
XOUT
XIN
LOAD CAPACITANCE = 16PF NOTE: KEEP L39 CLOSE TO C781
NC
KB LED DRIVER
2
1
2
1
2
1
21
CRITICAL
2
1
A4
B4
B5
A3
F2
E2
F3
E3
F4
D3
A2
A1
B1
B2
C3
D2
E1
F1
E4
F5
F6
E6
C6
D4
A6
A5
B3
C4
E5
D6
D5
D1
C5
C2
C1
B6
OMIT
81
72
72
81
63
54
7
4
8
5
6
3
2
1
CRITICALBBANG
2
1BBANG
2
1
BBANG
2
1BBANG
21
8
9
2
1
6
4
7
3
10
5
4
7
3
6
9
8
2
1
10
5
3
4
5
6
2
1
CRITICAL
4
5
3
2
1
BBANG
21
NO_BBANG
2
6
5
1
4
3
21
21
212
1
2
1
2
1
21
2
1
2
1
21
CRITICAL
2
1BBANG
2
1BBANG
4
5
3
2
1
BBANG
2
1
NO STUFF
2
1BBANG
21
2
1
2
1
5
4
2
1
2
1
2
3
121
2
1
2
1
2
1
1
2
6
4
5
3
2
1
9
8
7
6
5
40
4
39
38
37
36
35
34
33
32
31
30
3
29
28
27
26
25
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
42
41
2
3
1
2 1
2 1
2
3
1
2 1
2
1
12
2 1
2
1
2 1
2
1
1 2
2
1
21
2
1
2
1
2
1
1
2
6
21
CR-23
KBD_LED_SET
KBD_LED_EN
KBD_LED1_OUT
KBD_LED2_OUT
ST7_KBD_LED_OUT
ST7_SLEEP_LED_H
SLEEP_LED_SW_L
PMU_SLEEP_LED_L
PMU_SLEEP_LED
ST7_XTAL_IN
ST7_OSC2
ST7_OSC1
SLEEP_LED
SLEEP_LED_UF
SLEEP_LED_L SLEEP_LED_I
EEPROM_ADDR
INT_I2C_CLK0
INT_I2C_DATA0
ST7_ICP_SEL_PD
ST7_PB6_PD
ST7_SENSOR4_SCK_PD
ST7_SENSOR5_SCK_PU
ST7_SENSOR4_SDA_PD
ST7_SENSOR5_SDA_PU
ST7_RESET_L
ST7_ICP_SEL_PD
INT_I2C_DATA0
ST7_SENSOR4_SCK_PD
INT_I2C_CLK0
ST7_SENSOR4_SDA_PD
ST7_PB6_PD
SLEEP
BBANG_HRESET_L
SUTRO_ALS_GAIN_SW
PMU_CPU_HRESET_L
BBANG_JTAG_TCK
ST7_KBD_LED_OUT
MLB_ALS_GAIN_SW
PMU_LID_CLOSED_L
JTAG_CPU_TMS
ST7_SLEEP_LED_H
MLB_ALS_OUT
SUTRO_ALS_OUT
MLB_ALS_OUTMLB_ALS_OUT_FB
MLB_ALS_OP_IN
MLB_ALS_OP_COMP
MLB_ALS_GAIN_SW
GAIN_SETTING2
MLB_PHOTODIODE
NUMLOCK_LED_L
NUMLOCK_LED
SOFT_PWR_ON_L
CAPSLOCK_LED_L
CAPSLOCK_LED
PMU_LID_CLOSED_L
TPAD_RXD
TPAD_TXD
KBD_ID
KBD_X<5>
KBD_X<3>
KBD_X<4>
KBD_X<2>
KBD_X<9>
KBD_X<6>
KBD_X<7>
KBD_X<8>
KBD_X<0>
KBD_X<1>
KBD_OPTION_L
KBD_COMMAND_L
KBD_FUNCTION_L
KBD_CONTROL_L
KBD_SHIFT_L
MAXBUS_SLEEP
BBANG_TCK_EN
BBANG_JTAG_TCK
JTAG_CPU_TCK
BBANG_HRESET_L
CPU_HRESET_L
PMU_CPU_HRESET_L
KBD_X<8>
KBD_X<7>
KBD_X<6>
KBD_X<5>
KBD_X<4>
KBD_NUMLOCK_LED
KBD_X<3>
KBD_X<2>
KBD_X<1>
KBD_Y<1>
KBD_Y<0>
KBD_X<9>
KBD_Y<2>
KBD_Y<3>
KBD_Y<5>
KBD_Y<4>
KBD_Y<6>
KBD_Y<7>
KBD_ID
KBD_CAPSLOCK_LED
KBD_FUNCTION_L
KBD_CONTROL_L
KBD_COMMAND_L
KBD_OPTION_L
KBD_SHIFT_L
KBD_X<0>
PWR_BUTTON_L
KBD_LED1_OUT
+5V_TPAD_SLEEP
LID_CLOSED_L
TPAD_F_RXD
TPAD_F_TXD
KBD_LED2_OUT
MAXBUS_SLEEP
EEPROM_WP_PD
ST7_SENSOR5_SDA_PU
ST7_SENSOR5_SCK_PU
JTAG_CPU_TRST_L
JTAG_CPU_TDI
+3V_HALL_EFFECT
38
38
34
34
23
23
17
17
39
39
39
39
16
16
39
39
23
23
23
23
35
34
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
9
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
9
38
38
14
14
14
14
33
39
39
30
30
39
39
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
30
7
39
39
7
30
30
30
30
30
30
30
30
30
39
39
30
39
39
39
39
39
39
30
30
30
30
30
30
30
39
38
39
38
7
39
39
39
23
23
23
23
30
25
12
12
23
23
23
23
23
23
23
12
23
12
23
23
30
23
24
23
23
23
23
23
5
23
23
24
23
23
30
22
30
23
30
30
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
23
5
23
5
23
5
23
23
23
23
23
23
39
23
23
23
30
30
23
30
30
30
30
30
30
23
39
23
23
23
23
23
23
25
23
38
39
39
39
23
5
23
23
5
5
38
10K5%
1/16WMF
R34
402
402MF
1/16W5%
33R46
10K5%
1/16WMF
R3
402
402MF
1/16W5%
22R41
402MF
1/16W5%
22R16
402MF
1/16W5%
22R503
402MF
1/16W5%
33R47
+5V_SLEEP
10K5%1/16WMF
R334
402
10K5%1/16WMF
R362
402
10K5%1/16WMF
R381
402
M-ST-SMJ11
100K5%
1/16WMF
R375
402
20K5%
1/16WMF
R361
402
10K5%1/16WMF
R18
402
402MF
1/16W5%
22R11
402MF
1/16W5%
82R48
402MF
1/16W5%
82R53
100K5%1/16WMF
R502
402
402MF
1/16W5%
22R9
402MF
1/16W5%
82R81
402MF
1/16W5%
22R64
402MF
1/16W5%
33R10
402MF
1/16W5%
33R42
+3V_SLEEP
10K5%
1/16WMF
R63
402
402MF
1/16W5%
82R62
402CERM50V5%10PFC90
+3V_SLEEP
SM11/16W5%
33RP2
SM11/16W5%
33RP9
SM11/16W5%
33RP9
SM11/16W5%
33RP9
SM11/16W5%
33RP2
SM11/16W5%
33RP2
SM11/16W5%
33RP9
SM11/16W5%
33RP2
SM11/16W5%
33RP3
SM11/16W5%
33RP4
SM11/16W5%
33RP3
SM11/16W5%
33RP3
SM11/16W5%
33RP4
SM11/16W5%
33RP5
SM11/16W5%
33RP4
SM11/16W5%
33RP5
SM11/16W5%
33RP5
SM11/16W5%
33RP4
SM11/16W5%
33RP3
SM11/16W5%
33RP5
SM11/16W5%
33RP44
SM11/16W5%
33RP14
SM11/16W5%
33RP14
SM11/16W5%
33RP44
SM11/16W5%
33RP43
SM11/16W5%
33RP10
SM11/16W5%
33RP14
SM11/16W5%
33RP10
SM11/16W5%
33RP44
SM11/16W5%
33RP14
SM11/16W5%
33RP43
SM11/16W5%
33RP44
SM11/16W5%
33RP10
SM11/16W5%
33RP43
SM11/16W5%
33RP10
SM11/16W5%
33RP12
SM11/16W5%
33RP12
SM11/16W5%
33RP43
SM11/16W5%
33RP12
SM11/16W5%
33RP12
225%1/16WMF
R658
402
+3V_MAIN+5V_MAIN
15K5%1/16WMF
R36
402
15K5%1/16WMF
R43
402
M-ST-SMJ13
J354550-1490
F-RT-SM
10K5%
1/16WMF
R664
402
+3V_SLEEP
05%
1/16WMF
R499
402
05%1/16WMF
R498
402
J21QT510806-L111
F-ST-SM
20K5%
1/16WMF
R17
402
10K5%1/16WMF
R69
402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 24 44A051-6278
EIDE SERIES TERMINATIONPLACE TERMINATORS NEAR INTREPID
+5V_HD_SLEEP AND +3V_SLEEP?ANY SEQUENCING REQUIREMENT BETWEEN
BLUETOOTH/LEFT-SIDE USB
NC
NCNC
NC
INTERNAL I/O CONNECTORS
NCNC
PLACE SERIES R CLOSE TO INTERPID
IOCHRDY - UATA100 REQUIRES PULL-UP TO 3.3V
OPTICAL DRIVE INTERFACE (EIDE)
PLACE PULLUP RESISTORS CLOSE TO INTREPID
HARD DRIVE INTERFACE (UATA100)
NC
WIRELESS INTERFACE
2
1
21
2
1
21
21
21
12
2
1
NO STUFF
2
1
2
1
9
8
7
6
50
5
49
48
47
46
45
44
43
42
41
40
4
39
38
37
36
35
34
33
32
31
30
3
29
28
27
2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
CRITICAL
2
1
NO STUFF
2
1
2
1
21
21
21
2
1
21
21
21
21
21
2
1
21
2
1
54
72
81
63
81
63
54
72
81
54
72
63
72
72
63
81
54
81
54
63
81
72
54
63
63
63
81
27
27
36
27
45
81
18
45
63
54
45
81
72
1
2
2
1
2
1
9
8
7
6
50
5
49
48
47
46
45
44
43
42
41
40
4
39
38
37
36
35
34
33
32
31
30
3
29
28
27
2625
24
23
22
21
20
2
19
18
17
16
15
14
13
12
11
10
1
CRITICAL
9
8
7
6
5
4
3
2
14
13
12
11
10
1
16
15
CRITICAL
2
1
2
1
3V_HD_LOGIC
2
1
5V_HD_LOGIC
9
84
83 82
81
80
8
79
78 77
76 75
74 73
72 71
70
7
69
68 67
66 65
64 63
62 61
60
6
59
58 57
56 55
54 53
52 51
50
5
49
48 47
46 45
44 43
42 41
40
4
39
38 37
36 35
34 33
32 31
30
3
29
28 27
26 25
24 23
22 21
20
2
19
18 17
16 15
14 13
12 11
10
1
CRITICAL
2
1
2
1
CR-24
MAIN_RESET_L
RF_DISABLE_L_SPN
PCI_AD<0>
PCI_AD<2>
PCI_AD<4>
PCI_AD<6>
ROM_OE_L
PCI_CBE<0>
PCI_AD<9>
PCI_AD<11>
PCI_AD<13>
PCI_AD<15>
PCI_DEVSEL_L
PCI_STOP_L
PCI_TRDY_L
PCI_FRAME_L
PCI_AD<16>
PCI_AD<18>
PCI_PAR
PCI_AD<20>
PCI_AD<22>
AIRPORT_IDSEL
PCI_AD<24>
PCI_AD<26>
PCI_AD<28>
PCI_AD<30>
AIRPORT_PCI_INT_L
AIRPORT_PME_L_TP
AIRPORT_PCI_GNT_L
CLK33M_AIRPORT
EIDE_OPTICAL_DATA<12>
EIDE_OPTICAL_DATA<13>
EIDE_OPTICAL_DATA<14>
EIDE_OPTICAL_DATA<15>
38 EIDE_OPTICAL_DMA_RQ
38 EIDE_OPTICAL_RD_L
38 EIDE_OPTICAL_DMAACK_L EIDE_OPTICAL_INT
EIDE_OPTICAL_DATA<4>
EIDE_OPTICAL_DATA<5>
EIDE_OPTICAL_DATA<6>
EIDE_OPTICAL_DATA<7>
EIDE_OPTICAL_RST_L
NEC_LEFT_USB_PWREN
LEFT_USB_DP
EIDE_OPTICAL_DATA<8>
EIDE_OPTICAL_DATA<9>
EIDE_OPTICAL_DATA<10>
EIDE_OPTICAL_ADDR<2>
EIDE_OPTICAL_CS1_L
EIDE_OPTICAL_DATA<11>
+HD_LOGIC_SLEEP
+5V_HD_SLEEP
HD_DATA<4>
HD_CS0_L
HD_ADDR<0>
HD_DMACK_L
HD_DIOR_L
HD_DATA<6>
HD_DATA<7>
HD_RESET_L
PCI_AD<18>
HD_DATA<11>
HD_DATA<1>
HD_DATA<0>
HD_DATA<5>
HD_CS0_L
HD_DATA<14>
HD_DATA<9>
HD_DATA<6>
HD_DATA<12>
HD_DATA<15>
HD_ADDR<2>
HD_ADDR<1>
HD_DATA<13>
HD_DATA<10>
HD_ADDR<0>
HD_DATA<4>
HD_DATA<8>
HD_DATA<2>
HD_DATA<7>
HD_DATA<3>
UIDE_DATA<5>
UIDE_DATA<0>
UIDE_DATA<1>
UIDE_DATA<11>
UIDE_DATA<2>
UIDE_DATA<3>
UIDE_DATA<6>
UIDE_DATA<9>
UIDE_DATA<14>
UIDE_CS0_L
UIDE_DATA<4>
UIDE_DATA<8>
UIDE_DATA<10>
UIDE_ADDR<0>
UIDE_DATA<12>
UIDE_DATA<15>
UIDE_ADDR<1>
UIDE_DATA<13>
UIDE_ADDR<2>
UIDE_IOCHRDY
UIDE_DIOR_L HD_DIOR_L
HD_RESET_L
UIDE_DIOW_L HD_DIOW_L
HD_DMACK_L
EIDE_OPTICAL_ADDR<0>
EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<2>
EIDE_OPTICAL_DATA<1>
EIDE_OPTICAL_DATA<0>
EIDE_OPTICAL_WR_L
EIDE_OPTICAL_IOCHRDY
EIDE_OPTICAL_ADDR<1>
EIDE_OPTICAL_CS0_L
PCI_CBE<3>
PCI_AD<31>
PCI_AD<25>
PCI_AD<27>
PCI_AD<29>
AIRPORT_PCI_REQ_L
PCI_CBE<2>
PCI_AD<17>
PCI_AD<23>
PCI_AD<21>
PCI_AD<19>
PCI_AD<7>
PCI_AD<8>
ROM_RW_L
PCI_AD<10>
PCI_AD<12>
PCI_CBE<1>
PCI_AD<14>
ROM_CS_L
PCI_AD<1>
PCI_AD<5>
ROM_ONBOARD_CS_L
PCI_AD<3>
UIDE_DATA<7>
PCI_IRDY_L
UIDE_DMACK_L
UIDE_RST_L
HD_IOCHRDY
UIDE_CS1_L HD_CS1_L
HD_DATA<5>
HD_DATA<2>
HD_DATA<3>
HD_DATA<0>
HD_DATA<1>
HD_DMARQ
HD_DATA<15>
HD_DATA<14>
HD_DATA<13>
HD_DATA<12>
HD_DATA<10>
HD_DATA<8>
HD_DATA<9>
HD_DATA<11>
HD_IOCHRDY
HD_ADDR<2>
HD_CS1_L
HD_DIOW_L
HD_ADDR<1>
HD_INTRQ
LEFT_USB_DM
SUTRO_ALS_GAIN_SW
NEC_LEFT_USB_OVERCURRENT
SUTRO_ALS_OUT
BT_USB_DP
BT_USB_DM
AIRPORT_CLKRUN_L
EIDE_DATA<8> EIDE_OPTICAL_DATA<8>
EIDE_DATA<9> EIDE_OPTICAL_DATA<9>
EIDE_DATA<10> EIDE_OPTICAL_DATA<10>
EIDE_DATA<12> EIDE_OPTICAL_DATA<12>
EIDE_DATA<13> EIDE_OPTICAL_DATA<13>
EIDE_DATA<14> EIDE_OPTICAL_DATA<14>
EIDE_DATA<11> EIDE_OPTICAL_DATA<11>
EIDE_DATA<2> EIDE_OPTICAL_DATA<2>
EIDE_DATA<0> EIDE_OPTICAL_DATA<0>
EIDE_DATA<15> EIDE_OPTICAL_DATA<15>
EIDE_DATA<1> EIDE_OPTICAL_DATA<1>
EIDE_DATA<6> EIDE_OPTICAL_DATA<6>
EIDE_DATA<4> EIDE_OPTICAL_DATA<4>
EIDE_DATA<3> EIDE_OPTICAL_DATA<3>
EIDE_OPTICAL_DATA<7>
EIDE_CS0_L EIDE_OPTICAL_CS0_L
EIDE_ADDR<2> EIDE_OPTICAL_ADDR<2>
EIDE_DATA<5> EIDE_OPTICAL_DATA<5>
EIDE_ADDR<1> EIDE_OPTICAL_ADDR<1>
EIDE_ADDR<0> EIDE_OPTICAL_ADDR<0>
EIDE_DATA<7>
EIDE_OPTICAL_DMA_RQ 38 EIDE_DMARQ
EIDE_OPTICAL_DMAACK_L 38 EIDE_DMACK_L
EIDE_OPTICAL_CS1_LEIDE_CS1_L
EIDE_OPTICAL_RD_L 38 EIDE_RD_L
EIDE_OPTICAL_IOCHRDYEIDE_IOCHRDY
EIDE_OPTICAL_WR_LEIDE_WR_L
EIDE_OPTICAL_INTEIDE_INT
EIDE_OPTICAL_RST_LEIDE_RST_L
39
39
39
39
39
39
39
39
39
39
39
39
37
39
39
39
39
39
37
39
39
39
39
39
39
39
39
39
39
39
39
39
39
30
37
37
37
37
39
37
37
37
37
39
39
39
39
37
26
39
37
39
37
37
37
37
26
39
37
37
37
37
39
37
39
39
37
37
37
37
37
39
37
37
37
37
39
26
26
26
26
26
37
26
26
26
26
37
37
37
37
26
24
37
26
37
26
26
26
26
24
37
26
26
26
26
37
26
37
37
26
26
26
26
26
37
26
26
26
26
37
21
18
18
18
18
39
26
18
18
18
18
26
26
26
26
18
18
26
18
26
18
18
18
18
39
39
39
39
39
39
39
39 39
39
39
39
39
39
39
39
39
39
39
39
39
18
39
39
39
39
39
39
39
39
39
26
18
18
18
18
26
18
26
26
18
18
18
39
18
18
26
18
39
18
18
18
26
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
19
13
13
13
13
13
18
13
13
13
13
18
18
18
18
13
13
18
13
18
13
13
13
13
39
39
36
37
37
37
37
37
37
37 37
37
37
37
37
37
39
37
37
37
37
37
37
37
38
37
37
37
37
37
37
37
37
13
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37 37
37
37 37
37
37
37
37
37
37
37
37
37
37
18
13
13
13
13
39
18
13
18
18
13
13
13
13
13
13
18
13
13
13
13
39
13
37
18
37
37
37
37 37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
39
39
39
37
37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37
37 37
37 37
37 37
37 37
37 37
37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
37 37
18
39
10
10
10
10
10
13
10
10
10
10
13
13
13
13
10
10
13
10
13
39
10
10
10
10
15
13
13
24
24
24
24
24
24
24 24
24
24
24
24
24
26
26
24
24
24
24
24
24
38
33
24
24
24
24
24
24
24
24
10
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14 24
24
14 24
24
24
24
24
24
24
24
24
24
24
13
10
10
10
10
13
13
10
13
13
10
10
10
10
10
10
13
10
10
10
10
10
10
14
13
14
14
24
14 24
24
24
24
24
24
14
24
24
24
24
24
24
24
24
24
24
24
24
24
14
26
23
26
23
15
15
39
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
14 24
24
14 24
14 24
14 24
14 24
14 24
14
24 14
24 14
24 14
24 14
24 14
24 14
24 14
24 14
PWM_OUT2
TACH/AIN1PWM_OUT1
GND
FAN_FAULTTHERM
INT
TACH/AIN2
D2-D2+
D1-D1+
SCLSDAADD
VCCU48QSOP
ADM1031402CERM10V20%
0.1UFC668 10K
5%1/16W
MF
R542
402
10K5%1/16WMF
R539
402
+3V_MAIN
+5V_SLEEP
SM2N3904Q31
+5V_SLEEP
SM2N3904Q56
10K5%
1/16WMF
R569
402
10K5%
1/16WMF
R592
402
SM-2MT
J4
SM-2MT
J2
+5V_MAIN+3V_MAIN
805CERM6.3V20%10UFC450
402CERM10V20%0.1UFC458
10K5%
1/16WMF
R325
402
805CERM6.3V20%10UFC734
402CERM10V20%0.1UFC480
SM2N3904Q53
SM2N3904Q38
402MF
1/16W5%
0R637
402MF
1/16W5%
0R642
402MF
1/16W5%
0R626
402MF
1/16W5%
0R629
402MF
1/16W5%
0R638
402MF
1/16W5%
0R643
402MF
1/16W5%
0R622
402MF
1/16W5%
0R630
+5V_MAIN
J5M-ST-5087
SM
603MF
1/16W5%
0R261
F-ST-SMQT510166-L010
J9
603MF
1/16W5%
0R2500
603MF
1/16W5%
0R2501
Q27
TSOP
SI3446DV
Q30
TSOP
SI3446DV
1206CERM10V20%4.7UFC856
1206CERM10V20%4.7UFC855
TSOP
Q49SI3443DV
402MF
1/16W5%
100KR761
C8570.1UF
402CERM10V20%
805CERM6.3V20%10UFC858
+5V_MAIN
QT510306-L111F-ST-SM
J14
+5V_MAIN +3V_SLEEP
XW17SM
402CERM50V20%0.001UFC866
402CERM50V20%0.001UFC867
G
D
SSOT-363
2N7002DWQ69
G
D
SSOT-363
2N7002DWQ69
SM11/16W5%
RP59100K
+5V_MAIN
SM11/16W5%
RP59100K
G
D
SSOT-363
2N7002DWQ67
G
D
SSOT-363
2N7002DWQ67
SM11/16W5%
RP59100K
SM11/16W5%
RP59100K
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 25 44A051-6278
SND - INTREPIDAUDIO - SNAPPER
SOUND BOARD (TUBA)
NC
NC
FAN CONTROLLER
FAN/MODEM/SOUND/SLEEP LED/DEBUG
PLACE CLOSE TO CONNECTOR
PLACE CLOSE TO CONNECTOR
SERIAL DEBUG INTERFACE
DEBUG POWER BUTTON
DEBUG JUMPERS
MODEM_I2C_A0
MODEM_I2C_A1
KEEP STUFFING RESISTORS CLOSE TO ADM1031 CONTROLLER
PLACE UNDERNEATH UPPER RAM
PLACE CLOSE TO BATTERY CHARGER/VCORE
ALTERNATE2
ALTERNATE1
KEEP STUFFING RESISTORS CLOSE TO ADM1031 CONTROLLER
PLACE CLOSE TO CPU
MAIN1
MAIN2
FAN INTERFACEPLACE IN BETWEEN 3/5/1.5/2.5V PWR SUPPLY
CAPS FOR EMI EXPERIMENTATION ONLY
PLACE XW17 CLOSE TO 5V SWITCHER (U27)
MODEM
6
7
4
215
163
1
14
5
811
12
9
10
13
CRITICAL
2
1
2
1
2
1
2
3
1
2
3
1
2
1
2
1
3
2
1
5
4
CRITICAL
3
2
1
5
4
CRITICAL
2
1
2
1
NO STUFF
2
1
2
1
2
1
NO STUFF
2
3
1
NO STUFF
2
3
1
NO STUFF
21
21
21
21
21
NO STUFF
21
NO STUFF
21
NO STUFF
21
NO STUFF
9
8
7
65
4
3
2
101
CRITICAL
SERIAL_DEBUG
21
NO STUFF
9
87
65
43
2
1615
1413
1211
10
1
CRITICAL
21
NO STUFF
21
NO STUFF
436521
436521
2
1
2
1
4
3 6
5
2
1
21
21
2
1
9
87
65
4
30
3
29
2827
2625
2423
2221
20
2
19
1817
1615
1413
1211
10
1
CRITICAL
21
2
1
NO STUFF
2
1
NO STUFF
1
2
6
4
5
3
2
7
1
8
1
2
6
4
5
3
5
4
6
3
CR-25
SND_AMP_MUTE_L
SND_HP_MUTE_L
INT_PU_RESET_L
AMP_CONTROL
INT_PU_RESET_L
HP_CONTROL
SND_HP_MUTE +5V_SOUND_SLEEP
SND_AMP_MUTE
+5V_SOUND_SLEEP
THERM2_M_DP
THERM2_M_DM
THERM2_M_DM THERM2_DM
THERM1_M_DP
THERM1_M_DM
THERM2_M_DP THERM2_DP
THERM1_M_DM THERM1_DM
THERM1_M_DP THERM1_DP
THERM2_A_DP
THERM2_A_DM
THERM1_A_DP
THERM1_A_DM
THERM2_A_DM THERM2_DM
THERM1_A_DM THERM1_DM
THERM2_A_DP THERM2_DP
THERM1_A_DP THERM1_DP
MODEM_USB_DP
MODEM_USB_DM
COMM_SHUTDOWN
COMM_RESET_L
COMM_RING_DET_L
INT_I2C_DATA2
INT_I2C_CLK2
PMU_RESET_BUTTON_L
PMU_NMI_BUTTON_L
PWR_BUTTON_L
COMM_DTR_L
COMM_RTS_L
COMM_RXD
COMM_TXD_L
COMM_TRXC
COMM_GPIO_L
FAN1_PWM
THERM_L_OC
FAN2_TACH
FAN2_PWM
THERM2_DM
THERM2_DP
THERM1_DM
THERM1_DP
INT_I2C_CLK1
INT_I2C_DATA1
FAN2_PWM
SLEEP_LS5 5V_SND_PWREN
SND_TO_AUDIO
SND_HP_SENSE_L
INT_AUDIO_TO_SND
SND_SYNC
INT_I2C_DATA2
SLEEP_LED
SND_HW_RESET_L
SND_LIN_SENSE_L
INT_I2C_CLK2
SND_AGND
SND_SCLK
SND_CLKOUT
FAN1_TACH
FAN1_GND
FAN2_GND
FAN2_TACH
30
30
39
39
39
39
39
39
39
39
39
39
39
39
39
25
25
38
38
37
37
37 37
37
37
37 37
37 37
37 37
37
37
37
37
37 37
37 37
37 37
37 37
37
37
39
39
30
25
25
39
39
39
39
39
39
39
39
37
37
37
37
15
15
39
39
39
39
25
39
39
25
36
36
39
39
39
15
15
14
14
25
25
25
25
25 25
25
25
25 25
25 25
25 25
25
25
25
25
25 25
25 25
25 25
25 25
15
15
15
15
15
15
15
30
30
23
15
15
15
15
15
15
30
25
25
25
25
25
25
14
14
25
33
15
15
15
15
15
23
15
15
15
38
15
15
39
38
38
25
225%
1/16WMF
R710
402
+3V_MAIN
+3V_MAIN
05%1/16WMF
R711
603
402MF
1/16W1%
9.09KR712
FERR-EMI-100-OHML48
SM
402CERM50V5%27PFC833
Y7
SM-1
30.0000M
402CERM50V5%27PFC834
1005%1/16WMF
R713
402
AVDDVDD
VDD_PCI
AD3
AD4
AD5
AD2
AD0
AD1
VSS
AD6
AD7
AD17
AD16
AD15
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD27
AD26
AD25
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD28
AD29
AD30
AD31
CBE0
CBE1
CBE2
CBE3
PAR
PERR
GNT
DEVSEL
IDSEL
FRAME
IRDY
TRDY
STOP
REQ
SERR
CRUN
SMI
VBBRST
VCCRST
INTA
INTB
INTC
PCLK
PME
LEGC
XT2
DM1
DP1
DM2
DP2
DM3
DP3
RSDM4
RSDM2
RSDP2
RSDM3
RSDP3
RSDP1
XT1/SCLK
RSDM1
DM4
DP4
DM5
DP5
RREF
OCI1
OCI2
OCI4
OCI3
OCI5
RSDP4
RSDM5
RSDP5
PPON1
NC1
NC2
SMC
TEB
NTEST1
PPON2
PPON3
PPON4
PPON5
AVSS(R)
AVSS
SRCLK
SRDTA
SRMOD
NANDTEST
AMC
TEST
U52NEC_UPD720101_USB2
FBGA
402
1%36
R717
402
1% 36
R716
402
1% 36
R714
402
1%36
R715
+3V_MAIN
402MF
1/16W5%
15KR729
402CERM10V20%0.1uFC836
402MF
1/16W5%
15KR728
402CERM10V20%0.1uFC835
SM11/16W5%
RP5410K
SM11/16W5%
RP5410K
SM11/16W5%
RP5410K
SM11/16W5%
RP5410K
SM11/16W
RP39475%
SM11/16W
RP37475%
402MF
1/16W5%
0R719
402MF
1/16W5%
0R723
402MF
1/16W5%
0R725
402MF
1/16W5%
0R720
402MF
1/16W5%
0R721
402MF
1/16W5%
0R726
402MF
1/16W5%
0R724402
MF1/16W5%
0R722
10K5%1/16WMF
R718
402
SM11/16W5%
RP5110K
+3V_MAIN
10K5%1/16WMF
R741
402
1.5K5%1/16WMF
R124
402
1.5K5%1/16WMF
R182
402
10K5%1/16WMF
R667
402
10K5%1/16WMF
R666
402
402CERM10V20%0.1uFC495
402CERM10V20%0.1uFC827
402CERM10V20%0.1uFC824
402CERM10V20%0.1uFC828
402CERM10V20%0.1uFC825
402CERM10V20%0.1uFC703
402CERM10V20%0.1uFC496
402CERM10V20%0.1uFC516
402CERM10V20%0.1uFC517
402CERM10V20%0.1uFC826
402CERM10V20%0.1uFC829
805CERM6.3V20%10uFC730
4.7K5%
1/16WMF
R709
402
805CERM6.3V20%10uFC832
402CERM10V20%0.1uFC831
402CERM10V20%0.1uFC830
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 26 44A051-6278
NEED PULL-UP RESISTORS IN CASE USB 1.0 IS USED FOR PORT POWER
INTREPID USB CONSTRAINTS
PLACE NEAR J3
Series Rpaks required tofacilitate NAND-tree testing
NC
NC
NC
NC
NC
NC
(NEC_USB_DBP)
(NEC_USB_DBM)
(NEC_USB_DAP)
(NEC_USB_DAM)
NC
USB 2.0
NC
NC
NC
NC
NC
(PCI_AD<27>)
OD
OD
OD
OD
OD
OD
OUT
OUT
OUT
OUT
OUT
IPD
IPD
IPD
IPD
IPD
IPD
Low/Full/High Speed (External)
Low/Full/High Speed (External)
BUBBA CONNECTOR
PLACE NEAR J12
SUTRO CONNECTOR
Y7 LOAD CAPACITANCE IS 16PF
RIGHT PORT
LEFT PORT
FOR BOTH CBUS AND USB2
HAS DEDICATED PULL-UP
SERR_L AND PERR_L
Tie to GND at ball N11
2
1NEC_USB
2
1NEC_USB
21
NEC_USB
21
NEC_USB
2
1
NEC_USB
21
NEC_USBCRITICAL
2
1
NEC_USB
2
1
NEC_USB
P8
L9
N2
B2
A2
B14
H14
N14
P10
N1
D8
F11
J11
G4
D12
H12
L12
M11
B13
N13
B1
C8
M4
H3
L13
N8
E2
A3
A12
A13
P12
P3
D7
H4
G12
D13
F13
H13
J13
P2
C9
B8
G1
L8
N7
G3
P9
N9
M9
L6
M7
H1
C14
E14
G14
J12
K13
E13
F12
H11
K14
M14
P11
C6
A9
C10
C11
A11
C12
D9
H2
A8
J4 B9
A10
B10
B11
B12
M8
M6
P6
M10
L7
F4
A7
B7
C7
B3
D6
F3
C13
E12
G13
J14
L14
D14
F14
G11
K12
M13
G2
N6
C3
F1
J3
M2
N11
M12
P13
N12
N10
P7
L1
L2
M1
N3
M3
N4
A6
B6
P4
C5
A5
C4
B5
A4
B4
C1
C2
D2
D1
N5
D3
E1
E3
F2
J1
J2
K3
K1
L3
K2
P5
M5
CRITICAL
NEC_USB
21
NEC_USB
21
NEC_USB
21
NEC_USB
21
NEC_USB
21
NEC_USB
2
1
NEC_USB
21
NEC_USB
2
1
NEC_USB
5
4
NEC_USB 6
3
NEC_USB
7
2
NEC_USB 8
1
NEC_USB
5
6
7
8
4
3
2
1
NEC_USB
5
6
7
8
4
3
2
1
NEC_USB
21
NEC_USB
21
INTREPID_USB
21
INTREPID_USB
21
NEC_USB
21
NEC_USB
21
INTREPID_USB
21
INTREPID_USB
21
NEC_USB
1
2NEC_USB
6
32
1NEC_USB
2
1
NEC_USB
2
1
NEC_USB
2
1
INTREPID_USB
2
1
INTREPID_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USB
2
1NEC_USBNEC_USB
2
1NEC_USB
NEC_USB
2
1NEC_USB
2
1NEC_USB
CR-26
NEC_OCI<3>
NEC_OCI<4>
NEC_OCI<5>
NEC_RIGHT_USB_PWREN
NEC_USB_RSDP2
NEC_USB_DBP
NEC_USB_DBM
NEC_USB_DAM
NEC_USB_RSDP1 NEC_USB_DAP
NEC_PCI_PERR_L
NEC_PCI_SERR_L
+3V_NEC_VDD
NEC_USB_DBP RIGHT_USB_DP
USB_D2P
NEC_USB_DBM RIGHT_USB_DM
USB_D2M
NEC_USB_DAP LEFT_USB_DP
USB_D1P
USB_D1M
LEFT_USB_DMNEC_USB_DAM
NEC_PPON3_TP
NEC_NANDTESTEN_TP
NEC_AMC_TP
NEC_XT2
NEC_XT2_R
NEC_AVDD
NEC_XT1
NEC_IDSEL
PCI_AD<1>
PCI_AD<0>
PCI_AD<4>
PCI_AD<3>
PCI_AD<2>
PCI_AD<5>
PCI_AD<6>
PCI_AD<7>
PCI_AD<8>
PCI_AD<9>
PCI_AD<10>
PCI_AD<11>
PCI_AD<12>
PCI_AD<13>
PCI_AD<14>
PCI_AD<15>
PCI_AD<16>
PCI_AD<17>
PCI_AD<18>
PCI_AD<19>
PCI_AD<21>
PCI_AD<22>
PCI_AD<20>
PCI_AD<23>
PCI_AD<24>
PCI_AD<26>
PCI_AD<25>
PCI_AD<29>
PCI_AD<28>
PCI_AD<30>
PCI_AD<31>
PCI_CBE<0>
PCI_CBE<1>
PCI_CBE<2>
PCI_CBE<3>
PCI_PAR
PCI_FRAME_L
PCI_IRDY_L
PCI_TRDY_L
PCI_STOP_L
PCI_DEVSEL_L
USB2_PCI_REQ_L
USB2_PCI_GNT_L
NEC_PCI_PERR_L
NEC_PCI_SERR_L
NEC_SMI_L_TP
NEC_PPON4_TP
NEC_NANDTESTOUT_TP
NEC_OCI<2>
NEC_OCI<1>
+3V_NEC_VDD
NEC_RREF
PCI_AD<27>
NEC_PCI_INTA_L
NEC_PCI_INTB_L
NEC_PCI_INTC_L
USB2_PCI_INT_L NEC_PCI_INTA_L
NEC_PCI_INTB_L
NEC_LEGC
NEC_PPON5_TP
NEC_PCI_INTC_L
NEC_IO_RESET_L
NEC_MAIN_RESET_L
NEC_PME_L
IO_RESET_L
PMU_PME_L
MAIN_RESET_L NEC_MAIN_RESET_L
NEC_PME_L
NEC_IO_RESET_L
NEC_CRUN_L
USB_DCM USB_DC USB_DC:::200 5 MIL SPACING
5 MIL SPACINGUSB_DA:::200USB_DAUSB_DAP
5 MIL SPACINGUSB_DA:::200USB_DAUSB_DAM
USB_D1M USB_D1 USB_D1:::200 5 MIL SPACING
USB_DCP USB_DC USB_DC:::200 5 MIL SPACING
USB_D1P USB_D1 USB_D1:::200 5 MIL SPACING
USB_D2M USB_D2 USB_D2:::200 5 MIL SPACING
USB_D2P USB_D2 USB_D2:::200 5 MIL SPACING
CLK33M_USB2
NEC_USB_RSDM1
NEC_USB_RSDM2
NEC_NC2_TP
NEC_NC1_TP
NEC_LEFT_USB_PWREN
NEC_RIGHT_USB_OVERCURRENTNEC_OCI<2>
NEC_LEFT_USB_OVERCURRENTNEC_OCI<1>
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
37
39
39
37
39
37
37
37
37
37
37
37
39
39
39
39
39
39
39
39
39
39
37
30
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
37
37
24
37
24
24
24
24
24
24
24
37
37
37
37
37
37
37
37
37
37
24
30
24
39
39
39
39
39
39
39
39
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
18
24
24
18
24
18
18
18
18
18
18
18
24
24
24
24
24
24
24
24
24
24
18
27
21
39
39
39
39
39
37
37
37
37
38
37 37
26
37 37
26
37 37
26
26
37 37
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
18
18
13
18
13
13
13
13
13
13
13
18
18
18
18
18
18
18
18
18
18
38
13
19
30
19
26
26
26
26
36
39
39
39
32
37
26
26
26
37 26
26
26
26
26 32
15
26 32
15
26 24
15
15
24 26
36
38
36 10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
13
13
10
13
10
10
10
10
10
10
10
13
13
13
13
13
13
13
13
13
13
13
13
26
26
26
26
26
10
26
26
26
15 26
26
26
26
26
26
18
15
18 26
26
26
15
15
15
15
15
15
15
15
13
37
37
24
32 26
24 26
49.91%
1/16WMF
R305
402
49.91%1/16WMF
R298
402
49.91%
1/16WMF
R289
402
49.91%1/16WMF
R297
402
402CERM50V5%
33pFC430
402CERM50V5%
33pFC429
402MF
1/16W5%
0R288
Y3
SM-2
25.0000M
10K5%
1/16WMF
R377
402
1808CERM3KV10%100pFC725
49.91%
1/16WMF
R327
402
49.91%
1/16WMF
R315
402
49.91%1/16WMF
R326
402
49.91%1/16WMF
R323
402
XFR-ENET-1000BTSM
T1
402CERM16V20%0.01UFC426
402CERM16V20%0.01UFC431
402CERM16V20%0.01UFC434
402CERM10V20%0.1UFC487
402CERM10V20%0.1UFC474
402CERM10V20%0.1UFC447
402CERM10V20%0.1UFC457
49.91%
1/16WMF
R253
402
49.91%
1/16WMF
R254
402
402MF
1/16W5%
0R331
10K5%1/16WMF
R343
402
755%1/16WMF
R345
402
755%1/16WMF
R328
402
755%1/16WMF
R307
402
755%1/16WMF
R290
402
402MF
1/16W5%
0R278
1.5K5%
1/16WMF
R263
402
4.99K1%1/16WMF
R438
402
805CERM10V20%
2.2uFC425
402MF
1/16W5%
1KR287
402CERM16V20%0.01UFC727
402CERM10V20%0.1UFC719
402CERM16V20%0.01UFC726
402CERM10V20%0.1UFC702
805CERM6.3V20%10uFC718
402CERM10V20%0.1UFC486
402CERM16V20%0.01UFC466
402CERM10V20%0.1UFC435
402CERM16V20%0.01UFC428
402CERM10V20%0.1UFC485
805CERM6.3V20%10uFC479
FERR-EMI-600-OHML27
SM
+2_5V_MAIN
GND
VIN
RUN
MODE
SW
VFB
U51SOT23-6
LTC3405 3.3uHL47
SM1
665K1%1/16WMF
R705
402 402CERM50V5%
22pFC456 49.9K
1%1/16WMF
R706
402
182K1%1/16WMF
R707
402
05%
1/16WMF
R703
402
402CERM16V20%0.01UFC483
402CERM10V20%0.1UFC710
402CERM16V20%0.01UFC455
402CERM10V20%0.1UFC452
402CERM16V20%0.01UFC438
402CERM10V20%0.1UFC484
05%
1/16WMF
R704
402
SOT23
1N914D1
+3V_MAIN
805CERM6.3V20%10uFC464
805CERM6.3V20%
10uFC427
G
D
SSOT-3632N7002DWQ65
G
D
SSOT-3632N7002DWQ65
TX_EN
TXD7TXD6TXD5TXD4
TX_ER
GTX_CLK
125CLK
RX_CLK
TXD0
TXD3TXD2TXD1
TX_CLK
VDDOX
VDDOH
VDDO
DVDD
CTRL10
MDC
CRSCOL
RX_ERRX_DV
RXD7
RXD1RXD2RXD3RXD4RXD5RXD6
RXD0
MDI1-MDI2+MDI2-MDI3+
MDI1+MDI0-MDI0+
AVDD
VSSC
XTAL2
HSDAC-HSDAC+
S_CLK-S_CLK+
XTAL1
S_OUT-S_OUT+
S_IN-S_IN+
COMA
RESET
INT+INT-/
MDIO
LED_LINK1000LED_LINK100
GNDSEL_2.5VSEL_OSC
TRST
RSET
TDOTDI
TCKTMS
CONFIG5CONFIG6
CONFIG4
CONFIG0CONFIG1CONFIG2CONFIG3
LED_TXLED_RX
LED_DUPLEX
LED_LINK10
MDI3-
BCC
88E1111U49
402MF
1/16W5%
20KR342
05%1/16WMF
R344
402
RT-THRJ45J18
10K5%
1/16WMF
R311
402
402CERM16V20%0.01UFC465
05%1/16WMF
R259
603
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 27 44A051-6278
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_ALT_ITEM
197S0603197S0703 Y3
R2EQV = R2A||R2B
R2AR2B
VOUT = 0.8V*(1+R2EQV/R1)
R1
MARVELL 88E1111
Ethernet routing priority:
MDI pairs and all RJ45 pairs
1. Decoupling caps
3. RX SERIES TERMINATION - LOCATE NEAR PHY
2. TX SERIES TERMINATION - LOCATE NEAR LINK
Sandwich each RJ54 pair between chassis grounds
Must maintain 50-ohms trace impedance on all
All differential signals should be close,
via count, and short if possible
parallel, matched lengths, with minimum
10/100/1000 ETHERNET
PLACE RESISTORS CLOSE TO PHY
NC
NC
NC
NC
NC
NC
PLACE ALL SERIES RES CLOSE TO PHY
PLACES PHY IN "COMA" MODE WHENASLEEP ON BATTERY (SAVES POWER)
(000)
(111)
(110)
(111)
(101)
(000)
SEE CONFIG TABLES(BELOW)
(000)
Y3’S LOAD CAPACITANCE IS 20PF
Short shielded RJ-45
PLACE CAPS (IN ORDER) ON PINS 5, 21/26, 48/52, 66/72, 88, 96
PLACE CAPS (IN ORDER) ON PINS 1, 6, 10/15, 57/62, 67/71, 85
PLACE CAPS AT TRANSFORMER PINS 1, 4, 7 & 10
PLACE CAPS (IN ORDER) ON PINS 32/35, 36/40, 45 & 78
NC
NC
NC
NC
NC CONFIG DEFINITIONS
101110
100
010011
001000
111
BIT[2:0]
LED_LINK10
LED_DUPLEXLED_RXLED_TXVSS
VDDO
LED_LINK100LED_LINK1000
PIN
PHYADR[0]PHYADR[3]
BIT[0]
ANEG[1]DIS_125MODE[0]
75/50 OHMMODE[3]
BIT[1]
INT_POL
ENA_XCANEG[2]
MODE[1]
CONFIG INPUTS
DIS_SLEEP
PHYADR[4]PHYADR[1]
BIT[2]
PHYADR[2]ENA_PAUSE
ANEG[0]ANEG[3]
MODE[2]
SEL_BDTDIS_FC
CONFIG<6>
CONFIG<3>
CONFIG<5>CONFIG<4>
CONFIG<0>CONFIG<1>CONFIG<2>
PINPUT CRYSTAL CIRCUIT CLOSE TO PHY
2
1
2
1
2
1
2
1
2
1
2
1
21
CHGND1
21
CRITICAL
2
1
CHGND1
2
1
2
1
2
1
2
1
2
1
24
21
18
15
22
19
16
13
23
20
17
14
3
6
9
12
2
5
8
11
1
4
7
10
CRITICAL
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
NO STUFF
2
1
NO STUFF
21
2
1
2
1
2
1
2
1
2
1
21
2
1
2
1
2
1
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
12
4
5
31
6
2
CRITICAL21
CRITICAL
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
2
1
2
1
3 1
2
1
2
1
1
2
6
4
5
3
54
55
53
48
26
72
66
52
96
88
21
5
7
9
4
20
19
18
17
16
14
12
11
47
46
50
44
49
75
77
81
82
80
79
56
13
3
94
2
86
87
89
90
91
93
92
95
30
28
24 43
42
41
39
34
33
31
29
25
68
69
73
74
76
70
23
38
37
8
97
85
71
67
62
57
15
10
6
1
51
84
58
59
60
61
63
64
65
27
83
78
45
40
36
35
32
22
CRITICAL
21
NO STUFF
2
1
8
7
6
5
4
3
2
1
12
11
10
9
CRITICAL
2
1
2
1
2
1
CR-27
+2_5V_MARVELL
LTC3405_SW
ENET_COMA
ENET_CTAP_CHGND
CLK25M_XTAL_IN
+2_5V_MARVELL_AVDD
+1_0V_MARVELL
RJ45_DN<3>
RJ45_DP<3>
RJ45_DN<1>
RJ45_DN<2>
RJ45_DP<2>
RJ45_DP<0>
RJ45_DN<0>
RJ45_DP<1>
LED_LINK10
LED_LINK100
LED_RX_SPN
CLK25M_ENET_XOUT
ENET_VSSC
CLK25M_ENET_XIN
ENET_HSDACP
ENET_RST_L
ENET_HSDACM
ENET_ENERGY_DET
ENET_MDIO
ENET_MDC
ENET_RX_ER
ENET_CRS
ENET_COL
ENET_RX_DV
ENET_PHY_TXD<3>
ENET_PHY_TXD<4>
ENET_PHY_TXD<5>
ENET_PHY_TXD<6>
ENET_PHY_TXD<7>
ENET_PHY_TX_EN
ENET_PHY_TX_ER
CLKENET_PHY_GTX
ENET_PHY_TXD<1>
ENET_PHY_TXD<2>
ENET_PHY_TXD<0>
ENET_LINK_RXD<7>
ENET_LINK_RXD<6>
ENET_LINK_RXD<5>
ENET_LINK_RXD<4>
ENET_LINK_RXD<3>
ENET_LINK_RXD<2>
ENET_LINK_RXD<1>
ENET_LINK_RXD<0>
JTAG_ASIC_TRST_L
JTAG_ASIC_TMS
JTAG_ASIC_TCK
JTAG_ASIC_TDO_TP
MDI_M<3>
MDI_P<3>
MDI_M<2>
MDI_P<2>
MDI_M<1>
MDI_M<0>
AC_IN
SLEEP_L_LS5
CLKENET_PHY_TX
CLKENET_PHY_GBE_REF
CLKENET_PHY_RX
JTAG_ENET_TDI
MDI_P<1>
MDI_P<0>
MDI0_PD MDI1_PD MDI2_PD MDI3_PD
3405_MODE
3405_VFB
RJ45_C3_PD
CLKENET_LINK_TX
CLKENET_LINK_RX
CLKENET_LINK_GBE_REF
ENET_RSET
RJ45_C0_PD
RJ45_C1_PD
RJ45_C2_PD
INT_ENET_RST_L
IO_RESET_L
+2_5V_MARVELL
35
30
31
34
26
38
39
39
39
39
39
39
39
39
37
37
37
37
37
37
37
37
37
37
37
37
37
36
37
37
37
37
37
37
37
37
37
37
37
39
39
39
30
33
36
36
36
19
38
27
38
38
38
38
37
37
37
37
37
37
37
37
36
36
15
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
39
37
37
37
37
37
37
29
20
36
36
36
14
37
37
14
14
14
15
18
27
1K5%
1/16WMF
R365
402402CERM6.3V20%
0.22UFC505
SM11/16W
RP36225%
SM11/16W
RP35225%
402MF
1/16W5%
22R404
402MF
1/16W5%
22R403
402CERM10V20%0.1UFC577
402CERM10V20%0.1UFC507
402CERM10V20%0.1UFC591
OE
GND
OUT
VCC
OSCSM-A
98.304MG1
05%1/16WMF
R367
402
100K5%
1/16WMF
R674
402
402MF
1/16W5%
47R440
1005%1/16WMF
R673
402402CERM6.3V20%0.22UFC584
C5751UF
603CERM10V20%
C5781UF
603CERM10V20%
C5461UF
603CERM10V20%
C5311UF
603CERM10V20%
603MF
1/16W5%
1R460
603MF
1/16W5%
1R463
603MF
1/16W5%
1R409
603MF
1/16W5%
1R392
SYM_VER2
GND
OUTIN
BYP ADJ
SOT-23-1LTC1761ES5-BYP
U33
805CERM10V20%
2.2UFC587 16.2K
1%1/16WMF
R482
402
402MF
1/16W1%
27.4KR483
16.2K1%1/16WMF
R485
402
27.4K1%1/16WMF
R484
402
805CERM10V20%
2.2UFC588
603MF
1/16W5%
1R462
603CERM10V20%1UFC775
1K5%1/16WMF
R472
402
603CERM10V20%1UFC576
3.35%1/16WMF
R461
603
3.35%
1/16WMF
R672
603
805CERM10V20%2.2UFC513
805CERM10V20%2.2UFC514
105%1/16WMF
R369
402
SM-1400-OHM-EMIL3
ADJ
BYPGND
OUT
NC
NC
SHDN
IN
U34LT1962-ADJ
MSOP
603MF
1/16W5%
1R1000
402CERM10V20%0.1UFC1000
56.21%
1/16WMF
R425
402
56.21%1/16WMF
R419
402
603CERM10V20%
1UFC556
56.21%1/16WMF
R410
402
56.21%
1/16WMF
R420
402
4.99K1%1/16WMF
R411
402402
CERM25V5%
220PFC542
603CERM10V20%1UFC523
56.21%
1/16WMF
R405
402
56.21%1/16WMF
R397
402
56.21%1/16WMF
R429
402
4.99K1%1/16WMF
R433
402402CERM25V5%
220PFC563
56.21%1/16WMF
R432
402
1K5%1/16WMF
R650
402
VREG_PD
PADTHRML AGND
SM
TESTM
SE
D5D6
RESETZ
D7
DGND
PLLVDD1.8
3.3DVDD
PLLGND
PLL
3.3VDD
D3D4
D1D2
BMODE
PC2
PD
PC1
CPS
PC0
D0
LREQ
LPS
FOP
LCLK
3.3AVDD DVDD
1.8
TPA1+TPA1-
PCLK
TPA0-TPA0+
TPA2+TPA2-
C/LKON
CTL0CTL1
CNA
PINT
TPBIAS0TPBIAS1
XOXI
TPBIAS2
R1R0
TPB2-TPB2+
TPB1-TPB1+
TPB0-TPB0+
U28TSB81BA3
PQFP
D27SC-59
SDM20E40C
+5V_SLEEP
402CERM10V20%0.1UFC769
805CERM6.3V20%10UFC593
402CERM10V20%0.1UFC749
1K5%
1/16WMF
R393
402
402CERM10V20%0.1UFC506
805CERM6.3V20%10UFC519
402CERM10V20%0.1UFC595
805CERM6.3V20%10UFC590
402CERM10V20%0.1UFC758
C783100UF
20%10V
TANTSMD-3
220uHL41
SM-3
MBR0540SMD20
ON/OFFGNDVOUT
FBVINSM
LM2594U31
2320CERM50V
N20P20%10UFC779
402K1%
1/16WMF
R456
402
402CERM10V20%0.1UFC508
402MF
1/16W5%
22R396
402CERM10V20%0.1UFC745
402MF
1/16W1%
6.34KR471
10K5%1/16WMF
R388
402
1K5%
1/16WMF
R368
402
1K5%1/16WMF
R366
402
1K5%
1/16WMF
R364
402
4705%
1/16WMF
R659
402
1K5%1/16WMF
R391
402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 28 44A051-6278
SPEC SAID TO USE 10K
RECEIVES POWERRESET PULSE WHEN PHY FIRSTINTERNAL PULLUP PROVIDESCAPACITOR IN CONJUCTION WITH
(TXD-FWA)
(TXD-FWB)
(RXD-FWA)
(RXD-FWA)
(RXD-FWB)
(RXD-FWB)
(TXD-FWA)
(TXD-FWB)
(TXD-FWB)
(TXD-FWB)
(TXD-FWA)
(TXD-FWA)
(RXD-FWB)
(RXD-FWB)
(RXD-FWA)
(RXD-FWA)
FW_TPB1N
FW_TPA1P
FW_TPB0N
FW_TPB1P
FW_TPB0P
FW_TPA1N
FW_TPA0N
FW_TPA0P
PHY PIN 25 PHY PIN 28
PHY PIN 38
NC
FIREWIRE
IADJ = 30NA AT 25C
IADJ = 30NA AT 25C
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
VOUT = 1.22*(1+R2/R1)+ IADJ*R2
PHY PIN 64
PHY PIN 40
(MAY PROVIDE POWER, OR
PWR CLASS = 100
MAY REQUIRE UP TO 3W)
(PC0 IS MSB, PC2 IS LSB)
SN0201029PFP
NC
NC
NC
PHY PIN 21
PHY PIN 50
PHY PIN 61
R2
R1
RX0
TX0
R2
R1
NC
NC
NC
PHY PINS 72,76
PLACE NEAR PHY
PLACE NEAR PHY
1MA(MAX) BUS HOLDER EACH
1 -> A-ONLY PORT
0 -> BILINGUAL PORT
DSX STRAP OPTIONS
PHY PINS 4,14
165MA MAX LOAD
2
1
2
1
5
6
7
8
4
3
2
1
5
6
7
8
4
3
2
1
21
21
2
1
2
1
2
1
4
3 1
2
CRITICAL
2
1
2
1NO STUFF
21
2
1
2
1
21
21
21
21
21
21
21
21
51
2
3 4
CRITICAL
2
1
2
1
21
2
1
2
12
1
21
1
2
1
2
2
1
2
1
2
1
2
1
2
1
2
1
2
1
5
1
7
6
8
4
3
2
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
26
27
73
60
54
47
55
56
48
49
41
42
58
59
52
53
45
46
81
78
36
35
75
22
23
32
31
30
29
28
25
1
77
5
68
67
66
3
80
7
33
70
69
18
671
65
37
8
76
72
64
38
144
20
19
17
16
15
13
12
11
2
10
9
34
79
74
63
57
51
44
39
24
62
61
50
43
40
21
CRITICAL
3
2
1
2
1
2
1
2
1
2
1
2
1
2
12
1
2
1
2
1
2
1
21
CRITICAL
2
1
8
7
56
4
CRITICAL
2
1
2
1
2
1
21
2
1
12
1
2
2
1
2
1
2
1
2
1
2
1
CR-28
LM2594_IN
+FW_PWR_OR
+3V_FW_UF
+3V_FW
FW_PHY_CNTL<1>
FW_PHY_CNTL<0>
FW_BIAS0
FW_BIAS1
FW_PINT
CLKFW_PHY_PCLK
+1_95V_FW_DVDD_TX0
FW_TESTM
+1_95V_FW_DVDD_PORT1
FW_BMODE
FW_CPS
+3V_FW_AVDD_PORT0
+1_95V_FW_DVDD
+1_95V_FW_DVDD_RX0
+3V_FW_AVDD_PORT2
FW_TPA1N
FW_TPA1P
FW_TPA0P
FW_TPA0N
FW_R0
FW_R1
FW_TPB1N
FW_TPB1P
FW_TPB0N
FW_TPB0P
FW_TPB2_PD
FW_XI
+3V_FW_AVDD
+3V_FW_AVDD_PORT1
CLKFW_PHY_LCLK
FW_PHY_LPS
FW_PHY_LREQ
FW_PC_PU
FW_PHY_PD
FW_PC_PD
FW_PHY_DATA<0>
FW_PHY_DATA<4>
FW_PHY_DATA<1>
FW_PHY_DATA<2>
FW_PHY_DATA<3>
+1_95V_FW_PLL400VDD
+1_95V_FW_PLL500VDD
FW_PHY_DATA<5>
FW_PHY_DATA<6>
FW_PHY_DATA<7>
FW_PHY_RESET_L
FW_LKON
FW_PORT1_SEL
FWB_TPB0
+1_95V_FW_DVDD
FW_CORE_BYP
+1_95V_FW_PLLVDDFW_PLL_ADJ
FW_LINK_DATA<7>
FW_LINK_DATA<6>
FW_LINK_DATA<5>
FW_LINK_DATA<4>
FW_LINK_DATA<3>
FW_LINK_DATA<2>
FW_LINK_DATA<1>
FW_LINK_DATA<0>
FW_CORE_ADJ
FWPLL_BYP
+FW_PWR_OR
FW_OSC_ENFW_OSC
+1_95V_FW_PLLVDD
FWB_TPB1
FW_LINK_CNTL<0>FW_PHY_CNTL<0>
CLKFW_LINK_PCLKCLKFW_PHY_PCLK
FW_LINK_CNTL<1>FW_PHY_CNTL<1>
+3V_FW
+1_95V_FW_DVDD
FW_INPUT_PD
FW_VREG_PD
38
38
38
38
29
29
37
37
37
36
38
37
37
37
37
37
37
37
37
36
37
38
38
37
37
37
37
37
37
37
37
29
38
37 37
36 36
37 37
29
38
38
28
38
28
28
28
14
28
38
38
38
28
38
38
29
29
29
29
29
29
29
29
36
38
38
14
14
14
15
37
37
37
37
37
38
38
37
37
37
14
28
28
14
14
14
14
14
14
14
14
28
36
28
14 28
14 28
14 28
28
28
1M5%1/16WMF
R668
402
402CERM16V20%
0.01UFC859
402CERM16V20%0.01UFC862
F21.5AMP-33V
SM
Q7SOI
NDS9407
G
D
SSOT-3632N7002DWQ71
SM
MBRS140T3D31
SMFERR-250-OHML34
SMFERR-250-OHM
L37
F31.5AMP-33V
SM
805CERM50V20%0.1UFC751
SOT-363BAS16TWDP4
470K5%1/16WMF
R655
402
SOT-363BAS16TWDP4
SOT-363BAS16TWDP4
402CERM16V20%
0.01UFC549
J221394BF-RT-SM
05%1/10WFF
R376
805
VP
VGND
TPI#
TPO
TPI
TPO#
F-RT-TH1394AJ24
402CERM16V20%0.01UFC770
402CERM16V20%0.01UFC772
402CERM16V20%0.01UFC740
SYM_VER-2
L51260-OHM-330MA
SM1
SYM_VER-2
L52260-OHM-330MA
SM1
05%1/10WFF
R434
805
402CERM16V20%0.01UFC746
+3V_PMU
100K5%
1/16WMF
R654
402
402MF
1/16W5%
10KR656
470K5%1/16WMF
R265
402
330K5%1/16WMF
R653
402
402CERM16V20%0.01UFC738
+PBUS
D6SOT-363BAV99DW
D6SOT-363BAV99DW
D8SOT-363
BAV99DW
D8SOT-363
BAV99DW
D15SOT-363
BAV99DW
D15SOT-363
BAV99DW
D13SOT-363BAV99DW
D13SOT-363BAV99DW
G
D
SSOT-3632N7002DWQ17
SOT231N5227B
DZ2402CERM50V20%0.001UFC861
402CERM10V20%0.1UFC860
402CERM16V20%
0.01UFC863
402CERM16V20%0.01UFC864
400-OHM-EMIL54
SM-1
402MF
1/16W5%
10KR762
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 29 44A051-6278
PORT POWER SWITCH
NC
FIREWIRE PORTS
INPUT
OUTPUTTPA(R)
TPA
TPA*
VG
TPB
TPB(R)
TPB*
SC
VP
(TPI0R)BREF
AREF
SO WHEN A BILINGUAL DEVICE
THERE’S NO DC PATH BETWEEN
ALL LOCAL GROUNDS PER 1394B SPECAREF NEEDS TO BE ISOLATED FROM
IS PLUGGED TO BETA-ONLY DEVICE,
THEM (TO AVOID GROUND OFFSET ISSUE)
PER 1394B V1.33
BREF SHOULD BE HARD CONNECTED TOLOGIC GROUND FOR SPEED SIGNALINGAND CONNECTION DETECTION CURRENTS
FIREWIRE A
PORT 1514-0057
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
PMU_POWER_UP_LSTATE
(AC)SLEEP(AC)
(AC)RUN
SHUTDOWN
SHUTDOWN
RUN
(BATT)
(BATT)
1
1
(BATT)SLEEP 1
0
DCDC_ENPOWER_UP
0
0
0
0
1
1
0
0
1
1
1
1
2.99V +4_6V_BU
OFF
ON
0
1
OFF
ON
ON
+3V_PMU +3V_PMU
AC_IN
1
1
1
0
0
0
LTC4210_ON
(PULL-DOWN RESISTOR)OFF
RUNNING OR WHEN ASLEEP ON AC
ENABLES PORT POWER WHEN MACHINE IS
CLEAR OUT ALL PLANES UNDER TRANSFORMERS
FIREWIRE B - BILINGUAL
PORT 0514S0024
2
1
2
1
2
1
2 1 3
2
1
4
8
7
6
5
CRITICAL
4
5
3
21
2
1
2
1
2 1
2
1
61
2
1
4 3
52
2
1
NO STUFF
CHGND1
9
8
7
6
5
4
3
2
1
11
10
CRITICAL
1
2
1
2
5
6
3
4
10987
CRITICAL
2
1
2
1
2
1
4
12
3
CRITICAL
4
12
3
CRITICAL
2
1
CHGND6
CHGND6
2
1
NO STUFF
2
1
2 1
CHGND1
2
1
2
1
2
1
3
5
4
6
2
1
3
5
4
6
2
1
3
5
4
6
2
1
3
5
4
6
2
1
CHGND6
1
2
6
3
12
1
2
1
2
1
2
1
2121
CR-29
+FW_VP1
+FW_PWR_PORTA
FW_TPA0P
FW_TPB0P
FW_TPA0N
FW_TPB0N
FW_VGND1
FW_TPB1P
FW_TPB1N
FW_TPA1N
FW_TPA1P
FW_TPI1N
FW_TPI1P
FW_TPO1P
FW_TPO1N
FW_TPO0R
FW_VGND0
+FW_VP0
+FW_PWR_OR
+3V_FW_ESD+3V_FW_ESD_ILIM
+3V_FW
+3V_FW_ESD
+FW_SW
FW_PWR_GATE
FW_PWREN_L
DCDC_EN
AC_IN AC_IN_FW_CNTL
PMU_POWER_UP_L
RUN_OR_AC
POWER_UP
+FW_FUSE
39 34 33
31
37
37
37
37
37
37
37
37
39
39
39
39
39
38
38
38
38
32
30
33
38
38
28
28
28
28
38
28
28
28
28
37
37
37
37
38
38
38
28
29 38
28
29
38
20
27
30
38
05%1/16WMF
R687
402
402MF
1/16W5%
10MR688
402MF
1/16W5%
1KR479
402MF
1/16W5%
1KR444
402MF
1/16W5%
10MR491
05%
1/16WMF
R489
402
1K5%1/16WMF
R492
402
402MF
1/16W5%
2.2KR448
402MF
1/16W5%
4.7R686
402MF
1/16W5%
2.2KR449
402CERM10V20%
0.1UFC597
402CERM50V5%
12PFC598
402CERM10V20%
0.1UFC797
402CERM10V20%
0.1UFC798
402CERM50V5%12PFC796
402CERM50V5%12PFC794
402CERM50V5%
12PFC592
402CERM10V20%
0.1UFC791
Y5
SM
10.00M
Y6SM-1
32.768K
P86_XCOUT
AVSSVSS
XINRESETVREFCNVSS
BYTEXOUT
AVCC
P50_WRL_WRP51_WRH_BHE
P52_RD
P65_CLK1P66_RXD1P67_TXD1
P74_TA2OUT_WP75_TA2IN_W
P60_CTS0_RTS0
P57_RDY_CLKOUTP56_ALE
P55_HOLDP54_HLDAP53_BCLK
P61_CLK0P62_RXD0P63_TXD0
P70_TXD2_SDA_TA0OUT
P72_CLK2_TA1OUT_VP73_CTS2_RTS2_TA1IN_V
P100_AN0
P90_TB0IN_CLK3P91_TB1IN_SIN3
P92_TB2IN_SOUT3P93_DA0_TB3INP94_DA1_TB4IN
P95_ANEX0_CLK4P96_ANEX1_SOUT4P97_ADTRG_SIN4
P87_XCIN
P85_NMIP84_INT2P83_INT1P82_INT0
P81_TA4IN_UP80_TA4OUT_U
P77_TA3INP76_TA3OUT
P107_AN7_KI3P106_AN6_KI2P105_AN5_KI1P104_AN4_KI0
P103_AN3P102_AN2P101_AN1
P64_CTS1_RTS1_CTS0_CLKS1
P71_RXD2_SCL_TA0IN_TB5IN
VCC
P01_D1P00_D0
P02_D2P03_D3P04_D4P05_D5P06_D6P07_D7
P10_D8P11_D9P12_D10P13_D11
P21_A1_D1_D0P22_A2_D2_D1P23_A3_D3_D2P24_A4_D4_D3P25_A5_D5_D4
P14_D12
P17_D15_INT5
P15_D13_INT3P16_D14_INT4
P20_A0_D0
P27_A7_D7_D6P26_A6_D6_D5
P30_A8_D7P31_A9P32_A10P33_A11P34_A12P35_A13P36_A14P37_A15
P45_CS1P46_CS2P47_CS3
P44_CS0P43_A19
P40_A16P41_A17P42_A18
FLAS
U39M16C62
805CERM6.3V20%
10UFC589
402MF
1/16W5%
10KR700
402MF
1/16W5%
10KR701
+5V_SLEEP
+3V_MAIN
402MF
1/16W5%
10KR496
402MF
1/16W5%
100KR497
402MF
1/16W5%
470KR477
402MF
1/16W5%
470KR480
402MF
1/16W5%
100KR436
100K1%1/16WMF
R430
402
+3V_PMU
402MF
1/16W5%
10KR699
402MF
1/16W5%
10KR696
402MF
1/16W5%
100KR442
402MF
1/16W5%
10KR443
402MF
1/16W5%
100KR697
402MF
1/16W5%
100KR698
402MF
1/16W5%
470KR450
402MF
1/16W5%
10KR478
402MF
1/16W5%
10KR481
+3V_PMU
402MF
1/16W5%
1KR689
402MF
1/16W5%
10KR490
SM11/16W5%
100KRP52
SM11/16W5%
100KRP52
SM11/16W5%
100KRP52
SM11/16W5%
10KRP49
SM11/16W5%
10KRP49
SM11/16W5%
10KRP49
SM11/16W5%
10KRP49
402MF
1/16W1%
7.15KR447402
MF1/16W1%
7.15KR446
402MF
1/16W5%
100KR695
32U32
TSSOP74LVC32
32U32
TSSOP74LVC32
+3V_PMU
+3V_PMU
+3V_PMU
32U32
TSSOP74LVC32
RSET*MR*
GND
VCCU38
MAX6804SOT143
SM11/16W5%
100KRP52
100K1%1/16WMF
R445
402
402K1%1/16WMF
R902
402
+3V_SLEEP
SM
U53LMC7211
12.7K1%1/16WMF
R269
402
5.23K1%1/16WMF
R266
402
+3V_PMU
402MF
1/16W1%
499KR270
402CERM10V20%0.1UFC257
10K5%
1/16WMF
R324
402
S
D
G
Q572N7002SM
+3V_PMU
+3V_PMU
PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:
TABLE_ALT_HEAD
TABLE_5_ITEM
341S1008 1 IC,PMU,V81B U39
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 30 44A051-6278
TABLE_ALT_ITEM
197S0604197S0704 Y5 Alt crystal size
REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD
QTY DESCRIPTIONPART#
50MV OF HYSTERSIS
PMU KEYBOARD RESET CIRCUIT
Y5’S LOAD CAPACITANCE IS 12PF
Keep crystal subcircuit close to PMU.
PMU
Keep crystal subcircuit close to PMU.
NC
(CHARGE_I)NC
NC
NC
NC
NC
NC
UNDERVOLTAGE RESET CIRCUIT
NC
NC
both are off during PMU reset.will act as our pulldown sinceto +3V_MAIN or +3V_SLEEP, which
CPU_VCORE_HI_OC/PMU_AP shouldhave a pulldown for coming out ofreset. MLB will have a pull-up
(PMU_AP)
Y6’S LOAD CAPACITANCE IS 12.5PF
RECOGNIZES AS A29
RECOGNIZES AS Q11FULL FUNCTIONS
LIMITED FUNCTIONSRECOGNIZES AS HOOPER
NO BATTERY CHARGINGFULL FUNCTIONS
LIMITED FUNCTIONS
SYSTEM STATUSID VOLT
2.31V1.65V- RANGE
3.28V
PIN VOLT
2.066V2.007V-
2.558V-2.661V
0.589V-0.663V
3.19V-
ADAPTER
Q11 (65W)
A29 (45W)
AIRLINE
HOOPER
1
2
3
CASE
4
2.31V-2.97V
0.33V-0.99V
2.97V-3.30V
Q11 ADAPTER DETECTION SCHEME
A29 DETECT CIRCUIT
2
1
21
NO STUFF
21
21
21
NO STUFF
2
1
2
1
21
21
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
CRITICAL
41
CRITICAL
11
13
6212
96
6014
10
98
99
100
1
2
3
4
5
8
9
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
61
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
87
88
89
90
91
92
93
95
79
80
81
82
83
84
85
86
7
6
94
97
OMIT
2
1
12
12
12
12
12
12
12
2
1
12
12
12
21
21
12
21
21
21
12
12
54
63
72
54
63
72
81
12
12
21
14
11
12
13
7
14
8
9
10
7
14
6
5
4
7
4
23
1
CRITICAL
81
2
1
2
1
2
5
1
3
4
2
1
2
1
21
2
1
2
1
2
1
3
CR-30
+4_85V_RAW
A29_DETECT
PMU_AC_DET
ADAPTER_DET
2_34V_REF
A29_DET_L
PMU_KB_RESET_L
PMU_KB_RESET_IN2
PMU_KB_RESET_IN1
KBD_OPTION_L
KBD_SHIFT_L
KBD_CONTROL_L
SOFT_PWR_ON_L
PMU_I2C_CLK
PMU_I2C_DATA
PMU_SMB_DATA
PMU_SMB_CLK
PMU_KB_RESET_L
PMU_RESET_L
+3V_PMU_RESET
PMU_NMI_L
PMU_NMI_BUTTON_L
PMU_BATT1_DET_L_PU
PMU_BATT_DET_L
PMU_POWERUP_OK
PMU_OOPS
THERM_L_OC
+3V_PMU_AVCC
PMU_LID_CLOSED_L
POWER_VALID
PMU_PME_L
TPAD_RXD
TPAD_TXD
PMU_RESET_BUTTON_L
PMU_EPM
+3V_PMU_AVCC
CLK10M_PMU_XOUT_UF
CLK10M_PMU_XOUT
CLK10M_PMU_XIN
CAPSLOCK_LED_L
PMU_CAPSLOCK_LED_L
NUMLOCK_LED_L
PMU_NUMLOCK_LED_L
CLK32K_PMU_XIN
CLK32K_PMU_XOUT_UF
PMU_AC_IN
AC_IN
PMU_BATT0_DET_L
PMU_BATT_DET_L
CLK32K_PMU_XOUT
+3V_PMU_AVCC
PMU_CNVSS
PMU_BYTE
CPU_VCORE_HI_OC
INT_RESET_L
MAIN_RESET_L
PMU_INT_NMI
PMU_EPM
INT_PU_RESET_L
PMU_CPU_HRESET_L
PMU_FROM_INT
PMU_TO_INT
PMU_ACK_L
PMU_CLK
PMU_REQ_L
PMU_LID_CLOSED_L
PMU_RESET_BUTTON_L
PMU_NMI_BUTTON_L
TPAD_RXD
TPAD_TXD
SYSTEM_CLK_EN
CPU_CLK_EN
PMU_CHARGE_V
PMU_CHRG_BATT_0
PMU_SLEEP_LED_L
CPU_SMI_L
POWER_VALID
PMU_PME_L
INT_PEND_PROC_INT
PMU_NMI_L
PMU_BATT1_DET_L_PU
INT_PROC_SLEEP_REQ_L
PMU_POWERUP_OK
THERM_L_OC
PMU_OOPS
PMU_I2C_CLK
PMU_I2C_DATA
PMU_SMB_CLK
PMU_SMB_DATA
KBD_Y<1>
KBD_Y<0>
KBD_Y<2>
KBD_Y<4>
KBD_Y<3>
KBD_Y<7>
KBD_Y<6>
KBD_Y<5>
PMU_POWER_UP_L
CHARGE_LED_L
COMM_RING_DET_L
SOFT_PWR_ON_L
KBD_X<0>
INT_WATCHDOG_L
KBD_X<2>
KBD_X<1>
KBD_X<5>
KBD_X<4>
KBD_X<3>
KBD_X<7>
KBD_X<6>
KBD_X<9>
KBD_X<8>
IO_RESET_L
KBD_CONTROL_L
KBD_COMMAND_L
KBD_FUNCTION_L
KBD_OPTION_L
KBD_SHIFT_L
KBD_ID
PMU_INT_L
CPU_PLL_STOP_OC
INT_SUSPEND_ACK_L
SLEEP
INT_SUSPEND_REQ_L
CHARGE_LED_L
SOFT_PWR_ON_L
PMU_POWER_UP_L
SLEEP
INT_SUSPEND_REQ_L
PMU_CNVSS
PMU_BYTE
IO_RESET_L
INT_RESET_L
MAIN_RESET_L
INT_PU_RESET_L
PMU_AC_DET
39
39
30
30
26
30
30
26
34
24
34
27
35
34
35
27
24
39
39
39
30
39
30
31
39
30
21
30
30
33
39
39
30
26
39
39
39
33
39
30
33
33
26
30
21
30
38
39
39
30
30
30
23
31
31
39
30
31
30
38
30
26
30
30
30 38
29
31
38
34
14
19
25
30
30
30
30
30
26
30
31
31
39
39
39
39
39
39
39
39
30
31
25
23
39
39
39
39
39
39
39
39
39
39
19
30
39
39
30
30
39
30
30
31
23
30
30
30
19
14
19
25
32
31
30
31
30
23
23
23
22
30
30
30
30
30
34
30
25
30
30
30
30
25
30
23
30
15
23
23
25
30
30
23
23
27
30
30
30
30
7
10
18
15
30
14
23
15
15
15
15
15
23
25
25
23
23
15
9
31
31
23
5
30
15
15
30
30
15
30
25
30
30
30
30
30
23
23
23
23
23
23
23
23
29
30
15
22
23
15
23
23
23
23
23
23
23
23
23
18
23
23
23
23
23
23
15
7
9
23
9
30
22
29
23
9
30
30
18
10
18
14
30
CSIP
CSIN
BATT
PGND
DLO
LX
DHI
BST
DLOV
LDO
CELLS
GND
CSSNCSSP
REF
CCS
CCI
CCV
IINP
ICHG
ICTL
VCTL
RFIN
ACOK
ACIN
DCIN
CLS
MAX1772U30QSOP
603CERM10V20%1UFC773
47K5%
1/16WMF
R407
402
10K5%
1/16WMF
R422
402
S2
GATE
S1
S3 D4D3
D2
D1
Q16SI4435DY
SOI
+PBUS
F55AMP-125V
SM-2
F45AMP-125V
SM-2
1K1%1/16WMF
R412
402
1K1%
1/16WMF
R455
402
+24V_PBUS
1206FF1/8W5%
33R678
+BATT
603CERM50V20%0.01UFC532
S2
GATE
S1
S3 D4D3
D2
D1
Q8SI4435DY
SOI
470K5%1/16WMF
R300
402
100K5%
1/16WMF
R458
402
805CERM50V20%
0.1UFC439
330K5%
1/16WMF
R336
402
402CERM16V20%
0.01UFC449
402MF
1/16W5%
1MR316
+3V_PMU
20K1%1/16WMF
R473
402
100K1%
1/16WMF
R292
402
102K1%
1/16WMF
R309
402
57.6K1%
1/16WMF
R293
402
10K1%
1/16WMF
R301
402
S2
GATE
S1
S3D4D3
D2
D1
Q10SI4435DY
SOI
G
D
SSOT-3632N7002DWQ14
470K5%1/16WMF
R415
402
SOT23
1N914D11
47K5%
1/16WMF
R660
402
10K5%
1/16WMF
R657
402
1812CERM50V20%2.2UFC515
1812CERM50V20%2.2UFC524
1812CERM50V20%2.2UFC525
1812CERM50V20%2.2UFC526
1812CERM50V20%2.2UFC527
15%
1/16WMF
R441
603
G
D
SSOT-3632N7002DWQ19
G
D
SSOT-3632N7002DWQ19
603CERM25V20%
0.1UFC490
100K5%
1/16WMF
R467
402
805CERM6.3V20%
10UFC551
G
D
SSOT-3632N7002DWQ22
10K5%1/16WMF
R291
402
470K5%1/16WMF
R308
402
G
D
SSOT-3632N7002DWQ4
G
D
SSOT-363
2N7002DWQ4
G
D
SSOT-3632N7002DWQ14
10K1%1/16WMF
R457
402
G
D
SSOT-3632N7002DWQ22
G
D
SSOT-3632N7002DWQ23
100K5%
1/16WMF
R486
402
G
D
SSOT-3632N7002DWQ23
+3V_PMU
805CERM50V20%
0.1UFC557
2.21K0.1%1/16W
MF
R384
60382.5K0.1%1/16WFF
R371
603
402MF
1/16W1%
150R383
SM
U16LMC7211
SM
RS3ABD30
SM
RS3ABD28
SOT-363BAS16TWDP3
SOT-363
BAS16TW
DP3
1210CERM25V20%4.7UFC568
100K5%
1/16WMF
R465
402
1210CERM25V20%
4.7UFC581
1210CERM25V20%
4.7UFC5831210CERM25V20%4.7UFC582
4.12K1%
1/16WMF
R679
402
10K1%
1/16WMF
R683
402
J19M-RT-SM
87438-0833
+BATT
FERR-50-OHML40
SM
FERR-EMI-100-OHML8
SM
FERR-EMI-100-OHML6
SMFERR-50-OHM
L9
SM
J25M-RT-SM
87438-0833
SMFERR-EMI-100-OHML7
Q55IRF7811WSO-8
GNDOUT
PG
RS-
V+
RS+
NC2
NC1
TSSOPMAX4172U24
2512MF1W1%
0.025R382
402MF
1/16W1%
10KR742
42.2K0.1%1/16W
FF
R745
603
51.1K0.1%1/16WFF
R746
603
G
D
SSOT-3632N7002DWQ3100
42.2K0.1%1/16W
FF
R743
603
4.75%
1/16WMF
R406
402
402MF
1/16W1%
1KR744 C757
0.1UF
402CERM10V20%
402CERM10V20%0.1UFC472
+3V_PMU
SOT-363BAS16TWDP3
G
D
SSOT-3632N7002DWQ3100
603CERM10V20%1UFC838
+24V_PBUS
4.75%1/16WMF
R413
402
+24V_PBUS
6.34K1%
1/16WMF
R332
402
805CERM50V20%
0.1UFC843
U54LMC7111SOT23-5
G
D
SSOT-3632N7002DWQ66
G
D
SSOT-3632N7002DWQ66
100K5%
1/16WMF
R747
402
+3V_PMU
1206CERM50V20%
0.47UFC534
1206CERM50V20%0.47UFC535
603CERM10V20%1UF
C580
100K1%
1/16WMF
R663
402
12.7K1%
1/16WMF
R665
402
1210CERM50V20%1UFC550
10uHL36
SM1
2512MF1W1%
0.05R677
15%
1/16WMF
R421
603
402CERM16V20%0.01UFC565
603CERM25V20%
0.1UFC782
603CERM25V20%0.1UFC768
+3V_PMU
27.4K1%
1/16WMF
R476
402
4.12K1%
1/16WMF
R466
402
10K1%
1/16WMF
R464
402
48.7K1%
1/16WMF
R474
402
5.23K1%1/16WMF
R488
402 402CERM16V20%
0.01UFC570
1K1%
1/16WMF
R475
402
Q54IRF7805SM
SM
U35LMC7211
+3V_PMU
1K1%
1/16WMF
R435
402
100K1%
1/16WMF
R680
402
100K1%
1/16WMF
R682
402
499K1%1/16WMF
R487
402
100K1%1/16WMF
R681
402 402CERM16V10%0.047uFC774
402CERM10V20%0.1UFC564
SMMBRS140T3D29
1N914SOT23
D10
402CERM10V20%0.1UFC569
1210CERM25V20%4.7UFC566
1210CERM25V20%
4.7UFC567
C79533UF20%25VELECSM1
XW20SM
4.75%1/16WMF
R685
603
47K5%1/16WMF
R394
402
68K5%1/16WMF
R414
402
S2
GATE
S1
S3 D4D3
D2
D1
Q60SI4435DY
SOI
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 31 44A051-6278
1MSEC INTEGRATION TIME
PLACE R383 CLOSE TO LTC1625
ROUTE LTC1625_ITH CAREFULLY
OD OUTPUT LOW - WHEN AC GREATER THAN 18V
IF A29 ADAPTER USED,ADJUST CURRENT SETTING
IF ADAPTER IS OVER 18V,ADJUST CURRENT SETTING
DC INRUSH LIMITER
SWITCHER CURRENT CONTROL
_62 REFINICTL
For 4.20V cells, VCTL = 0.245 REFIN
For 4.15V cells, VCTL = 0.123 REFIN
CHG
BATTV = CELLS X (4.096 + (0.4096 * V / V ))
I = (0.2048/R ) * (V / V )
VCTL REFIN
BATTERY CHARGER
DC POWER INPUT(POWER JACK, ETC. ON SEPARATE BOARD)
(+3V_PMU)
(GND)
CHARGE DISABLED BY PMU OR INPUT VOLTAGE <18V
CHARGE THROTTLED BY LOW BATTERY VOLTAGE
SWITCHER VOLTAGE CONTROLPMU SELECTS BETWEEN TWO VOLTAGES
GREATER THAN 13.5V DETECT
WHEN AC IS NOT PLUGGED, P-CHANNEL FETS ARE ON
WHEN AC IS IN, P-CHANNEL FETS ARE QUICKLY (DIODE) TURNED OFF
NC
NC
NC
REF = 4.096V
BATTERY SWITCH-OVER CIRCUIT
BATTERYCONNECTOR
(BATT_IN_PD)
RC TIME IS 480K*10UF @ +3V_PMU
PLACE U24 NEXT TO R382U24 SENSE VOLTAGE DROP ACROSS R382
15
13
4
20
23
2
28
14
10
98
22
21
24
1
27 26
19
18
3
16
7
5
6
25
17
12
11
CRITICAL
2
1
2
1
2
1
3
2
1
4
8
7
6
5
2
1
2
1
2
1
2
1
21
2
1
3
2
1
4
8
7
6
5
1
2
2
1
2
1
1
2
2
1
21
1
2
2
1
1
2
1
2
1
2
3
2
1
4
8
7
6
5
4
5
3
2
1
31
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
1
2
6
4
5
3
2
1
2
1
2
1
1
2
6
2
1
1
2
4
5
3
1
2
6
1
2
6
2
1
4
5
3
1
2
6
2
1
4
5
3
2
1
2
1
2
1
2 1
2
5
1
3
4
2 1 2 1
5 2
43
2
1
2
1
2
1
2
1
2
1
2
1
2
1
8
7
6
5
4
3
2
1
CRITICAL
21
21
21
21
8
7
6
5
4
3
2
1
CRITICAL
1
2
321
4
8765
CRITICAL
8
21
7
64
3
5
21
21
2
1
2
1
4
5
3
2
1
2
1
21 21
2
1
6 1
1
2
6
2
1
2
1
2
1
2
1
2
5
1
3
4
4
5
3
1
2
6
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
CRITICAL
21
2
12
12
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1 321
4
8765
CRITICAL
2
5
1
3
4
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
3
1
2
1
2
1
2
1
2
1
21
2
1
2
1
2
1
3
2
1
4
8
7
6
5
CR-31
+ADAPTER_SW
IAC_FB
IAC_RC_COMP
1772_ACIN
AC_ENABLE_GATE
1625_COMP
1772_CLS
1772_REF
1772_GND
BATT_NEG
PMU_BATT_DET_L
+BATT_VSNS
+BATT_POS
BATT_DATA
BATT_CLK
+ADAPTER_SENSE +BATT_24V_FUSE
BATT_24V_GATE
BATT_24PBUS_EN
AC_IN_L_RC
BATT_14PBUS_EN
AC_IN_L
BATT_14V_GATE
+BATT_14V_FUSE+ADAPTER
1772_DCIN
AC_ENABLE_L
AC_IN
AC_IN_L
AC_DIV
1V20_REF
CHARGE_LED_L
ADAPTER_DET
1772_DLO
1772_LX+BATT_RSNS
BATT_LOWBATT_DIV
1V65_REF
+BATT_24V_FUSE
1772_CSIN
1772_CSIP
1772_BST_ESR
PMU_CHARGE_V
BATTV_LOW
BATTV_HIGH
1772_VCTL
1772_ICTL
1772_ACOK_L
PMU_CHRG_BATT_0
CHARGE_DISABLE
BATT_LOW_L
1772_ICHG
1772_CCV_RC
1772_CCV
1772_IINP
1772_DHI
1772_BST
1772_LDO
1772_CELLS
1772_CCS
1772_CSSP
1772_CSSN
1772_DLOV
1772_CCI
PMU_SMB_CLK
PMU_SMB_DATA
AC_IN
BCKFD_PROT_GATE
OVER_18V_ADJ
1772_ACOK_L
CURRENT_THRESHOLD
A29_CURRENT_ADJ
A29_DETECT AC_GTR_18V
MAX4172_OUT
A29_DETECT
A29_CLS_ADJ
ADAPTER_I_REG
LTC1625_ITH
BCKFD_PROT_EN_L
31
31
30
30
39
39
39
38 38
29
38
39
39
38
29
31
31
38
32
38
38
30
38
38
39
39
38 31
31
38 32
38
27
31
32
30
30
38
38
31
37
37
30
31
30
38
37
37
38
30
30
27
31
30
30
SMMBRS140T3D26
15%
1/16WMF
R335
603
+PBUS
4.99K1%
1/16WMF
R304
402
Q50IRF7805SM
L32
SM18.0uH
+24V_PBUS
SOT23
D4
1N914
C76033UF20%25VELECSM1
C71422uF
20%35V
ELECSM-1
C78522uF20%35VELECSM-1
C78622uF20%35VELECSM-1
C76522uF
20%35V
ELECSM-1
C78422uF20%35VELECSM-1
C73233UF
20%25V
ELECSM1
C78733UF
20%25V
ELECSM1
C73633UF20%25VELECSM1
C75933UF
20%25V
ELECSM1
C72233UF20%25VELECSM1
402CERM10V20%0.1UFC469
+3V_PMUVTAP
IN OUTSENSE
GNDFDBKERR
LP2951
SHUT
SOI-3.3V
U25
15%1/16WMF
R390
603
805CERM6.3V20%10UFC540
402CERM10V20%0.1UFC518
15%1/16WMF
R402
603
805CERM10V20%2.2UFC530
294K1%
1/16WMF
R428
402603CERM50V10%470pFC562
100K1%
1/16WMF
R454
402
SHUT
PLUS5VTAP
LP2951
ERRFDBK
GND
SENSEOUTIN
U29SOI
402CERM10V20%
0.1UFC548
805CERM50V20%0.1UFC574
MBR0540
D17SM
MBR0540SMD19
1210FF1/4W5%
390R418
MBR0540
D18SM
+PBUS
158K1%1/16WMF
R285
402
16.2K1%1/16WMF
R286
402
SM
U22LMC7211
+3V_PMU
402CERM10V20%
0.1UFC504
102K1%
1/16WMF
R363
402
10K1%
1/16WMF
R357
402 402MF
1/16W1%
1MR356
G1
S1
D1
Q9FDG6324LSC70-6
G2
D2S2
SC70-6FDG6324L
Q9+5V_MAIN
470K5%
1/16WMF
R341
402
+24V_PBUS
MBR0520LT
D9SM
+5V_MAIN
MBR0520LT
D12SM
+BATT
+5V_MAIN
2.25%1/16WMF
R321
603
1206CERM10V20%4.7UFC444
05%1/16WMF
R322
402
05%1/16WMF
R314
402
XW6SM
J1254550-1490
F-RT-SM
402CERM25V10%0.0047UFC741
Q51IRF7811WSO-8
1812CERM50V20%
2.2UFC555
1812CERM50V20%2.2UFC541
1812CERM50V20%
2.2UFC522
1812CERM50V20%2.2UFC586
1812CERM50V20%
2.2UFC752
1812CERM50V20%2.2UFC767
805CERM25V20%0.22UFC477
1210CERM25V20%
4.7UFC503
1210CERM25V20%4.7UFC502
MBR0540
D3SM
BOOST
SW
SGND PGND
TK
VIN
SYNC
RUN/SS
VPROG
ITH
FCB
INTVCC
TG
VOSENSE
BGLTC1625
EXTVCCU18SSOP
603CERM25V5%
4700pFC463
603CERM50V10%470pFC445
805CERM50V20%
0.1UFC478
603CERM25V5%
4700pFC446
1812CERM50V20%
2.2UFC572
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 32 44A051-6278
+PBUS IS BOTH AN INPUT AND OUTPUT TO BUBBA
12.8V REGULATOR
1625 IS SHUT-OFF
WHEN +24V_PBUS IS BELOW ~13.44V,
3V_PMU_SENSE
KEEP VIN/TK LOOP SHORT
(+4_6V_BU)
PMU SUPPLY
CONNECT LTC1625 TK PIN AT TOP-SIDE FET
PBUS HOLD-UP CAPS
BOOTSTRAP SYSTEM FROMADAPTER OR BATTERY
NC
BACKUP BATTERY / USB CONNECTOR
NC
24V IS AN OUTPUT FROM BUBBA
12.8V PBUS SUPPLY
2
1
1
2
1
2
321
4
8765
CRITICAL
3
2 1
CRITICAL
3 1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
6
3
2
18
4
7
5
2
1
2
12
1
2
1
2
1
2
1
2
1
2
1
3
2
6
18
4
7
5
2
1
2
1
21
2
1
21
21
2
1
2
1
2
5
1
3
4
2
1
2
1
2
121
1
5
6 CRITICAL
4
3
2
6
CRITICAL
2
1
21
21
2
1
2
1
2
1NO STUFF
2
1
21
OMIT
9
8
7
6
5
4
3
2
14
13
12
11
10
1
16
15
CRITICAL
2
1
NO STUFF
321
4
8765
CRITICAL
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
21
8
7
16
15 13
2
14
6
3
9
5
11
4
1
12
10
CRITICAL
2
1
2
1
2
1
2
1
2
1
CR-32
1625_BG
DCDC_EN
1625_BST
1625_BST_ESR
1625_DIV
+3V_PMU_ESR+4_85V_ESR
+ADAPTER_ILIM+ADAPTER
+4_85V_RAW
FB_4_85V_BU
+ADAPTER_OR_BATT
1625_VFB
1625_EXTVCC
1V20_REF
1625_ENABLE_L
1625_TG
1625_VSW
1625_ENABLE
1625_VIN
COMP_RC
1625_COMP
1625_RUNSS
1625_SGND
1625_INTVCC
1625_FCB
+4_6V_BU
3V_PMU_VTAP
RIGHT_USB_DP
NEC_RIGHT_USB_PWREN
RIGHT_USB_DM
NEC_RIGHT_USB_OVERCURRENT
39 34 33
39
39
29
38
38
38
38
37
39
37
39
20
38 38
38 31
30
38
38
31
38
38
31
38
38
33
26
26
26
26
SGND PGND
STBYMD
FCB
FREQSET
SNS1-
PGOOD
VOSNS2
VOUT3.3
VCCVCCEXT INT VIN
TG2
SW2
SNS2-
BG2
SNS2+
BOOST2
ITH2
RUN/SS2SS1
SNS1+
BG1
SW1
BOOST1
TG1
VOSNS1
ITH1
RUN/
SSOPLTC3707U27
105%1/16WMF
R303
402
470K5%1/16WMF
R416
402
G
D
SSOT-3632N7002DWQ15
402CERM16V20%0.01UFC571
G
D
SSOT-3632N7002DWQ17
402MF
1/16W5%
100KR437
1206FF1/4W1%
0.005R424
G
D
SSOT-3632N7002DWQ15
+5V_SLEEP
C792100uF20%10VTANTSMD-3
805CERM25V20%
0.22UFC512
C5990.01UF
402CERM16V20%
+5V_MAIN
TSOP
Q24SI3443DV
C623100uF20%10VTANTSMD-3
TSOP
Q35SI3443DV
C6280.1UF
402CERM10V20%
805CERM6.3V20%10UFC626
402MF
1/16W5%
100KR494
402MF
1/16W5%
100KR612
2.25%1/16WMF
R380
603
100K5%
1/16WMF
R274
402
G
D
SSOT-3632N7002DWQ3
402CERM16V20%0.01UFC437
402MF
1/16W5%
100KR294
+5V_MAIN
100K5%
1/16WMF
R302
402
G
D
SSOT-3632N7002DWQ3
+3V_SLEEP+3V_MAIN
C4540.001uF
402CERM50V20%
TSOP
Q21SI3443DV
C5852200pF
603CERM50V5%
402MF
1/16W5%
100KR295
402MF
1/16W5%
100KR452
L35
SM14.8UH
L33
SM14.8UH
113K1%
1/16WMF
R387
402
SMD7
MBR0540SMD14MBR0540
2.25%
1/16WMF
R401
603
SOT23
D16
1N914
402MF
1/16W5%
1MR431
402CERM16V20%0.01UFC558
805CERM6.3V20%10UFC596
21.5K1%
1/16WMF
R386
402
402CERM25V5%220PFC501
402CERM50V5%180pFC528
1206CERM10V20%4.7UFC529
Q61SI4888DYSOI
402CERM10V20%0.1UFC561
402CERM16V10%
0.047UFC500
805CERM25V20%0.22UFC547
402CERM50V5%
180pFC545
Q62SI4888DYSOI
63.4K1%1/16WMF
R417
402
20K1%1/16WMF
R423
402402CERM16V20%
0.01UFC521
05%
1/16WMF
R379
402
05%1/16WMF
R395
402
05%1/16WMF
R389
402
402CERM50V20%0.001uFC560
402CERM25V5%
270PFC559 4.99K
1%1/16WMF
R426
402
402CERM50V20%
0.001uFC539
Q52SI4888DY
SOI
402CERM25V5%270PFC5334.99K
1%1/16W
MF
R400
402
SMMBRS140T3D33
+5V_MAIN
1210CERM10V20%
22UFC793
1210CERM10V20%22UFC780
SMMBRS140T3
D22Q43
SI4888DYSOI
1210CERM10V20%22UFC724
1210CERM10V20%
22UFC723
C720330uF
20%6.3VTANTSMD
XW11SM
1812CERM50V20%
2.2UFC492
1812CERM50V20%
2.2UFC468
1812CERM50V20%
2.2UFC729
1812CERM50V20%
2.2UFC737
1812CERM50V20%2.2UFC750
1812CERM50V20%2.2UFC743
1812CERM50V20%2.2UFC766
1812CERM50V20%2.2UFC771
105%1/16WMF
R296
402
C790330UF20%6.3VTANTSMD
105%
1/16WMF
R453
402
105%
1/16WMF
R439
402
1206FF1/4W1%
0.005R651
+24V_PBUS
C5730.001uF
402CERM50V20%
1M5%
1/16WMF
R360
402
1M5%1/16WMF
R427
402
+5V_MAIN +3V_MAIN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 33 44A051-6278
THIS SIGNAL IS OPEN COLLECTOR TO GND WHEN POWER IS NOT GOOD
1
DCDC_EN TRUTH TABLE
+3V_PMU+4_6V_BU+3V_PMU+3V_PMU VOLTAGE
Shutdown1
1 0
00
DCDC_EN_LDCDC_EN
1
0
0
0
1 Run
Sleep
PMU_POWER_UP_L SLEEP State
3V START TO TURN ON ~25MS AFTER DCDC_EN_L
5V START TO TURN ON ~12.5MS AFTER DCDC_EN_L
POWERDOWN DELAY IS AROUND 4MS-15.6MS
DIODE WILL ENSURE DCDC_EN_L IS QUICKLY DISCHARGED DURING SHUT-DOWN
3.3V/5V REGULATOR
3.3V/5V MAIN SUPPLY
NC
+5V_SLEEP LOADS
SLEEP LEVEL SHIFTER (3V -> 5V)
+3V_SLEEP LOADS1) CPU PLL Config Control
1 (2.99V) 3) MAP17 - 3V RAIL (IF USING D3COLD)
4) GRAPHIC CHIP SPREAD SPECTRUM CHIP
6) DVI LEVEL SHIFTERS & PULL-UPS & HPD
THERE’S NO 10UF INPUT CAPBECAUSE Q21 IS PLACED ATOUTPUT OF +3V_MAIN SWITCHER
220PF IS USED TO QUIET NOISE ON PGOOD ONCE INTERNAL OPEN DRAIN IS DISENGAGED
1) OPTICAL DRIVE
3) TRACKPAD
2) DVI
4) FANS
5) FIREWIRE PHY
5) LVDS DDC PULL-UPS
2) INTREPID - IIC AND PCI PULL-UPS
8) BOOT BANGER
11) PMU - IIC Pull-ups
12) PCI PULL-UPS
10) WIRELESS (IF POWERING OFF IN SLEEP)
9) HARD DRIVE (IF USING 3V LOGIC)
7) SOUND BOARD
124
24
1627
1726
6
9
13
14
3
2
151
28
20
118
21
5
7
22
1825
1923
10
CRITICAL2
1
2
1
1
2
6
2
1
4
5
3
21
21
4
5
3
2
1
2
1
21
4
3 6
5
2
1
2
1
4
3 6
5
2
1
21
2
1
21
21
2
1
2
1
4
5
3
2
1
21
2
1
1
2
6
21
4
3 6
5
2
1
12
21
21
3
1 2
CRITICAL
3
1 2
CRITICAL
2
1
2
1
2
1
2
1
3 1
21
2
1
2
1
2
1
2
1
2
1
2
1
321
4
8765
CRITICAL
2
1
2
1
2
1
2
1
321
4
8765
CRITICAL
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1
3 2 1
4
8 7 6 5
CRITICAL
2
1
2
1
2
1
2
1
2
12
1
3 2 1
4
8 7 6 5
CRITICAL
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
330UF
2
1
2
1
21
21
2
1
2
1
CR-33
5V_ITH 3V_ITH
3V_ITH_RC
+5V_HD_SLEEP
5V_HD_PWREN
3V_RSNS5V_RSNS
5V_ITH_RC
3707_INTVCC
SLEEP
DCDC_EN_L
SLEEP
3V_SLEEP_PWREN_L
SLEEP
SLEEP_L_LS5_EN_L
SLEEP_L_LS5
SLEEP_LS5_EN_L
SLEEP_LS5
SLEEP_LS5
5V_SLEEP_PWREN
5V_SNSM
5V_SNSP
DCDC_EN
+4_6V_BU
5V_VOSNS
5V_SW
5V_BG
3707_STBY
5V_RUNSS
5V_BOOST_ESR
5V_BOOST
3707_FSET
3707_FCB
3V_RUNSS
3V_VOSNS
3V_TG
3V_BOOST
3V_SW
3V_BG
3V_SNSP
3V_SNSM
5V_TG
3V_BOOST_ESR
3707_SGND
PMU_POWER_UP_L
DCDC_EN_L LTC3707_START_RC
3V_5V_OK
39
35
35
35
35
34
33
35
33
33
34
32
35
38
30
33
30
30
27 33
33
29
38
30
33
24
38 38
38
23
20
23
23
20 25
25
37
37
20
32
38 38
37
37
38
29
20
35
100K5%
1/16WMF
R319
402
+5V_MAIN
100K5%
1/16WMF
R330
402
SM2N3904Q6
SM2N3904Q11
10K5%
1/16WMF
R338
402
XW18SM
C6951000uF20%2.5VTANTSM
XW2SM
C6921000uF
20%2.5VTANT
SM
1210CERM25V20%
4.7UFC415
1210CERM25V20%
4.7UFC414
1210CERM25V20%
4.7UFC413
1210CERM25V20%
4.7UFC417
+PBUS
SMD2MBR0530
603CERM10V20%1UFC471
+5V_MAIN
205%
1/16WMF
R273
402
C6961000uF20%2.5VTANTSM
C6971000uF20%2.5VTANTSM
C6931000uF
20%2.5VTANTSM
603CERM25V20%0.1UFC488
D0D1D2D3D4
SKP/SDN
VCC VDD
V+
ILIMFBS
GNDSA/B
REF
TON
CC
BSTDH
LX
DL
GND
VGATE
FBTIME
MAX1717U21QSOP
402MF
1/16W5%
100R337
XW9SM402
CERM50V20%
0.001UFC493390K
5%1/16W
MF
R358
402
603CERM10V20%1UF
C47505%
1/16WMF
R329
402
402CERM25V5%
220PFC489
27.4K1%
1/16WMF
R317
402
603CERM10V20%1UFC440
12.7K1%
1/16WMF
R318
402402CERM16V20%
0.01UFC497
05%1/16WMF
R246
402
470K5%1/16WMF
R249
402
470K5%1/16WMF
R251
402
05%1/16WMF
R258
402
05%1/16WMF
R247
402
470K5%1/16WMF
R255
402
05%1/16WMF
R257
402
XW7SM
2K1%1/16WMF
R306
402
162K1%1/16WMF
R310
603
SOT-363BAS16TWDP1
SOT-363BAS16TWDP1
SOT-363BAS16TWDP1
470K5%1/16WMF
R260
402
66.5K1%
1/16WMF
R370
402
402CERM25V10%0.0047uFC436
402CERM25V10%
0.0047uFC735
2.25%
1/4WMF
R652
1210
603MF
1/16W5%
2.2R346
1210CERM25V20%
4.7UFC412
1210CERM25V20%
4.7UFC419
1210CERM25V20%
4.7UFC416
1210CERM25V20%
4.7UFC424
1210CERM25V20%
4.7UFC422
1210CERM25V20%
4.7UFC421
1210CERM25V20%
4.7UFC423
1210CERM25V20%
4.7UFC420
805CERM6.3V20%
10UFC621
805CERM6.3V20%
10UFC6
805CERM6.3V20%
10UFC627
805CERM6.3V20%
10UFC32
805CERM6.3V20%
10UFC3
805CERM6.3V20%
10UFC612
805CERM6.3V20%
10UFC8
805CERM6.3V20%
10UFC2
805CERM6.3V20%
10UFC607
805CERM6.3V20%
10UFC614
805CERM6.3V20%
10UFC624
805CERM6.3V20%
10UFC7
805CERM6.3V20%
10UFC112
805CERM6.3V20%
10UFC14
805CERM6.3V20%
10UFC622
805CERM6.3V20%
10UFC620
805CERM6.3V20%
10UFC4
805CERM6.3V20%
10UFC5
805CERM6.3V20%
10UFC1
805CERM6.3V20%
10UFC611
Q41IRF7805SM
M-ST-SM-52465-1217J6402
MF1/16W1%
2.05KR250
402MF
1/16W1%
100R252
603CERM50V10%
0.0022uFC731
C6941000uF
20%2.5VTANT
SM
Q40IRF7805SM
L31
SM1
1.2UH
SMB540CD25
Q45IRF7822SM
Q46IRF7822SM
Q44IRF7822SM
+3V_MAIN
05%1/16WMF
R737
402
470K5%1/16WMF
R735
402
470K5%1/16WMF
R733
402
05%1/16WMF
R734
402
05%1/16WMF
R732
402
470K5%1/16WMF
R731
402
470K5%1/16WMF
R736
402
470K5%1/16WMF
R738
402
1K5%1/16WMF
R739
402
+3V_MAIN
402MF
1/16W5%
0R694
402MF
1/16W5%
0R727
10K5%1/16WMF
R740
402
402MF
1/16W5%
0R730
402CERM10V20%0.1UFC837
SYM_VER-2
GNDOESEL
B4
B3A4
A3
A2B2
Y3
Y4
A1B1
VCC
Y2
Y1PI3B3257U41QSOP
05%1/16WMF
R248
402
C8541000uF20%2.5VTANTSM
05%1/16WMF
R766
402 05%1/16WMF
R767
402 05%1/16WMF
R768
402
05%1/16WMF
R769
402
100K1%1/16WMF
R279
402
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 34 44A051-6278
TABLE_11_HEAD
REFERENCE DESIGNATOR(S) BOM OPTIONQTY DESCRIPTION VALUE VOLT. WATT. TOL.PART # PACKAGEDEVICETABLE_11_HEAD
5%1/16W0402RES10
RES,MTL FILM,1/16W,0 OHM,5%,0402,SMD116S1000 VCORE_NO_OFFSETR306
Keep trace fat (40-100 mils) and short!!
SEL = 1; Y1=B1
NOTE: R310 (R2) NO STUFFED FOR NO OFFSET CASE
VREF = 2.0V, HENCE VOFFSET = 2.0V * (R1/(R1+R2)) AND VCORE = VDAC + VOFFSET.
R1
R2
CLOSEST TO CPUPIN OF 1000uF CAP
PLACE THIS SHORT AT
TO PINS 15 & 13!!PLACE C423 CLOSE
VCORE_VPLUS
Keep trace fat and short!!
OUTPUT VOLTAGE
111
11
11
01 0 11
01
111
1
000
1
1
0
0 1
0
0
00
00
0
0
1
0
1
0
1
1
010
1
0
11
00
0
1 0
10
101
1
00
00
1
0
D3 D2 D0D1
0.9250.950
1.1001.0751.0501.0251.0000.975
1.125
1.2751.2501.2251.2001.1751.1501.75
1.901.851.80
1.952.00
1.70
1.451.50
1.60
1.40
1.55
1.65
1.351.30
DACV
NO CPU NO CPU
D4=1D4=0
ROUTE AS DIFFERENTIAL PAIR
GROUND SENSE VOLTAGE DIVIDER
to GND at bottom-side FETConnect MAX1717 GND pin 13
This allows for an offset to the ground sense to adjust the output voltage.
A
<D0>
When A/B_ is low (slow): <=1K-ohm -> 0
When A/B_ is high (fast): D4-D0 read as-is
>=100K-ohm -> 1
If all pull-ups are >=100K and all
pull-downs are <=1K, V = V .B
VCORE SUPPLY
NC (RFU)
Fmax Test Connections
FOR V-STEP:
<= 1K PU
>= 100K PU
>= 100K PD
<= 1K PD
Lo/SlowHi/Fast
1
1
0
0
0
1
1
0
A/B_ =
D<4..0>
Keep trace fat and short!!
(VCORE_SNS)
(VCORE_GNDSNS)
Keep trace fat and short!!
VCORE POWER SEQUENCINGCPU core follows CPU I/O voltage
(approx. 7ms delay)
<D1><D2><D3><D4>
NEW 1.35V->1.30V
<D1><D2><D3><D4>
MAX1717 VID CAN TAKE 3.3V TO 5.5V INPUTS
SEL = 0; Y1=A1
+20MV OFFSET
[email protected]>[email protected]
2
1
2
1
2
3
1
2
3
1
2
1
21
2
1CRITICAL
21
2
1CRITICAL
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1CRITICAL
2
1CRITICAL
2
1CRITICAL
2
1
12
157
1
8
3
2
9
23
10
11
13
5
4
14
24
17
18
19
20
21
6
22
16
CRITICAL
21
21
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1
2
1
2
1
2
1
2
1NO STUFF
2
1NO STUFF
21
2
1VCORE_OFFSET
2
1VCORE_OFFSET
5 2
4 3
6 1
2
1
2
1
2
1NO STUFF
2
1
2
1
NO STUFF
2 1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
2
1
321
4
8765
CRITICAL
3
2
1
7
8
9
10
11
6
5
4
12
NO STUFF
21
NO STUFF
21
NO STUFF
2
1
NO STUFF
2
1CRITICAL
321
4
8765
CRITICAL
3
2 1
CRITICAL
2
1
CRITICAL
321
4
8765
CRITICAL
321
4
8765
CRITICAL
321
4
8765
CRITICAL
2
1NO STUFF
2
14XVCORE
2
14XVCORE
2
1NO STUFF
2
14XVCORE
2
1NO STUFF
2
1NO STUFF
2
14XVCORE
2
14XVCORE
21
NO STUFF
21
2
14XVCORE
21
NO STUFF
2
1
4XVCORE
12
9
7
4
16
1
13
14
10
11
6
5
3
2
8
15
4XVCORE
2
1NO STUFF
2
1CRITICAL
2
1NO_4XVCORE
2
1NO_4XVCORE
2
1NO_4XVCORE
2
1NO_4XVCORE
2
1
CR-34
CPU_VCORE_SLEEP
VCORE_GNDSNS
VCORE_VGATE
VCORE_GNDA
VCORE_SHDN_L
MIN_LINE_WIDTH=10VCORE_VID<0>
DCDC_EN
SLEEP_L_LS5
CPU_VCORE_PWR_SEQ
CPU_VCORE_SEQ_L
CPU_VCORE_SEQ
CPU_VCORE_HI_OC
MAX1717_AB_SELINT_GPIO1_PU
VCORE_VCC
VCORE_SNS
VCORE_GNDDIV
VCORE_DH
VCORE_FB
VCORE_TIME
VCORE_GND
VCORE_LX
VCORE_BST
VCORE_CC
VCORE_TON
VCORE_REF
VCORE_ILIM
MIN_LINE_WIDTH=10VCORE_VID<4>
MIN_LINE_WIDTH=10VCORE_VID<2>
MIN_LINE_WIDTH=10VCORE_VID<1>
MIN_LINE_WIDTH=10VCORE_VID<3>
MAXBUS_SLEEP
VCORE_GNDDIV
VCORE_GNDDIV_TEST
CPU_VCORE_SNUB
VCORE_BOOST
VCORE_GNDSNS VCORE_GNDSNS_TEST
SOFT_PWR_ON_L
+3V_PMU_RESET VCORE_VID<3>
VCORE_VID<2>
VCORE_VID<1>
VCORE_VID<0>
VCORE_VID<4>
VCORE_DL
CPU_VCORE_HI_OC
VCORE_FAST<1>
VCORE_MUX_EN
VCORE_MUX_SEL
VCORE_SLOW<4>
VCORE_FAST<3>
VCORE_SLOW<3>
VCORE_FAST<2>
VCORE_SLOW<2>
VCORE_SLOW<1>
VCORE_FAST<4>
CPU_VCORE_SLEEP
VCORE_VID<4>
VCORE_FAST<4>
VCORE_VID<3>
VCORE_VID<2>
VCORE_VID<1>
VCORE_FAST<1>
VCORE_FAST<2>
VCORE_FAST<3>
38 23
39
17
39
33
35
16 39
38
32
33
34
9
30
34
38
34
38
38
29
27
30
38
39
7
38
38
23
30
34
5
34
15
34
20
20
7
15
38
38
34
38
38
38
38
38
38
38
38
38
38
34
34
34
34
5
34
38
34
22
30 34
34
34
34
34
38
7
34
34
34
34
5
34
34
34
34
34
34
34
34
2.2UHL14
SM1
+2_5V_MAIN
603CERM10V20%1UFC476
402MF
1/16W5%
20R399
+1_8V_SLEEP+1_8V_MAIN
805CERM6.3V20%
10UFC256
C2142200pF
603CERM50V5%
402MF
1/16W5%
100KR143
SI3447DVU5
TSOP
SI3447DVU9
TSOP
805CERM6.3V20%
10UFC401
C3962200pF
603CERM50V5%
402MF
1/16W5%
100KR231
+2_5V_MAIN +2_5V_SLEEP
402CERM50V5%
10PFC613
AGND THRML
NC_28NC_23NC_15
BST2
OUT1
TON
PGOODREF
DL1
LX1
DH1
VCC
BST1
ON2ON1ILIM2ILIM1
OUT2
SKIP
DL2
LX2
PGND
DH2
VDD
V+
FB1 FB2
MAX1715U23QSOP
4.7UHL30
SM4
Q48IRF7805
SM
Q59IRF7805SM
158K1%1/16WMF
R353
402
158K1%
1/16WMF
R348
402
SOT-363
BAS16TW
DP2
603MF
1/16W5%
4.7R408
603MF
1/16W5%
4.7R398
603CERM25V20%0.1UFC537
MBRS130LT3SM
D23
5.11K1%1/16WMF
R355
402
10K1%1/16WMF
R354
402
+1_5V_MAIN
+5V_MAIN
SOT-363
BAS16TW
DP2
603CERM25V20%0.1UFC536
C715150UF20%6.3VTANTSMD-1
4.7UHL38
SM4
05%1/16WMF
R350
402
05%1/16WMF
R349
402
+PBUS
+PBUS
+PBUS
C708150UF20%6.3VTANTSMD-1
C747150UF20%6.3VTANTSMD-1
C744150UF20%6.3VTANTSMD-1
C753150UF20%6.3VTANTSMD-1
1210CERM25V20%4.7UFC520
1210CERM25V20%4.7UFC538
1210CERM25V20%
4.7UFC491
1210CERM25V20%
4.7UFC511
05%1/16WMF
R351
402
05%
1/16WMF
R352
402
MBRS130LT3SMD32
1210CERM10V20%22UFC610
1M5%1/16WMF
R553
402
10K5%1/16WMF
R67
402
10K5%1/16WMF
R75
402
16.2K1%1/16WMF
R545
402
603CERM25V5%1000PFC619
PVINSVIN
SHDN/RT
SYNC/MODE
SW
VFB
ITHPGOOD
PGND SGND
U4LTC3411
MSOP
XW1SM
XW8SM
324K1%1/16WMF
R57
402
+1_5V_SLEEP
+1_5V_MAIN
603CERM50V5%2200pFC689
805CERM6.3V20%
10UFC683
805CERM6.3V20%10UFC776
805CERM6.3V20%10UFC704
805CERM10V20%2.2UFC554
805CERM10V20%2.2UFC544
SOT-363BAS16TWDP2
402MF
1/16W5%
330KR373
402CERM16V20%0.01UFC499
Q37TSOP
SI3446DV
S
D
G
Q132N7002SM
100K5%
1/16WMF
R385
402
603MF
1/16W5%
0R1606
603MF
1/16W5%
0R1607
Q47IRF7811W
SO-8
Q58IRF7811WSO-8
+1_5V_MAIN
+2_5V_MAIN
805CERM6.3V20%
10UFC86
887K1%
1/16WMF
R546
402
698K1%
1/16WMF
R551
402
402MF
1/16W5%
10R40
603CERM10V20%1UFC15
1M5%1/16WMF
R552
402
+1_8V_MAIN
+3V_MAIN
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 35 44A051-6278
2) +1_5V_LDO1) INTREPID PLLS
+1_8V_MAIN LOADS
1) MPC7450 - MAXBUS I/O - IF 1.8V INTERFACE
+1_8V_SLEEP LOADS
3) CPU PLL Config Straps
2) CPU JTAG & MaxBus Pull-ups
4) L3_OVDD (IF NOT USING 1.5V)
2) AGP I/O IF USING D3HOT1) INTREPID CORE
+1_5V_MAIN LOADS
4) INTREPID MEMORY I/O
1) L3 CORE
3) L3 I/O IF L3_OVDD EXCEEDS 1.5V
MAX1715_GND
CONNECTING 1_5V_FB TO GND, FORCES 1.8V OUTPUT
1) AGP I/O - IF USING D3COLD
1.5V/1.8V/2.5V SUPPLIESCONTINOUS MODE
PULSE MODE
BURST MODE
NC
NC
NC
2) GIGABIT ETHERNET - AVDDL
+2_5V_MAIN LOADS
1.8V SWITCHER
1.5V/2.5V SWITCHER+2_5V_SLEEP LOADS
2) FBCORE/FBIO IF USING D3COLD
1) MAP17 - FBCORE/FBIO IF USING D3HOT
3) DDR SODIMMS - CORE/IO
DIODE PROVIDE PROVIDE QUICK SHUT-DOWNPOWER DOWN DELAY 1.5MS TO 3.5MS
+1_5V_SLEEP LOADS
THERE’S 100K PULL-UP ON PG 31 ALREADY
1) MAXBUS I/O - IF 1.5V INTERFACE
1) L3 I/O
CHANGE R354 BACK TO 10K, 1%, AND STUFF 5.11K FOR 1.5V OPERATION
4) DDR MUXES
6) PCI1510 CORE
5) CLOCK SLEWING I/O
21
CRITICAL
2
1
2 1
2
1
12
21
4
3 6
5
2
1
4
3 6
5
2
1
2
1
21
21
2
1
2021
4
5
29
69
7
22
141
11
10
28
23
15
1627
12
3
132
1924
1726
1825
8
CRITICAL
21
CRITICAL
3 2 1
4
8 7 6 5
CRITICAL
321
4
8765
CRITICAL
2
1
2
1
52
21 21
2
1
2
1
2
1
2
1
43
2
1
2
1
POSCAPS
21
CRITICAL
2
1
2
1
NO STUFF
2
1
POSCAPS
2
1
POSCAPS
2
1POSCAPS
2
1
POSCAPS
2
1
CRITICAL
2
1
CRITICAL
2
1
CRITICAL
2
1
CRITICAL
2
1
NO STUFF
2
1NO STUFF
2
1
2
1
2
1
2
1
NO STUFF
2
1
NO STUFF
2
1
2
1
92
4
7
1
3
6
8
5
10
CRITICAL
21
OMIT
21
OMIT
2
1
2
1
2
1
2
1
2
1
2
1
2
1
6 1
21
2
1
4
36
5
2
1
2
1
3
2
1
21
21
NO STUFF
3 2 1
4
8 7 6 5
CRITICAL
321
4
8765
CRITICAL
2
1
2
1
2
1
21
2
1
2
1
CR-35
LTC3411_ITH_RC
+1_5V_LDO
+1_5V_SLEEP_VIN
SLEEP_L_LS5
DCDC_EN_L MAX1715_ON_RC
1_5V_BOOST
SLEEP
1_8V_SLEEP_PWREN_L
1_5V_2_5V_OK
MAX1715_GND
MAX1715_VCC
1_5V_LX
1_5V_DL
1_5V_DH
2_5V_SLEEP_PWREN_L
SLEEP
2_5V_LX
LTC3411_SYNC
1_8V_SW
1_8V_VFB
LTC3411_ITH
MAX1715_REF
MAX1715_TON
2_5V_ILIM
MAX1715_GND
1_5V_ILIM
2_5V_DH
2_5V_DL
1_5V_FB
1_5V_BST 2_5V_BST
1_5V_FB
2_5V_BOOST
LTC3411_VCC
LTC3411_GND
LTC3411_SHDN
MAX1715_SKIP
3V_5V_OK
34
35
35
38
33
33
33
19
27
33
30
38
38
30
38
38
38
38
16
20
20
38
23
20
35
38
38
38
38
23
38
38
38
38
38
38
38
38
35
38
38
38
35
38 38
35
38
38
38
38
38
33
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 36 44A051-6278
SHOULD BE AT MOST 4 VIAS FOR CLK
SHOULD BE AT MOST 4 VIAS FOR CLK
SHOULD BE AT MOST 4 VIAS FOR CLK
MAP17
L3 CACHE
CLOCK LINE CONSTRAINTS
GROUP
INTREPID CLOCKS
SIG_NAME DELAY_RULE MATCHED_DELAY MAX VIAS MAX EXPOSED LENGTH STUB_LENGTH NET_SPACING_TYPE PULSE PARAM
SIGNAL CONSTRAINTS - PAGE 1
PULSE_PARAMNO_TESTNET_SPACING_TYPESTUB_LENGTHMAX_EXPOSED_LENGTHMAX_VIASDELAY_RULESIG_NAME
MAXBUS
GROUP
CACHEL3
DIGITAL SIGNALS
GROUP 0
GROUP 1
RAMDDR
GROUP 6
GROUP 4/5
GROUP 2/3
GROUP 7
ADDR
CONTROL
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
TOTAL LENGTH CONTROLLED BY SPREADSHEET
SOUND
FIREWIRE
ETHERNETMARVELL
CRYSTALS
THERE’S ANOTHER 280MIL LEG
CR-36
10 MIL SPACINGSND_SCLK 2005005
200500SND_CLKOUT 10 MIL SPACING5
::300:400NEC_XT2 10 MIL SPACING
::600:700NEC_XT1 10 MIL SPACING
:::400CLK25M_ENET_XOUT 10 MIL SPACING
:::650CLK25M_ENET_XIN 10 MIL SPACING
10 MIL SPACINGCLK18M_INT_EXT :::400
10 MIL SPACINGCLK18M_XTAL_IN :::300
::1300:1400 10 MIL SPACINGCLK18M_INT_XOUT
::300:400 10 MIL SPACINGCLK27M_GPU_XIN
10 MIL SPACINGCLK18M_INT_XIN ::1400:1500
CLK27M_XTAL_IN 10 MIL SPACING:::250
:::150 10 MIL SPACINGCLK27M_GPU_XOUT
10 MIL SPACING3 200GPU_DVO_CLKP ::600:1300 250
:::250 10 MIL SPACING3 200GPU_FBCLK1_L
98.034 MHZ10 MIL SPACINGFW_OSC 200:::300
98.034 MHZ10 MIL SPACINGFW_XI 200:::520
200 49.152 MHzCLKFW_LINK_LCLK :::300
10 MIL SPACING5003 49.152 MHzCLKFW_PHY_LCLK 200::7500:8000
200CLKFW_LINK_PCLK 49.152 MHz3 500 10 MIL SPACING::7500:8000
:::300CLKFW_PHY_PCLK 49.152 MHz200
10 MIL SPACING 125 MHz500 200CLKENET_PHY_GTX 3::8000:9000
CLKENET_LINK_GTX 125 MHz:::300 200
10 MIL SPACING 25 MHzCLKENET_LINK_TX 500 2004::8000:9000
25 MHzCLKENET_PHY_TX :::300 200
10 MIL SPACING 125 MHzCLKENET_LINK_GBE_REF 3 500 200::8000:9000
CLKENET_PHY_GBE_REF 125 MHz:::300 200
10 MIL SPACING200500 125 MHzCLKENET_LINK_RX 3::8000:9000
CLKENET_PHY_RX :::300 125 MHZ200
::1500:2500 5CPU_GBL_L 250
::1800:2600RAM_MUXSEL_L 5
::1800:2600RAM_MUXSEL_H 5
:::500MEM_MUXSEL_L<1..0> 3
:::500MEM_MUXSEL_H<1..0> 3
::2000:3100 200RAM_WE_L 6
:::500MEM_WE_L 4
::2000:4100 200RAM_CAS_L 6
MEM_CAS_L :::500 4
::2000:4100 200RAM_RAS_L 6
MEM_RAS_L :::500 4
200RAM_CKE<3..0> 6::1800:2500
MEM_CKE<3..0> :::500 4
200RAM_CS_L<3..0> 6::1800:2500
MEM_CS_L<3..0> :::500 4
::2000:3300 200RAM_BA<1..0> 6
MEM_BA<1..0> 4:::500
200RAM_ADDR<12..0> ::2000:3000 6
MEM_ADDR<12..0> 4 83 MHZ:::500
:::2200RAM_DQM_B<7> 4 167 MHZ200RAM_GROUP7_B:::500
:::1600RAM_DQM_A<7> 4 167 MHZ200RAM_GROUP7_A:::500
:::1600MEM_DQM<7> 4 167 MHZ200
:::2200RAM_DQS_B<7> 4 167 MHZ200RAM_GROUP7_B:::500
:::1600RAM_DQS_A<7> 4 167 MHZ200RAM_GROUP7_A:::500
:::1600MEM_DQS<7> 4 167 MHZ200
:::2200RAM_DATA_B<63..56> 4 167 MHZ200RAM_GROUP7_B:::500
:::1600RAM_DATA_A<63..56> 4 167 MHZ200RAM_GROUP7_A:::500
:::1600MEM_DATA<63..56> 4 167 MHZ200
:::2400RAM_DQM_B<6> 4 167 MHZ200RAM_GROUP6_B:::800
:::1800RAM_DQM_A<6> 4 167 MHZ200RAM_GROUP6_A:::800
:::1650MEM_DQM<6> 4 167 MHZ200
:::2400RAM_DQS_B<6> 4 167 MHZ200RAM_GROUP6_B:::800
:::1800RAM_DQS_A<6> 4 167 MHZ200RAM_GROUP6_A:::800
:::1650MEM_DQS<6> 4 167 MHZ200
:::2400RAM_DATA_B<55..48> 4 167 MHZ200RAM_GROUP6_B:::800
:::1650MEM_DATA<55..48> 4 167 MHZ200
:::1800RAM_DATA_A<55..48> 4 167 MHZ200RAM_GROUP6_A:::800
RAM_GROUP45_B:::950:::2350 200 167 MHZRAM_DQM_B<5..4> 4
RAM_GROUP45_A:::900:::1850 200 167 MHZRAM_DQM_A<5..4> 4
200 167 MHZMEM_DQM<5..4> 4:::1500
RAM_GROUP45_B:::950:::2350 200 167 MHZRAM_DQS_B<5..4> 4
RAM_GROUP45_A:::900:::1850 200 167 MHZRAM_DQS_A<5..4> 4
:::1500 200 167 MHZMEM_DQS<5..4> 4
RAM_GROUP45_B:::950:::2350 200 167 MHZRAM_DATA_B<47..32> 4
RAM_GROUP45_A:::900:::1850 200 167 MHZRAM_DATA_A<47..32> 4
:::2200 4RAM_DQM_B<3..2> 167 MHZ200RAM_GROUP23_B:::850
200 167 MHZMEM_DATA<47..32> 4:::1500
:::1700 4RAM_DQM_A<3..2> 167 MHZ200RAM_GROUP23_A:::850
:::1650 4MEM_DQM<3..2> 167 MHZ200
:::2200 4RAM_DQS_B<3..2> 167 MHZ200RAM_GROUP23_B:::850
:::1700 4RAM_DQS_A<3..2> 167 MHZ200RAM_GROUP23_A:::850
:::1650 4MEM_DQS<3..2> 167 MHZ200
:::2200 4RAM_DATA_B<31..16> 167 MHZ200RAM_GROUP23_B:::850
:::1700 4RAM_DATA_A<31..16> 167 MHZ200RAM_GROUP23_A:::850
:::1650 4MEM_DATA<31..16> 167 MHZ200
RAM_DQM_B<1> 200 167 MHZ4:::2100 RAM_GROUP1_B:::700
:::1550RAM_DQM_A<1> 200 167 MHZ4 RAM_GROUP1_A:::700
:::1500MEM_DQM<1> 200 167 MHZ4
RAM_DQS_B<1> 200 167 MHZ4:::2100 RAM_GROUP1_B:::700
:::1550RAM_DQS_A<1> 200 167 MHZ4 RAM_GROUP1_A:::700
:::1500MEM_DQS<1> 200 167 MHZ4
RAM_DATA_B<15..8> 200 167 MHZ4:::2100 RAM_GROUP1_B:::700
:::1550RAM_DATA_A<15..8> 200 167 MHZ4 RAM_GROUP1_A:::700
MEM_DATA<15..8> 200 167 MHZ4:::1500
:::2150RAM_DQM_B<0> 200 167 MHZ4 RAM_GROUP0_B:::600
:::1550RAM_DQM_A<0> 200 167 MHZ4 RAM_GROUP0_A:::450
:::1600MEM_DQM<0> 200 167 MHZ4
:::2150RAM_DQS_B<0> 200 167 MHZ4 RAM_GROUP0_B:::600
:::1550RAM_DQS_A<0> 200 167 MHZ4 RAM_GROUP0_A:::450
:::1600MEM_DQS<0> 200 167 MHZ4
:::2150RAM_DATA_B<7..0> 200 167 MHZ4 RAM_GROUP0_B:::600
:::1550RAM_DATA_A<7..0> 200 167 MHZ4 RAM_GROUP0_A:::450
:::1600MEM_DATA<7..0> 200 167 MHZ4
200::1200:1800L3_CNTL<1..0> 4
200::1200:1800L3_ADDR<17..0> 4
200::750:1250L3_DATA<63..32> 4
200::750:1250L3_DATA<31..0> 4
5CPU_WT_L 250::1500:3100
250CPU_TT<0..4> 5::1500:3400
5CPU_TSIZ<0..2> 250::1500:3500
10 MIL SPACING250::1500:2500CPU_TS_L 5
::1500:3000 5CPU_TEA_L 250
::1500:2600 5 10 MIL SPACINGCPU_TBST_L 250
10 MIL SPACINGCPU_TA_L ::1500:2500 2505
::1500:2600 250CPU_QREQ_L 10 MIL SPACING5
250::1500:2500CPU_QACK_L 10 MIL SPACING5
::1500:2800 250CPU_HIT_L 10 MIL SPACING5
5 10 MIL SPACINGCPU_DRDY_L ::1500:2500 250
250:::500CPU_DRDY_L_UF 10 MIL SPACING
::1500:2950 5CPU_DTI<0..2> 250
250::1500:2500CPU_DBG_L 10 MIL SPACING5
::1100:2500 5CPU_DATA<32..63> 83 MHZ250
::1100:2500 5CPU_DATA<0..31> 250 83 MHZ
250CPU_CI_L 5::1500:2700
5 10 MIL SPACINGCPU_BR_L 250::1500:2500
250::1500:2500CPU_BG_L 10 MIL SPACING5
10 MIL SPACING250::1500:2500CPU_ARTRY_L 5
5 83 MHZCPU_ADDR<0..31> 250::1500:3100
5CPU_AACK_L 250 10 MIL SPACING::1500:2500 :::150 10 MIL SPACINGSYSCLK_CPU_UF 167 MHZ
::2650:2750SYSCLK_CPU 200 167 MHZ3 250 10 MIL SPACING
INT_CPUFB_OUT :::150 10 MIL SPACING 167 MHZ3 250
2503INT_CPUFB_OUT_NORM 167 MHZ10 MIL SPACING::500:600
2503INT_CPUFB_OUT_SHORT 167 MHZ10 MIL SPACING::700:850
2503INT_CPUFB_IN_NORM 167 MHZ10 MIL SPACING::500:600
2503INT_CPUFB_LONG 167 MHZ10 MIL SPACING::1050:1150
INT_CPUFB_IN 167 MHZ3 200 10 MIL SPACING250::700:800
::475:575 3SYSCLK_DDRCLK_A0_UF 200 10 MIL SPACING250 167 MHZ
::475:575 3SYSCLK_DDRCLK_A0_L_UF 200 10 MIL SPACING250 167 MHZ
::300:400 3SYSCLK_DDRCLK_A1_UF 250 200 10 MIL SPACING 167 MHZ
3 250 10 MIL SPACING200SYSCLK_DDRCLK_B0_UF 167 MHZ::430:530
::300:400 3SYSCLK_DDRCLK_A1_L_UF 10 MIL SPACING200250 167 MHZ
SYSCLK_DDRCLK_B1_UF 3 10 MIL SPACING200250::400:510
SYSCLK_DDRCLK_B0_L_UF 3 250 10 MIL SPACING200
167 MHZ
167 MHZ::430:530
SYSCLK_DDRCLK_B1_L_UF 3 250 200 10 MIL SPACING 167 MHZ::400:510
::1850:1950 3 200 10 MIL SPACING250SYSCLK_DDRCLK_A0 167 MHZDDRCLK_A0 SYSCLK_DDRCLK_A0:::25
::1850:1950 3 200 10 MIL SPACING250SYSCLK_DDRCLK_A0_L 167 MHZSYSCLK_DDRCLK_A0:::25DDRCLK_A0
3 250 200 10 MIL SPACINGSYSCLK_DDRCLK_A1 167 MHZSYSCLK_DDRCLK_A1:::25DDRCLK_A1::1925:2025
3 10 MIL SPACING200250SYSCLK_DDRCLK_A1_L 167 MHZSYSCLK_DDRCLK_A1:::25DDRCLK_A1::1925:2025
3 250 10 MIL SPACING200SYSCLK_DDRCLK_B0 167 MHZSYSCLK_DDRCLK_B0:::25DDRCLK_B0::2375:2475
167 MHZSYSCLK_DDRCLK_B0_L 200 10 MIL SPACING2503SYSCLK_DDRCLK_B0:::25DDRCLK_B0::2375:2475
3 10 MIL SPACING200250SYSCLK_DDRCLK_B1 167 MHZSYSCLK_DDRCLK_B1:::25DDRCLK_B1::2450:2550
3 200 10 MIL SPACINGSYSCLK_DDRCLK_B1_L 167 MHZSYSCLK_DDRCLK_B1:::25DDRCLK_B1 250::2450:2550
10 MIL SPACING200INT_REF_CLK_OUT 250 49.92 MHZ::1250:1400 3
10 MIL SPACINGCLK66M_GPU_AGP_UF 66 MHz200:::150
167 MHZ200250 10 MIL SPACINGINT_REF_CLK_IN ::1900:2000 4
4004 200 66 MHzCLK66M_GPU_AGP 10 MIL SPACING::1400:1500
4 500 10 MIL SPACING200 66 MHzINT_AGP_FB_IN ::1400:1500
INT_AGP_FB_OUT 66 MHz200 10 MIL SPACING:::150
:::250 33 MHzCLK33M_CBUS_UF 200 10 MIL SPACING
::5000:6000 33 MHz10 MIL SPACING200CLK33M_CBUS 5006
33 MHz200CLK33M_AIRPORT_UF 10 MIL SPACING:::250
CLK33M_USB2_UF :::250 10 MIL SPACING200 33 MHz
::11000:12000 33 MHz10 MIL SPACING200500CLK33M_AIRPORT 6
::4000:6000CLK33M_USB2 500 200 10 MIL SPACING 33 MHz6
:::300 10 MIL SPACINGINT_PCI_FB_OUT 33 MHz200
::6500:7500INT_PCI_FB_IN 33 MHz10 MIL SPACING2005003
10 MIL SPACING 250 MHZ3::900:1100L3_CLK<0> 200250
10 MIL SPACING 250 MHZ3::900:1100L3_ECHO_CLK<0..1> 200250
10 MIL SPACING 250 MHZ3::900:1100L3_ECHO_CLK<2..3> 200250
10 MIL SPACING 250 MHZ3::900:1100L3_CLK<1> 200250
3:::400GPU_CLK27M_OUT 200 10 MIL SPACING
2003:::250GPU_CLK27M_UF 10 MIL SPACING
GPU_SSCLK_UF :::200 200 10 MIL SPACING
GPU_FBCLK0 3 200 10 MIL SPACING:::250
:::920 200GPU_SSCLK_IN 3 10 MIL SPACING500
3GPU_FBCLK1 200 10 MIL SPACING:::250
3GPU_FBCLK0_L 200 10 MIL SPACING:::250
39
39
39
25
25
28
28
27
27
27
27
9
11
11
12
12
12
12
12
12
12
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
11
12
12
12
11
12
12
11
12
12
12
11
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
12
12
11
8
8
8
8
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
12
12
12
12
12
12
12
12
19
18
24
26
8
8
8
8
15
15
26
26
27
27
15
15
15
21
15
21
21
21
19
28
28
14
14
14
28
14
14
14
27
14
27
14
27
5
11
11
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
11
11
10
11
11
10
11
11
10
11
11
10
11
11
10
11
10
11
11
11
10
11
11
10
11
11
11
10
11
10
11
11
10
11
11
10
11
11
10
11
11
10
11
11
10
11
11
10
11
11
10
11
11
10
6
6
6
6
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
5
5
5
5
5
5 9
5
9
9
9
9
9
9
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
15
13
15
13
13
13
13
13
13
13
13
13
13
13
6
6
6
6
21
21
21
19
21
19
19
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 37 44A051-6278
DVO
AGP BYTES 2-3
AGP SIDEBAND
AGP CONTROL
AGP
GROUP
AGP BYTES 0-1
SIG_NAME DELAY_RULE MAX_EXPOSED_LENGTHMAX_VIAS STUB_LENGTH PULSE_PARAMNO_TESTNET_SPACING_TYPE
Digital Signals (cont’d)
PCI
ULTRA ATA-100
OPTICAL
INTREPID
EIDE
ETHERNET MII
ZDIFF = 89.3OHM (USB 1.1)/ 89.4OHM (USB 2.0)ZSINGLE = 51.5OHM (USB 1.1)/ 46.2OHM (USB 2.0)
S = 10MIL (USB 2.0) (SEPERATION OF DIFF TRACES)
W = 4MIL(USB 1.1)/ 5MIL(USB 2.0) (TRACE WIDTH)
S = 5MIL (USB 1.1) (SEPERATION OF DIFF TRACES)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
ER = 4.3 (DIELECTRIC CONSTANT)
INTERNAL LAYER (USB1.1/USB 2.0)
POWER
THERMOSTAT
SUPPLIES
USB
UPPER
LVDSLOWER
FIREWIRE
GROUP
ETHERNET
SIG_NAME DIFFERENTIAL_PAIR MATCHED_DELAY MAX_EXPOSED_LENGTH NET_SPACING_TYPE MAX_VIAS
NEED TO MATCH DELAY TO 250
TOTAL UIDE+HD SKEW <500MIL
FIREWIRE MII
SIGNAL CONSTRAINTS - PAGE 2
Differential Signals
SPACING DELETED BECAUSE
OF PHYSICAL CONSTRAINTS
AROUND MARVELL PHY
ER = 4.3 (DIELECTRIC CONSTANT)
S = 10MIL (SEPERATION OF DIFF TRACES)
T = 0.7MIL (TRACE THICKNESS)
B = 12.2MIL (DIST BETW 2 GND PLANES)
W = 3.4MIL (TRACE WIDTH)
ZSINGLE = 53.37OHM
ZDIFF = 107.17OHM
W = 4MIL (TRACE WIDTH)
INTERNAL LAYERER = 4.3 (DIELECTRIC CONSTANT)
B = 12.2MIL (DIST BETW 2 GND PLANES)
T = 0.7MIL (TRACE THICKNESS)
S = 10MIL (SEPERATION OF DIFF TRACES)
ZSINGLE = 51.57OHM
ZDIFF = 99.8OHM
FOR FIREWIRE
TMDS
CR-37
66 MHzAGP_GNT_L 6 250::1200:1900
TMDS_CONN:::50 10 MIL SPACINGCLKCONN_TMDSTMDS_CONN_CLKN 4500
TMDS_CONN:::50 10 MIL SPACINGCLKCONN_TMDSTMDS_CONN_CLKP 4500
TMDS:::50 10 MIL SPACINGCLKTMDSTMDS_CLKP 4500
TMDS:::50 10 MIL SPACINGCLKTMDSTMDS_CLKN 4500
TMDS:::50 10 MIL SPACINGTMDS_D0TMDS_DP<0>
TMDS:::50 10 MIL SPACINGTMDS_D0TMDS_DN<0>
TMDS:::50 10 MIL SPACINGTMDS_D1TMDS_DN<1>
TMDS:::50 10 MIL SPACINGTMDS_D2TMDS_DN<2>
TMDS:::50 10 MIL SPACINGTMDS_D1TMDS_DP<1>
TMDS:::50 10 MIL SPACINGTMDS_D2TMDS_DP<2>
FW_TPA0 FW_TPA0:::4%FW_TPA0N 10 MIL SPACINGMIN_LINE_WIDTH=3.4
ENET_LINK_RXD<7..0> 5::8000:9000
ENET_RX_DV ::8000:9000
ENET_RX_ER ::8000:9000
ENET_PHY_TXD<7..0> 5::8300:9300
:::600ENET_LINK_TXD<7..0>
ENET_PHY_TX_ER 5::8000:9200
ENET_PHY_TX_EN 5::8000:9200
:::400ENET_LINK_TX_ER
:::400ENET_LINK_TX_EN
ENET_MDIO ::8000:9000
ENET_MDC ::8000:9000
ENET_COL ::7500:9000
ENET_CRS ::7500:9000
5::2700:3500FW_LINK_DATA<7..0>
5FW_PHY_DATA<7..0> ::4700:5500
FW_LINK_CNTL<1..0> ::9000:10000
:::300FW_PHY_CNTL<1..0>
FW_LINK_LREQ :::300
FW_PHY_LREQ ::8500:9500
FW_PINT ::8500:9500
ENET_MDI0 ENET_MDI0:U49.29:T1.12:100MDI_P<0>
ENET_MDI0 ENET_MDI0:U49.31:T1.11:100MDI_M<0>
ENET_MDI1 ENET_MDI1:U49.34:T1.8:100MDI_M<1>
ENET_MDI1 ENET_MDI1:U49.33:T1.9:100MDI_P<1>
ENET_MDI2 ENET_MDI2:U49.41:T1.5:100MDI_M<2>
ENET_MDI2 ENET_MDI2:U49.39:T1.6:100MDI_P<2>
ENET_MDI3 ENET_MDI3:U49.43:T1.2:100MDI_M<3>
ENET_MDI3 ENET_MDI3:U49.42:T1.3:100MDI_P<3>
10 MIL SPACINGRJ45_DP0 RJ45_DP0:T1.14:J18.2:100RJ45_DN<0>
10 MIL SPACINGRJ45_DP0 RJ45_DP0:T1.13:J18.1:100RJ45_DP<0>
10 MIL SPACINGRJ45_DP1 RJ45_DP1:T1.17:J18.6:100RJ45_DN<1>
10 MIL SPACINGRJ45_DP1 RJ45_DP1:T1.16:J18.3:100RJ45_DP<1>
10 MIL SPACINGRJ45_DP2 RJ45_DP2:T1.20:J18.5:100RJ45_DN<2>
10 MIL SPACINGRJ45_DP2 RJ45_DP2:T1.19:J18.4:100RJ45_DP<2>
10 MIL SPACINGRJ45_DP3 RJ45_DP3:T1.23:J18.8:100RJ45_DN<3>
10 MIL SPACINGRJ45_DP3 RJ45_DP3:T1.22:J18.7:100RJ45_DP<3>
10 MIL SPACINGFW_TPA0 FW_TPA0:::4%FW_TPA0PMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPB0 FW_TPB0:::4%FW_TPB0NMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPB0 FW_TPB0:::4%FW_TPB0PMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPI0 FW_TPI0:::4%FW_TPI0NMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPI0 FW_TPI0:::4%FW_TPI0PMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPO0 FW_TPO0:::4%FW_TPO0NMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPO0 FW_TPO0:::4%FW_TPO0PMIN_LINE_WIDTH=3.4
500 10 MIL SPACINGFW_TPA1 FW_TPA1:::4%FW_TPA1PMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPB1 FW_TPB1:::4%FW_TPB1P 500MIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPI1 FW_TPI1:::4%FW_TPI1PMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPO1 FW_TPO1:::4%FW_TPO1NMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPO1 FW_TPO1:::4%FW_TPO1PMIN_LINE_WIDTH=3.4
10 MIL SPACINGCLKLVDS_L LVDS:::110CLKLVDS_LN 4500
10 MIL SPACINGCLKLVDS_L LVDS:::110CLKLVDS_LP 4500
10 MIL SPACINGLVDS_L0 LVDS:::110LVDS_L0N
10 MIL SPACINGLVDS_L0 LVDS:::110LVDS_L0P
10 MIL SPACINGLVDS_L1 LVDS:::110LVDS_L1N
10 MIL SPACINGLVDS_L1 LVDS:::110LVDS_L1P
10 MIL SPACINGLVDS_L2 LVDS:::110LVDS_L2N
10 MIL SPACINGCLKLVDS_U LVDS:::110CLKLVDS_UN 4500
10 MIL SPACINGLVDS_L2 LVDS:::110LVDS_L2P
10 MIL SPACINGLVDS_U0 LVDS:::110LVDS_U0N
10 MIL SPACINGLVDS_U0 LVDS:::110LVDS_U0P
10 MIL SPACINGLVDS_U1 LVDS:::110LVDS_U1N
10 MIL SPACINGLVDS_U1 LVDS:::110LVDS_U1P
10 MIL SPACINGLVDS_U2 LVDS:::110LVDS_U2N
10 MIL SPACINGLVDS_U2 LVDS:::110LVDS_U2P
10 MIL SPACINGNEC_USB_DA NEC_USB_DA:::20NEC_USB_DAM MIN_LINE_WIDTH=5
10 MIL SPACINGNEC_USB_DA NEC_USB_DA:::20NEC_USB_DAP MIN_LINE_WIDTH=5
5 MIL SPACINGUSB_DE USB_DE:::200USB_DEM
5 MIL SPACINGUSB_DE USB_DE:::200USB_DEP
1772_CSSN 1772_CSS:::1001772_CSS
1772_CSSP 1772_CSS:::1001772_CSS
1772_CSIN 1772_CSI:::1001772_CSI
1772_CSIP 1772_CSI:::1001772_CSI
3V_SNSM 3V_SNS:::1003V_SNS
3V_SNSP 3V_SNS:::1003V_SNS
5V_SNSM 5V_SNS:::1005V_SNS
5V_SNSP 5V_SNS:::1005V_SNS
THERM1_DM THERM1:::100THERM1
THERM1_DP THERM1:::100THERM1
THERM2_DM THERM2:::100THERM2
THERM2_DP THERM2:::100THERM2
THERM1_M_DM THERM1_MAIN:::100THERM1_MAIN
THERM1_M_DP THERM1_MAIN:::100THERM1_MAIN
THERM2_M_DM THERM2_MAIN:::100THERM2_MAIN
THERM2_M_DP THERM2_MAIN:::100THERM2_MAIN
THERM1_A_DM THERM1_ALT:::100THERM1_ALT
THERM1_A_DP THERM1_ALT:::100THERM1_ALT
THERM2_A_DM THERM2_ALT:::100THERM2_ALT
THERM2_A_DP THERM2_ALT:::100THERM2_ALT
10 MIL SPACINGNEC_USB_DB NEC_USB_DB:::20NEC_USB_DBM MIN_LINE_WIDTH=5
10 MIL SPACINGNEC_USB_DB NEC_USB_DB:::20NEC_USB_DBP MIN_LINE_WIDTH=5
5 MIL SPACINGUSB_DF USB_DF:::200USB_DFM
5 MIL SPACINGUSB_DF USB_DF:::200USB_DFP
10 MIL SPACINGNEC_USB_RSD1:::20NEC_USB_RSD1NEC_USB_RSDP1 MIN_LINE_WIDTH=5
10 MIL SPACINGNEC_USB_RSD1:::20NEC_USB_RSD1NEC_USB_RSDM1 MIN_LINE_WIDTH=5
5 MIL SPACINGBT_USB_D:::200BT_USB_DBT_USB_DP
5 MIL SPACINGBT_USB_D:::200BT_USB_DBT_USB_DM
10 MIL SPACINGNEC_USB_RSD2:::20NEC_USB_RSD2NEC_USB_RSDP2 MIN_LINE_WIDTH=5
5 MIL SPACINGMODEM_USB_D MODEM_USB:::200MODEM_USB_DM
5 MIL SPACINGMODEM_USB_D MODEM_USB:::200MODEM_USB_DP
10 MIL SPACINGLEFT_USB LEFT_USB:::20LEFT_USB_DM MIN_LINE_WIDTH=5
10 MIL SPACINGLEFT_USB LEFT_USB:::20LEFT_USB_DP MIN_LINE_WIDTH=5
10 MIL SPACINGRIGHT_USB RIGHT_USB:::20RIGHT_USB_DM MIN_LINE_WIDTH=5
10 MIL SPACINGRIGHT_USB RIGHT_USB:::20RIGHT_USB_DP MIN_LINE_WIDTH=5
10 MIL SPACINGNEC_USB_RSD2:::20NEC_USB_RSD2NEC_USB_RSDM2 MIN_LINE_WIDTH=5
10 MIL SPACINGCLKLVDS_U LVDS:::110CLKLVDS_UP 4500
500 10 MIL SPACINGFW_TPA1 FW_TPA1:::4%FW_TPA1NMIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPB1 FW_TPB1:::4%FW_TPB1N 500MIN_LINE_WIDTH=3.4
10 MIL SPACINGFW_TPI1 FW_TPI1:::4%FW_TPI1NMIN_LINE_WIDTH=3.4
EIDE_DATA<15..0> 33 MHZ:::855
:::900EIDE_ADDR<2..0> 33 MHZ
:::850EIDE_CS1_L 33 MHZ
:::850EIDE_CS0_L 33 MHZ
:::500EIDE_RD_L 33 MHZ
:::500EIDE_IOCHRDY 33 MHZ
:::500EIDE_WR_L 33 MHZ
:::500EIDE_RST_L 33 MHZ
EIDE_INT :::500 33 MHZ
EIDE_DMACK_L :::500 33 MHZ
EIDE_DMARQ :::500 33 MHZ
EIDE_OPTICAL_DATA<15..0>::4500:6500 33 MHZ
EIDE_OPTICAL_ADDR<2..0>::4500:6500 33 MHZ
EIDE_OPTICAL_CS1_L ::5000:7000 33 MHZ
EIDE_OPTICAL_CS0_L ::5000:7000 33 MHZ
EIDE_OPTICAL_WR_L ::5000:7000 33 MHZ
EIDE_OPTICAL_RD_L ::5000:7000 33 MHZ
EIDE_OPTICAL_IOCHRDY ::5000:7000 33 MHZ
EIDE_OPTICAL_RST_L ::5000:7000 33 MHZ
EIDE_OPTICAL_INT ::5500:7500 33 MHZ
EIDE_OPTICAL_DMA_RQ ::5000:7000 33 MHZ
EIDE_OPTICAL_DMAACK_L ::5000:7000 33 MHZ
:::710 200UIDE_DATA<15..8> 100 MHZ
U44.V1:RP9.4::600 200UIDE_DATA<7> 100 MHZ
:::600 200UIDE_DATA<6..0> 100 MHZ
:::650 200UIDE_ADDR<2..0> 100 MHZ
:::400 200 100 MHZUIDE_DIOW_L
:::400 200UIDE_RST_L 100 MHZ
:::400 200UIDE_DMACK_L 100 MHZ
200 100 MHZ:::600 10 MIL SPACINGUIDE_DIOR_L
:::500 200 100 MHZUIDE_CS0_L
:::500 200 100 MHZUIDE_CS1_L
200UIDE_DMARQ 100 MHZ:::400
200 100 MHZ:::600 10 MIL SPACINGUIDE_IOCHRDY
200UIDE_INTRQ 100 MHZ:::400
MATCHED_DELAY=HD_DATA:::1000::8000:9500 200HD_DATA<15..0> 100 MHZ5
::5000:7000 200 100 MHZ5HD_RESET_L
::8000:9500 200 100 MHZHD_ADDR<2..0> 5
200 100 MHZ::6000:8000 5HD_DIOW_L
MATCHED_DELAY=HD_DATA:::1000::8000:9500 200 100 MHZ10 MIL SPACING5HD_DIOR_L
::7500:9000 200HD_DMACK_L 100 MHZ5
::6000:9000 200 100 MHZ5HD_CS1_L
::6000:9000 200 100 MHZ5HD_CS0_L
::7500:9000 200HD_DMARQ 100 MHZ5
HD_INTRQ 100 MHZ::6000:8000 5
MATCHED_DELAY=HD_DATA:::1000::8000:9500 200 100 MHZHD_IOCHRDY 10 MIL SPACING5
33 MHzPCI_AD<31..0> MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_CBE<3..0> MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_IRDY_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_FRAME_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_TRDY_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_DEVSEL_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_STOP_L MIN_DAISY_CHAIN::8000:13500
33 MHzPCI_PAR MIN_DAISY_CHAIN::8000:13500
::1350:1650 5AGP_AD<15..0> 66 MHz100
::1350:1650 5AGP_CBE<1..0> 66 MHz100
::1500:1600 250 8 MIL SPACINGAGP_AD_STB<0> 133 MHZ4 100
::1350:1650 5 66 MHzAGP_AD<31..16> 100
::1500:1600 250 8 MIL SPACINGAGP_AD_STB_L<0> 133 MHZ4 100
::1500:1600 250 8 MIL SPACING 133 MHZAGP_AD_STB<1> 4 100
5 66 MHzAGP_CBE<3..2> 100::1350:1680
::1500:1600 250 8 MIL SPACING 133 MHZAGP_AD_STB_L<1> 4 100
5 66 MHzAGP_SBA<7..0> 100::1100:1700
::1500:1700 350 8 MIL SPACING 66 MHzAGP_SB_STB 4 100
4::1500:1700 350 8 MIL SPACING 66 MHzAGP_SB_STB_L 100
66 MHzAGP_IRDY_L 6 250::1200:1900
6 66 MHzAGP_FRAME_L 250::1200:1900
66 MHzAGP_DEVSEL_L 6 250::1200:1900
66 MHzAGP_TRDY_L 6 250::1200:1900
66 MHzAGP_STOP_L 6 250::1200:1900
66 MHzAGP_PAR 6 250::1200:1900
::1200:1900 2506AGP_REQ_L 66 MHz
250::1200:1900 6AGP_RBF_L 66 MHz
2505::600:1300GPU_DVO_VSYNC
2505::600:1300GPU_DVO_HSYNC
2505::600:1300GPU_DVOD<0..11>
39 26
39
39
39
39
39
39
39
39
39
39
39
39
39
24
26
26
26
26
26
26
26
22
22
22
22
22
22
22
22
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
39
18
24
24
24
24
24
24
24
19
39
39
21
21
21
21
21
21
21
21
29
27
27
27
27
27
27
27
27
27
27
28
28
28
28
39
39
39
39
39
39
39
39
29
29
29
29
29
39
39
39
22
22
22
22
22
22
22
22
22
22
22
22
22
22
22
24
24
25
25
26
26
32
32
22
29
29
39
24
24
24
24
24
24
24
24
24
24
24
39
39
39
39
39
39
39
39
39
39
39
24
24
24
24
24
24
24
24
24
24
24
24
24
13
18
18
18
18
18
18
18
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
19
13
22
22
20
20
20
20
20
20
20
20
28
14
14
14
14
14
14
14
14
14
14
14
14
14
14
28
14
28
14
14
14
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
27
28
28
28
28
28
29
29
29
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
26
26
15
15
31
31
31
31
33
33
33
33
25
25
25
25
25
25
25
25
25
25
25
25
26
26
15
15
26
26
15
15
26
15
15
24
24
26
26
26
20
28
28
29
14
14
14
14
14
14
14
14
14
14
14
24
24
24
24
24
24
24
24
24
24
24
14
14
14
14
14
14
14
14
14
14
14
14
14
24
24
24
24
24
24
24
24
14
14
24
10
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
13
21
21
21
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 38 44A051-6278
CONTROL
MAX1717
LTC3411
LTC1962INT PLLS
1.5V SWITCHER
SSCGINTREPID
USB 2.0
MIN_NECK_WIDTH REDUCED FOR TESTPOINTS
CARDBUS
NV17MAPNVIDIA
MAIN/SLEEP
PMU
ADAPTER
BATTERYCHARGER
LVDS
I/O AREA
TRACKPAD
INVERTER
MAX1715
LTC37075V SWITCHER
3V SWITCHER
DDR RAM
L3 CACHE
CPU
GROUP
MIN_NECK_WIDTHMIN_LINE_WIDTH
POWER NET CONSTRAINTSVOLTAGEGROUP SIG_NAME
MIN_NECK_WIDTHMIN_LINE_WIDTHVOLTAGESIG_NAME
14V SWITCHER
GROUP
LTC1625
MIN_NECK_WIDTHMIN_LINE_WIDTHVOLTAGESIG_NAME
2.5V SWITCHER
LTC1778
SIGNAL CONSTRAINTS - PAGE 3
PLLS
INTREPID
REFERENCE
I/O AREA
I/O AREA
SILICONIMAGE
88E1111
FW
MISCHD
TRACKPAD
HALL EFFECT
VIDEO
FAN GND
KB LED
SOUND
CHGND1
CHGND3
CHGND4
CHGND5
CHGND6
CHGND2
CR-38
SND_AGND VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=15
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=5V+5V_SOUND_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25FAN2_GND 23VOLTAGE=0V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25FAN1_GND 23VOLTAGE=0V
23KBD_LED2_OUT MIN_LINE_WIDTH=10VOLTAGE=0V
23KBD_LED1_OUT MIN_LINE_WIDTH=10VOLTAGE=0V
TV_GND1 MIN_LINE_WIDTH=25VOLTAGE=0V
TV_GND2 MIN_LINE_WIDTH=25VOLTAGE=0V
MIN_LINE_WIDTH=25VOLTAGE=0VGPU_TV_GND2
MIN_LINE_WIDTH=25VOLTAGE=0VGPU_TV_GND1
MIN_NECK_WIDTH=10+3V_LCD_SW MIN_LINE_WIDTH=25VOLTAGE=3.3V
+3V_LCD MIN_LINE_WIDTH=12 MIN_NECK_WIDTH=10VOLTAGE=3.3V
+5V_DDC_SLEEP_UF MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VOLTAGE=5V
+5V_DDC_SLEEP MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VOLTAGE=5V
+5V_INV_SW MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=5V
+5V_INV_UF_SW MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10VOLTAGE=5V
+12_8V_INV VOLTAGE=12.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+3V_HALL_EFFECT MIN_LINE_WIDTH=10VOLTAGE=3.3V
VOLTAGE=5V MIN_LINE_WIDTH=10+5V_TPAD_SLEEP
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25+HD_LOGIC_SLEEP VOLTAGE=3.3V
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+5V_HD_SLEEP
MIN_LINE_WIDTH=25VOLTAGE=2.5V+2_5V_MARVELL MIN_NECK_WIDTH=10
MIN_LINE_WIDTH=25VOLTAGE=1.0VLTC3405_SW MIN_NECK_WIDTH=8
+1_0V_MARVELL VOLTAGE=1.0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=8
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=2.5V+2_5V_MARVELL_AVDD
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_SI_AVCC
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_SI_VCC
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_SI_PLLVCC
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12 CHGND6
ENET_CTAP_CHGND MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V
CHGND5VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100VOLTAGE=0V MIN_NECK_WIDTH=12FW_VGND1
MIN_LINE_WIDTH=100VOLTAGE=0V MIN_NECK_WIDTH=12FW_VGND0
FW_TPO0R MIN_NECK_WIDTH=10VOLTAGE=0V MIN_LINE_WIDTH=25
VOLTAGE=3.3V MIN_LINE_WIDTH=10+3V_PMU_AVCC
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND1
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10LTC1962_1V5_VOUT
MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10LTC1962_1V5_VIN
LTC1962_L3_VOUT MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
LTC1962_L3_VIN MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
LTC1962_INT_VIN MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10
VOLTAGE=1.8V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=301_8V_SW
VOLTAGE=0V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30LTC3411_GND
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20LTC3411_VCC
MIN_LINE_WIDTH=8VOLTAGE=0VUIDE_REF
MIN_LINE_WIDTH=10VOLTAGE=0VINT_MEM_REF_H
MIN_LINE_WIDTH=10VOLTAGE=1.25VDDR_VREF
VOLTAGE=1.25V MIN_LINE_WIDTH=10INT_MEM_VREF
VOLTAGE=1.25V MIN_LINE_WIDTH=10INT_AGP_VREF
MIN_NECK_WIDTH=6VOLTAGE=1.5V MIN_LINE_WIDTH=15+1_5V_INTREPID_PLL7
+1_5V_INTREPID_PLL8 MIN_LINE_WIDTH=15VOLTAGE=1.5V MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=6+1_5V_INTREPID_PLL6 MIN_LINE_WIDTH=15VOLTAGE=1.5V
MIN_NECK_WIDTH=5+1_5V_INTREPID_PLL5 VOLTAGE=1.5V MIN_LINE_WIDTH=15
+1_5V_INTREPID_PLL4 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=5
+1_5V_INTREPID_PLL3 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=6
+1_5V_INTREPID_PLL2 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=6
+1_5V_INTREPID_PLL1 VOLTAGE=1.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.8VMAXBUS_SLEEP
VOLTAGE=12.8V1625_VSW MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=24V1625_VIN MIN_LINE_WIDTH=10
VOLTAGE=1.2V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=50GPU_VCORE_SW
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_BG
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=151778_BST_RC
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_TG
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=151778_BST
VOLTAGE=0V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=301778_GND
VOLTAGE=5V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_VCC
VOLTAGE=14V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201778_VIN
VOLTAGE=1.5V1_5V_FB MIN_LINE_WIDTH=8
2_5V_LX VOLTAGE=2.5V MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=6 GND
MIN_NECK_WIDTH=10CPU_VCORE_SLEEP VOLTAGE=1.4V MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VOLTAGE=1.5VL3_OVDD
L3_CLK_REF VOLTAGE=0.75V MIN_LINE_WIDTH=10
L3_VREF VOLTAGE=0.75V MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=25VOLTAGE=1.4VCPU_AVDD MIN_NECK_WIDTH=10
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=105V_SW
VOLTAGE=5V MIN_LINE_WIDTH=255V_RSNS MIN_NECK_WIDTH=10
VOLTAGE=3.3V MIN_LINE_WIDTH=253V_SW MIN_NECK_WIDTH=10
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=103V_RSNS
VOLTAGE=5V MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=103707_INTVCC
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=12 CHGND2
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND4
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=25VOLTAGE=0V CHGND3
MIN_NECK_WIDTH=10+ADAPTER_SENSE MIN_LINE_WIDTH=50VOLTAGE=24V
MIN_NECK_WIDTH=10+ADAPTER_SW MIN_LINE_WIDTH=50VOLTAGE=24V
MIN_NECK_WIDTH=10+ADAPTER MIN_LINE_WIDTH=50VOLTAGE=24V
VOLTAGE=16.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+BATT_POS
1772_DCIN VOLTAGE=24V MIN_LINE_WIDTH=10
VOLTAGE=0V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10BATT_NEG
1772_LX VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT_24V_FUSE VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT_14V_FUSE VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT_RSNS VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+BATT_VSNS VOLTAGE=12.6V MIN_LINE_WIDTH=10 MIN_NECK_WIDTH=10
1772_LDO VOLTAGE=5.4V MIN_LINE_WIDTH=10
1772_GND VOLTAGE=0V MIN_LINE_WIDTH=10
1772_DLOV VOLTAGE=5.4V MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10+4_85V_RAW VOLTAGE=4.85V
MIN_LINE_WIDTH=10+ADAPTER_OR_BATT VOLTAGE=24V
MIN_LINE_WIDTH=10+ADAPTER_ILIM VOLTAGE=24V
MIN_LINE_WIDTH=10+4_6V_BU VOLTAGE=4.6V
VOLTAGE=3.3V+3V_PMU_ESR MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=10+4_85V_ESR VOLTAGE=4.85V
VOLTAGE=24V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+24V_PBUS
VOLTAGE=12.6V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+BATT
VOLTAGE=12.8V+PBUS MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+5V_MAIN
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+5V_SLEEP
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+3V_MAIN
VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_SLEEP MIN_NECK_WIDTH=6
VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+3V_PMU
VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+2_5V_MAIN
VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+2_5V_SLEEP
VOLTAGE=1.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+1_8V_SLEEP
VOLTAGE=1.8V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=6+1_8V_MAIN
+1_5V_SLEEP MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V
VOLTAGE=1.5V+1_5V_MAIN MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_5V_LDO VOLTAGE=1.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
+1_5V_SLEEP_VIN MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.5V
+VCC_CBUS_SW MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V
MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_GPU MIN_NECK_WIDTH=10
+2_5V_GPU_FB VOLTAGE=2.5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
GPU_VCORE MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=1.2V
VOLTAGE=5V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10+VPP_CBUS_SW
MIN_NECK_WIDTH=8MIN_LINE_WIDTH=15VOLTAGE=3.3V+3V_GPU_DVO
MIN_NECK_WIDTH=10+3V_GPU_AVDD1 MIN_LINE_WIDTH=15VOLTAGE=3.3V
+3V_DAC2VDD MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=3.3V
MIN_NECK_WIDTH=10+3V_DAC1VDD MIN_LINE_WIDTH=15VOLTAGE=3.3V
MIN_LINE_WIDTH=25VOLTAGE=1.5V+1_5V_AGP MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10+3V_GPU_AVDD0 MIN_LINE_WIDTH=15VOLTAGE=3.3V
VOLTAGE=3.3V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10+3V_GPU_PLLVDD
MIN_NECK_WIDTH=10+3V_GPU_SS MIN_LINE_WIDTH=10VOLTAGE=3.3V
+FW_PWR_PORTA MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12
MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12+FW_VP0
MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12+FW_VP1
+3V_FW_AVDD_PORT1 MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=6
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_FW
+3V_FW_UF MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_FW_AVDD_PORT2
+3V_FW_AVDD_PORT0 MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10
+3V_FW_AVDD MIN_LINE_WIDTH=25VOLTAGE=3.3V MIN_NECK_WIDTH=10
VOLTAGE=1.95V+1_95V_FW_DVDD_RX0 MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V+1_95V_FW_DVDD_TX0 MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V+1_95V_FW_DVDD MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V+1_95V_FW_DVDD_PORT1 MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V+1_95V_FW_PLLVDD MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25
VOLTAGE=1.95V+1_95V_FW_PLL400VDD MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
VOLTAGE=1.95V+1_95V_FW_PLL500VDD MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10VOLTAGE=3.3V MIN_LINE_WIDTH=25+3V_NEC_VDD
VOLTAGE=3.3V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25NEC_AVDD
VOLTAGE=2.5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=8+2_5V_CG_MAIN
VOLTAGE=3.3V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=8+3V_CG_PLL_MAIN
GPU_FB_VREF MIN_LINE_WIDTH=10VOLTAGE=1.25V
VOLTAGE=0.75V MIN_LINE_WIDTH=10GPU_AGP_VREF
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=10VOLTAGE=2.8V+2_8V_IFP_PLLVDD
MIN_LINE_WIDTH=100VOLTAGE=33V MIN_NECK_WIDTH=12+FW_PWR_OR
MIN_NECK_WIDTH=10VOLTAGE=1.5V MIN_LINE_WIDTH=15+1_5V_INTREPID_PLL
MIN_LINE_WIDTH=25VOLTAGE=2.5V+2_5V_INTREPID MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_INTREPID_USB
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V+3V_FW_ESD_ILIM
LM2594_IN MIN_NECK_WIDTH=10MIN_LINE_WIDTH=25VOLTAGE=3.3V
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=100VOLTAGE=12.8V+FW_FUSE
+3V_FW_ESD VOLTAGE=3.3V MIN_LINE_WIDTH=25 MIN_NECK_WIDTH=10
MIN_NECK_WIDTH=12MIN_LINE_WIDTH=100VOLTAGE=12.8V+FW_SW
VOLTAGE=1.5V1_5V_LX MIN_LINE_WIDTH=50 MIN_NECK_WIDTH=10
VOLTAGE=5V1625_EXTVCC MIN_LINE_WIDTH=10
VOLTAGE=5V1625_INTVCC MIN_LINE_WIDTH=10
MIN_LINE_WIDTH=101625_SGND VOLTAGE=0V
1V20_REF VOLTAGE=1.2V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10
3707_SGND MIN_LINE_WIDTH=10VOLTAGE=0V
1_8V_VFB MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=8LTC3411_ITH_RC
LTC3411_ITH MIN_LINE_WIDTH=8
LTC3411_SYNC MIN_LINE_WIDTH=8
LTC3411_SHDN MIN_LINE_WIDTH=8
1778_ION MIN_LINE_WIDTH=8
1778_ITH MIN_LINE_WIDTH=8
1778_ITH_RC MIN_LINE_WIDTH=8
1_5V_2_5V_OK MIN_LINE_WIDTH=8
1778_VFB MIN_LINE_WIDTH=8
1778_FCB MIN_LINE_WIDTH=8
1778_VRNG MIN_LINE_WIDTH=8
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VCORE_VCC VOLTAGE=5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=200VCORE_LX VOLTAGE=1.4V
VCORE_DH MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VCORE_DL
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VCORE_BOOST VOLTAGE=5V
VOLTAGE=5V MIN_LINE_WIDTH=15 MIN_NECK_WIDTH=10VCORE_BST
VCORE_REF MIN_LINE_WIDTH=8
VCORE_ILIM MIN_LINE_WIDTH=8
VOLTAGE=5VVCORE_TON MIN_LINE_WIDTH=8
VCORE_CC MIN_LINE_WIDTH=8
VOLTAGE=1.4VVCORE_FB MIN_LINE_WIDTH=8
VCORE_TIME MIN_LINE_WIDTH=8
VCORE_VGATE MIN_LINE_WIDTH=8
VOLTAGE=0VVCORE_GND MIN_LINE_WIDTH=30
VOLTAGE=0VVCORE_GNDSNS MIN_LINE_WIDTH=8
VOLTAGE=1.4VVCORE_SNS MIN_LINE_WIDTH=8
VOLTAGE=0VVCORE_GNDDIV MIN_LINE_WIDTH=8
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V2_5V_BST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V2_5V_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VOLTAGE=2.5V2_5V_DH
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=20VOLTAGE=2.5V2_5V_DL
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V1_5V_BST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=15VOLTAGE=5V1_5V_BOOST
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201_5V_DH VOLTAGE=1.5V
MIN_NECK_WIDTH=10MIN_LINE_WIDTH=201_5V_DL VOLTAGE=1.5V
MIN_LINE_WIDTH=81_5V_ILIM
2_5V_ILIM MIN_LINE_WIDTH=8
MIN_LINE_WIDTH=8MAX1715_TON
VOLTAGE=2.0V MIN_LINE_WIDTH=8MAX1715_REF
MIN_LINE_WIDTH=8MAX1715_SKIP
VOLTAGE=5V MIN_LINE_WIDTH=20 MIN_NECK_WIDTH=10MAX1715_VCC
VOLTAGE=0V MIN_NECK_WIDTH=10MIN_LINE_WIDTH=30MAX1715_GND
34 23 17
21
20
16
20
19
17
9
39
35
19
17
15
16
39
39
39
39
39
39
39
39
39
39
39
33
39
7
34
8
32
39
39
32
33
19
15
39
16
29
29
13
11
32
35
39
34
25
25
25
25
23
23
22
22
22
22
22
22
22
22
22
22
22
23
23
24
24
27
27
27
27
21
21
21
27
29
29
29
30
16
16
6
6
15
35
35
35
14
10
12
10
13
9
15
13
13
15
15
15
15
5
32
32
20
20
20
20
20
20
20
20
35
35
5
6
8
8
5
33
33
33
33
33
31
31
31
31
31
31
31
31
31
31
31
31
31
31
30
32
32
32
32
32
39
39
39
16
39
16
35
18
13
19
20
18
21
20
21
21
13
20
21
21
29
29
29
28
28
28
28
28
28
28
28
28
28
28
28
28
26
26
15
15
19
19
20
28
9
10
15
29
28
29
29
29
35
32
32
32
31
33
35
35
35
35
35
20
20
20
20
20
20
20
34
34
34
34
34
34
34
34
34
34
34
34
15
34
34
34
34
35
35
35
35
35
35
35
35
35
35
35
35
35
35
35
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 39 44A051-6278
FUNCTIONAL TEST POINTS
NO LONGER NEED BY TEST GROUP
CR-39
FUNC_TEST=YES
ROM_OE_L
FUNC_TEST=YES
CLK33M_AIRPORT
FUNC_TEST=YES
AIRPORT_IDSEL
FUNC_TEST=YES
ROM_ONBOARD_CS_L
FUNC_TEST=YES
ROM_CS_L
FUNC_TEST=YES
ROM_RW_L
FUNC_TEST=YES
RF_DISABLE_L_SPN
FUNC_TEST=YESMAIN_RESET_L
FUNC_TEST=YES
+5V_INV_SW
FUNC_TEST=YESLEFT_USB_DM
FUNC_TEST=YES
RIGHT_USB_DM
FUNC_TEST=YESLEFT_USB_DP
FUNC_TEST=YESNEC_LEFT_USB_PWREN
FUNC_TEST=YES
RIGHT_USB_DP
FUNC_TEST=YES
NEC_RIGHT_USB_PWREN
FUNC_TEST=YES
NEC_LEFT_USB_OVERCURRENT
FUNC_TEST=YES
NEC_RIGHT_USB_OVERCURRENT
FUNC_TEST=YESDCDC_EN
FUNC_TEST=YES
BBANG_HRESET_L
FUNC_TEST=YES
LT1962_L3_ADJ
FUNC_TEST=TRUE
+PBUS
FUNC_TEST=TRUE
+24V_PBUS
FUNC_TEST=YESCPU_VCORE_SLEEP
FUNC_TEST=YESGPU_VCORE
FUNC_TEST=TRUE
+1_8V_MAIN
FUNC_TEST=YES
VCORE_FB
FUNC_TEST=TRUE+3V_PMU
FUNC_TEST=YES
+5V_DDC_SLEEP
FUNC_TEST=YES
+12_8V_INV
FUNC_TEST=YESPWR_BUTTON_L
FUNC_TEST=YES
PMU_KB_RESET_L
FUNC_TEST=YES
COMM_RXD
FUNC_TEST=YESCOMM_RTS_L
FUNC_TEST=YES
COMM_GPIO_L
FUNC_TEST=YES
COMM_DTR_L
FUNC_TEST=YES
COMM_TXD_L
FUNC_TEST=YES
COMM_TRXC
FUNC_TEST=YES
KBD_LED2_OUT
FUNC_TEST=YES
KBD_LED1_OUT
FUNC_TEST=YES
SUTRO_ALS_OUT
FUNC_TEST=YES
ADAPTER_DET
FUNC_TEST=YES
SUTRO_ALS_GAIN_SW
FUNC_TEST=YES
CHARGE_LED_L
FUNC_TEST=YES
FW_TPI1N
FUNC_TEST=YES
FW_TPI1P
FUNC_TEST=YES
FW_TPO1P
FUNC_TEST=YES
FW_TPO1N
FUNC_TEST=YES
FW_TPO0R
FUNC_TEST=TRUE
RJ45_DN<3>
FUNC_TEST=TRUE
RJ45_DP<3>
FUNC_TEST=TRUE
RJ45_DN<1>
FUNC_TEST=TRUE
RJ45_DP<2>
FUNC_TEST=TRUE
RJ45_DN<2>
FUNC_TEST=TRUE
RJ45_DP<1>
FUNC_TEST=TRUE
RJ45_DN<0>
FUNC_TEST=TRUE
RJ45_DP<0>
FUNC_TEST=YES
FAN1_GND
FUNC_TEST=YES
FAN1_TACH
FUNC_TEST=YES
FAN2_TACH
FUNC_TEST=YES
FAN2_GND
FUNC_TEST=YES
PMU_BATT_DET_L
FUNC_TEST=YES
BATT_NEG
FUNC_TEST=YES
BATT_DATA
FUNC_TEST=TRUE
KBD_Y<7>
FUNC_TEST=YES
KBD_NUMLOCK_LED
FUNC_TEST=YES
BATT_CLK
FUNC_TEST=YES
+BATT_POS
FUNC_TEST=TRUE
KBD_Y<4>
FUNC_TEST=TRUE
KBD_Y<5>
FUNC_TEST=TRUE
KBD_Y<6>
FUNC_TEST=TRUE
KBD_Y<1>
FUNC_TEST=TRUE
KBD_Y<3>
FUNC_TEST=TRUE
KBD_Y<2>
FUNC_TEST=TRUE
KBD_Y<0>
FUNC_TEST=TRUE
KBD_X<9>
FUNC_TEST=TRUE
KBD_X<8>
FUNC_TEST=TRUE
KBD_X<6>
FUNC_TEST=TRUE
KBD_X<7>
FUNC_TEST=TRUEKBD_X<5>
FUNC_TEST=TRUE
KBD_X<4>
FUNC_TEST=TRUE
KBD_X<3>
FUNC_TEST=TRUEKBD_X<2>
FUNC_TEST=TRUE
KBD_X<1>
FUNC_TEST=YES
KBD_SHIFT_L
FUNC_TEST=TRUE
KBD_X<0>
FUNC_TEST=YES
KBD_OPTION_L
FUNC_TEST=YES
KBD_COMMAND_L
FUNC_TEST=YES
KBD_CONTROL_L
FUNC_TEST=YES
KBD_FUNCTION_L
FUNC_TEST=YES
KBD_CAPSLOCK_LED
FUNC_TEST=YES
+3V_HALL_EFFECT
FUNC_TEST=YES
+5V_TPAD_SLEEP
FUNC_TEST=YES
KBD_ID
FUNC_TEST=YES
COMM_RING_DET_L
FUNC_TEST=YES
COMM_SHUTDOWN
FUNC_TEST=YES
COMM_RESET_L
FUNC_TEST=YES
LID_CLOSED_L
FUNC_TEST=YES
TPAD_F_RXD
FUNC_TEST=YES
EIDE_OPTICAL_INT
FUNC_TEST=YES
TPAD_F_TXD
FUNC_TEST=YES
EIDE_OPTICAL_IOCHRDY
FUNC_TEST=YES
EIDE_OPTICAL_WR_L
FUNC_TEST=YES
EIDE_OPTICAL_RST_L
FUNC_TEST=YES
EIDE_OPTICAL_CS1_L
FUNC_TEST=YES
EIDE_OPTICAL_CS0_L
FUNC_TEST=TRUE
EIDE_OPTICAL_ADDR<2>
FUNC_TEST=TRUE
EIDE_OPTICAL_ADDR<1>
FUNC_TEST=TRUE
EIDE_OPTICAL_ADDR<0>
FUNC_TEST=YES
EIDE_OPTICAL_DMAACK_L 24 36
FUNC_TEST=YES
EIDE_OPTICAL_RD_L24 36
FUNC_TEST=YES
EIDE_OPTICAL_DMA_RQ 24 36
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<15>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<14>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<13>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<12>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<11>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<10>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<9>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<8>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<7>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<6>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<5>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<4>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<3>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<2>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<1>
FUNC_TEST=TRUE
EIDE_OPTICAL_DATA<0>
FUNC_TEST=YES
AIRPORT_PCI_INT_L
FUNC_TEST=YES
AIRPORT_PCI_GNT_L
FUNC_TEST=YES
AIRPORT_PCI_REQ_L
FUNC_TEST=TRUE
PCI_CBE<3>
FUNC_TEST=TRUE
PCI_CBE<2>
FUNC_TEST=TRUE
PCI_CBE<1>
FUNC_TEST=TRUE
PCI_CBE<0>
FUNC_TEST=YES
PCI_PAR
FUNC_TEST=YES
PCI_STOP_L
FUNC_TEST=YES
PCI_DEVSEL_L
FUNC_TEST=YES
PCI_IRDY_L
FUNC_TEST=YES
PCI_TRDY_L
FUNC_TEST=YES
PCI_FRAME_L
FUNC_TEST=TRUE
PCI_AD<31>
FUNC_TEST=TRUE
PCI_AD<30>
FUNC_TEST=TRUE
PCI_AD<29>
FUNC_TEST=TRUE
PCI_AD<28>
FUNC_TEST=TRUE
PCI_AD<27>
FUNC_TEST=TRUE
PCI_AD<26>
FUNC_TEST=TRUE
PCI_AD<25>
FUNC_TEST=TRUE
PCI_AD<24>
FUNC_TEST=TRUE
PCI_AD<23>
FUNC_TEST=TRUE
PCI_AD<22>
FUNC_TEST=TRUE
PCI_AD<21>
FUNC_TEST=TRUE
PCI_AD<20>
FUNC_TEST=TRUE
PCI_AD<19>
FUNC_TEST=TRUE
PCI_AD<18>
FUNC_TEST=TRUE
PCI_AD<17>
FUNC_TEST=TRUE
PCI_AD<16>
FUNC_TEST=TRUE
PCI_AD<15>
FUNC_TEST=TRUE
PCI_AD<14>
FUNC_TEST=TRUE
PCI_AD<13>
FUNC_TEST=TRUE
PCI_AD<12>
FUNC_TEST=TRUE
PCI_AD<11>
FUNC_TEST=TRUE
PCI_AD<10>
FUNC_TEST=TRUE
PCI_AD<9>
FUNC_TEST=TRUE
PCI_AD<8>
FUNC_TEST=TRUE
PCI_AD<7>
FUNC_TEST=TRUE
PCI_AD<6>
FUNC_TEST=TRUE
PCI_AD<5>
FUNC_TEST=TRUE
PCI_AD<4>
FUNC_TEST=TRUE
PCI_AD<3>
FUNC_TEST=TRUE
PCI_AD<1>
FUNC_TEST=TRUE
PCI_AD<2>
FUNC_TEST=YES
MODEM_USB_DP
FUNC_TEST=TRUE
PCI_AD<0>
FUNC_TEST=YES
MODEM_USB_DM
FUNC_TEST=YES
BT_USB_DP
FUNC_TEST=YES
BT_USB_DM
FUNC_TEST=YES
USB_D2M
FUNC_TEST=YES
USB_D2P
FUNC_TEST=YES
USB_D1M
FUNC_TEST=YES
USB_D1P
FUNC_TEST=YES
INT_I2C_CLK2
SND_LIN_SENSE_L
FUNC_TEST=YES
FUNC_TEST=YES
INT_I2C_DATA2
FUNC_TEST=YES
SND_HW_RESET_L
SND_HP_SENSE_L
FUNC_TEST=YES
FUNC_TEST=YES
SND_SCLK
FUNC_TEST=YES
INT_AUDIO_TO_SND
FUNC_TEST=YES
SND_AMP_MUTE_L
FUNC_TEST=YES
SND_CLKOUT
FUNC_TEST=YES
SND_HP_MUTE_L
FUNC_TEST=YES
SND_SYNC
FUNC_TEST=YES
SND_TO_AUDIO
FUNC_TEST=YES
TV_COMP
FUNC_TEST=YES
TV_Y
FUNC_TEST=YES
TV_C
FUNC_TEST=YES
TV_GND2
FUNC_TEST=YES
LVDS_DDC_DATA
FUNC_TEST=YES
BRIGHT_PWM
FUNC_TEST=YES
TV_GND1
FUNC_TEST=YES
LVDS_DDC_CLK
FUNC_TEST=YES
CLKLVDS_UN
FUNC_TEST=YES
CLKLVDS_UP
FUNC_TEST=YES
LVDS_U2P
FUNC_TEST=YES
LVDS_U1N
FUNC_TEST=YES
LVDS_U1P
FUNC_TEST=YES
LVDS_U2N
FUNC_TEST=YES
CLKLVDS_LP
FUNC_TEST=YES
LVDS_U0N
FUNC_TEST=YES
LVDS_U0P
FUNC_TEST=YES
CLKLVDS_LN
FUNC_TEST=YES
LVDS_L1P
FUNC_TEST=YES
LVDS_L2P
FUNC_TEST=YES
LVDS_L2N
FUNC_TEST=YES
LVDS_L0N
FUNC_TEST=YES
LVDS_L0P
FUNC_TEST=YES
LVDS_L1N
FUNC_TEST=YES
VGA_HSYNC
FUNC_TEST=YES
DVI_DDC_CLK_UF
FUNC_TEST=YES
DVI_DDC_DATA_UF
FUNC_TEST=YES
DVI_HPD_UF
FUNC_TEST=YES
VGA_G
FUNC_TEST=YES
VGA_B
FUNC_TEST=YES
VGA_VSYNC
FUNC_TEST=YES
VGA_R
FUNC_TEST=YES
TMDS_CONN_CLKP
FUNC_TEST=YES
JTAG_ASIC_TMS
FUNC_TEST=YES
JTAG_ASIC_TDO_TP
FUNC_TEST=YES
JTAG_ASIC_TDI
FUNC_TEST=YES
JTAG_ASIC_TRST_L
FUNC_TEST=YES
JTAG_ASIC_TCK
FUNC_TEST=YES
CPU_CHKSTP_OUT_L
FUNC_TEST=YES
CPU_SRESET_L
FUNC_TEST=YES
CPU_HRESET_L
FUNC_TEST=YES
JTAG_CPU_TDI
FUNC_TEST=YES
JTAG_CPU_TMS
FUNC_TEST=YES
JTAG_CPU_TDO_TP
FUNC_TEST=YES
JTAG_CPU_TCK
FUNC_TEST=YES
JTAG_CPU_TRST_L
FUNC_TEST=YES
JTAG_L3_TDI_TP
FUNC_TEST=YES
JTAG_L3_TMS
FUNC_TEST=YES
JTAG_L3_TCK
FUNC_TEST=YES
JTAG_L3_TDO_TP
FUNC_TEST=YES
INT_I2C_CLK0
FUNC_TEST=YES
INT_I2C_CLK1
FUNC_TEST=YES
INT_I2C_DATA0
FUNC_TEST=YES
CBUS_DET_1_L
FUNC_TEST=YES
INT_I2C_DATA1
FUNC_TEST=YES
CBUS_DET_2_L
TMDS_DN<0>
FUNC_TEST=TRUE
TMDS_DP<0>
FUNC_TEST=TRUE
TMDS_DP<1>
FUNC_TEST=TRUE
TMDS_DN<1>
FUNC_TEST=TRUE
TMDS_DP<2>
FUNC_TEST=TRUE
TMDS_DN<2>
FUNC_TEST=TRUE
FUNC_TEST=YES
TMDS_CONN_CLKN
AIRPORT_CLKRUN_L
FUNC_TEST=YES
30
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DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
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B
C
D
A
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A
REV.
APPLE COMPUTER INC.SCALE
NONE 40 44A051-6278
332/ REMOVED U1 BECAUSE NO USING 1.5V MAXBUS NOR 1.5V L3 INTERFACE STRAPS (PG 7)
329/ ADDED ONE MORE SPEAKER CLIP FOR PD (PG 4)328/ UPDATED TO NEW S-VIDEO FILTER VALUES (PG 22)
331/ CHANGED TO 33OHM RPAKS FOR TMDS (PG 21)330/ SWITCHED FAN TACH AND GROUND ON CONNECTOR FOR PD (PG 25)
321/ MOVED AMP AND HP MUTE CONTROL FROM TUBA TO MLB, AND INT_PU_RESET_L IS NOW "AND"ED WITH THE SIGNALS (PG 25)322/ CHANGED ZT10 TO THE NEW PD STANDOFF, BS1 (PG 4)323/ REMOVED ALL JUMPERS FOR PRODUCTION (PG TOO MANY)
320/ REMOVED LTC4210 BECAUSE OF RELIABILITY ISSUES, AND UPDATED PORT CONTROL WITH OLD METHOD PLUS A NEW 1.5A FUSE (PG 29)
319/ CHANGED R664 FROM 0OHM TO 10K BECAUSE IT SHOULD BE A WEAK PULL-DOWN (PG 24)318/ CHANGED RP55 AND RP56 TO 22OHM RPAKS (PG 21) 317/ NO STUFFED R694 AND STUFFED R727 TO RESTOR ORIGINAL VCORE STEPPING CONTROL (PG 34)
LAST MINUTE BOM CHANGES FOR DVT (12/20/02)
315/ CHANGED STUFFING OPTION TO ENABLE PCI SPREADING (PG 9) 316/ CHANGED STUFFING OPTION FOR A/B* SELECT ON MAX1717 TO SUPPORT L3 AT SLOW SPEED (PG 34)
313/ ADDED RESISTOR TO TPS2211 SHUTDOWN# PIN TO SUPPORT PSUEDO-D3COLD (PG 18)
274/ FIXED SYSTEM BUS TO 167MHZ OPERATION BECAUSE WE ARE USING INTREPID 2.0 (PG 15)
LAST MINUTE BOM CHANGES FOR PROTO2 (10/29/02)
RELEASED FOR DVT
RELEASED FOR EVT
275/ P50 IS ONLY POWERED BY +3V_SLEEP NOW (PG 24)276/ CHANGED TO ONE 1.5A FIREWIRE FUSE (PG 29)277/ ADDED PULL-DOWN TO P50’S CLKRUN_L SIGNAL AND NO CONNECTED P50’S PME SIGNAL (PG 24)278/ CHANGED PCI PULL-UP RESISTORS TO +3V_SLEEP TO SUPPORT P50 D3COLD (PG 13) 279/ ADDED TWO 4.7UF BULK CAPS NEAR THE FAN CONNECTORS (PG 25)280/ FAN POWER GOES BACK TO +5V_SLEEP (PG 25)281/ NEW PART NUMBERS FOR INTREPID 2.1, ZEBRA-17, BS520, 50&80PIN CONNECTORS, NEW CPU DESC.282/ NEW BOOT ROM AND LMU PART NUMBERS (PG 11, 23) 283/ FIXED DRCS AROUND SIL1162 BY CHANGING CONSTRAINTS (PG 21)284/ ADDED SLEEP FET FOR +5V_SOUND (PG 25)285/ ADDED 5A FUSE FOR FIREWIRE PORT POWER - FOR SAFETY COMPLIANCE (PG 29)286/ ADDED ESD AND LATE VG PROTECTION FOR FIREWIRE (PG 29)287/ CHANGED NOMINAL VCORE VOLTAGE TO 1.36V BECAUSE OF +/-50 MV REQUIREMENT ON GPU_VCORE (PG 20)288/ CHANGED SIL1162 TO RISING CLOCK EDGE - STUFFING CHANGE (PG 21) 289/ ADDED DUAL SCHOTTKY FOR FIREWIRE PHY POWER (PG 28)290/ ADDED STUFFING OPTION TO FEED MAIN_RESET_L TO PCI1510 (PG 18)291/ LOADED IN NEW MECHANICAL SYMBOLS FOR WIRELESS,CARDBUS, AND HARD/OPTICAL DRIVES292/ NO STUFFED R888 BECAUSE THERE’S A WEAK INTERNAL PULL-UP ALREADY (PG 15)293/ ADDED TWO 0805 ZERO OHM RESISTORS TO FEED IN EITHER +2_5V_SLEEP OR +2_5V_MAIN TO INTREPID (PG 16)294/ CHANGED GPU_VCORE SWITCHER BOM OPTIONS TO REDUCE JITTER ON SUPPLY (PG 20)295/ CONNECTED MAX4172 POWER TO +ADAPTER_SW TO SAVE 1MA WHEN RUNNING ON BATTERY ONLY (PG 31) 296/ CHANGED Q47 AND Q58 TO 7811W FOR BOM CONSOLIDATION - ALSO CHANGED R348 AND R353 TO 113K TO ADJUST CURRENT LIMIT (PG 35)297/ UPDATED BOM OPTION FOR SSCG (PG 9, 15) 298/ CHANGED RESET CAP TO 0.22UF ON TI PHY PER TI’S RECOMMENDATION (PG 28)299/ UPDATED TO NEW TUBA CONNECTOR PINOUT (PG 25)300/ CHANGED BOOTROM RESET TO INT_RESET_L FOR ICT (PG 10)301/ ADDED 4 ZERO OHM RESISTORS TO NO STUFF THE QUAD_VCORE OPTION (PG 34)302/ CHANGED ALL 132S1061 (0805 PACKAGE) TO 132S0046 (0603 PACKAGE) - (PG ALL)303/ CHANGED TO TOP CONTACT SPIDEY CONNECTOR (PG 23)304/ ADDED BOM OPTION TO PCI CLOCK OUT FROM INTREPID TO USB CONTROLLER (PG 13)305/ CHANGED TO NEW 30PIN TUBA CONNECTOR WITH SOLDER TAPS (PG 25)306/ UPDATED ETHERNET SERIES R VALUES (PG 14, 27)307/ CONSOLIDATED 1UF, 10% CAPS TO 1UF, 20% CAPS (PG 28,31)308/ CHANGED CURRENT LIMIT SETTINGS FOR 1.5V AND 2.5V SWITCHER (PG 35)309/ ADDED FOUR PULL-DOWN RESISTORS ON CKE FOR DDR MEMORY (PG 10)310/ ADDED THREE 0402 CAP PADS ON SND_SCLK, SND_CLKOUT, AND LVDS_DDC_CLK FOR EMI (PG 22, 25)311/ ADDED 5 SPEAKER CLIPS SYMBOLS (PG 4)312/ CHANGED VCORE OFFSET TO 10MV -> EVT BOARD MEASURED: IDLE 1.407V, SMOKE 1.387V, TRANSIENT 1.37V (PG 34)
REVISION HISTORY
156/ CHANGED TO SPIDEY 39PIN ZIF CONNECTOR AND PINOUT (PG 23)
154/ REMOVED PROTO1 CONNECTOR OPTIONS (PG 1, 22, 26, 27)
149/ UPDATED SOME NETS FOR CONCEPT 14.2 COMPLIANCE (PG 30,36)
178/ DELETED C741 (100UF INPUT CAP TO +3V_SLEEP) (PG 32)
175/ ADDED DEDICATED RC FILTERING FOR PORT0 TX 0 (PG 28)
168/ CHANGED 14PIN ZIF CONNECTORS AND PINOUT (PG 24,31)
151/ DELETED 4 0805 BULK CAPS AND ADDED 20 0402 BYPASS CAPS ON DDR SODIMM CONNECTOR (PG 12)152/ REPINNED OUT J13 (HARD DRIVE) CONNECTOR FOR BETTER FLEX ROUTING (PG 24)
162/ MERGED MAXBUS_MAIN WITH MAXBUS_SLEEP BECAUSE INTREPID MAXBUS I/O CAN BE POWERED DOWN IN SLEEP (PG 16,17)163/ DELETED ZT17 AND ZT2 BECAUSE THEY ARE NO LONGER NEEDED (PG 4)
166/ ADDED 2N7002 TO PREVENT PMU_SLEEP_LED_L FROM PUMPING UP +3V_MAIN DURING SHUTDOWN (PG 23)
153/ ADDED A FEW MORE COMPONENTS TO ALS CIRCUIT BASED ON THAI’S RECOMMENDATIONS (PG 23)
160/ CHANGED CPU CORE VOLTAGE TO 1.45V FAST/1.40V SLOW (PG 33)
164/ CHANGED FL1 TO NEW COMMON MODE CHOKES FOR FIREWIRE A (PG 28)165/ CHANGED CRYSTAL VOLTAGE DIVIDER FOR FIREWIRE PHY TO 50/100 (BILL’S RECOMMENDATION) (PG 28)
182/ CHANGED C533, C539 TO 270PF AND CHANGED CONNECTIONS (PG 32)
179/ DELETED C757 (0.22UF BYPASS CAP FOR PCI1510) TO EASE TESTPOINT CONSTRAINTS (PG 18)
177/ CHANGED STUFFING OPTION TO RAISE PLL VOLTAGE TO 1.95V FOR FW (PG 28) 176/ ADDED STUFFING OPTION FOR DS1 PIN ON FIREWIRE PHY (PG 28)
169/ CONNECTED VGATE TO EXTINT10 BECAUSE NEED INTERRUPT CONTROL (PG 15)
189/ REMOVED C195 - 1.5V AGP(DOUBLED BYPASS), C24,C20 - 3VMAIN (DOUBLED BYPASS) FOR TESTPOINTS (PG 17) 187/ CHANGED FW DVDD LDO TO 1.95V PER BILL’S RECOMMENDATION (PG 28)
190/ REMOVED C91 - 1.5V AGP BULK CAP BECAUSE THERE ARE 4 ON INTREPID SIDE ALREADY! (PG 20)
186/ CHANGED STUFFING OPTION TO FORCE 3V/5V INTO FORCE CONTINUOUS MODE TO REDUCE INDUCTOR SINGING (PG 32)
181/ CHANGED SYSCLK_CPU, INT_PCI_FB_OUT, AND INT_AGP_FB_OUT SERIES RESISTOR VALUE (PG 9, 13) 180/ SEPERATED PULL-UP FOR PCI_SERR_L AND PCI_PERR_L (PG 18,26)
161/ ADDED +3V_SLEEP TO TUBA CONNECTOR (PG 25)
158/ CONSOLIDATED BOMS 157/ ADDED INTREPID SSCG CHIP SUPPORT (PG 15)
155/ ADDED USB 2.0 CONTROLLER (PG 26)
REV 2.0 - 08/26/02
173/ ADDED PMU_LID_CLOSED_L SIGNAL TO LMU (PG 23)
184/ ADDED EMI SHIELD FOR INVERTER CHGND (PG 4) 185/ UPDATED MORE CONSTRAINTS
167/ DELETED USB POWER FET (PG 23)
170/ UPDATED A FEW CONSTRAINTS 171/ ADDED NEW QUAD-VCORE CONTROL CIRCUITRY (PG 33) 172/ CHANGED OPTICAL CONNECTOR PINOUT (PG 24)
174/ ADDED Q11 ADAPTER DETECTION SCHEME (PG 29)
183/ ADDED 4.7NF CAP ON Q51 GATE (PG 31)
REV 1.1 - 08/14/02
159/ UPDATED USB 2.0 SIGNAL CONSTRAINTS (PG 26)
150/ CORRECTED PMU PART NUMBER (PG 28)
RELEASED FOR PROTO 1 RELEASED FOR PROTO 1
LAST MINUTE BOM CHANGES FOR PROTO2 (9/5/02)
199/ NO STUFFED L4 AND L5, FIREWIRE COMMON MODE CHOKES (PG 28)
197/ STUFFED 20K FEEDBACK RESISTOR FOR MARVELL 88E1111 CRYSTAL (PG 27)
200/ CHANGED BOOTROM APN FOR SHARP DIE-SHRINK PACAKGE (PG 10) 201/ CHANGED VCORE STUFFING OPTION FOR 1GHZ PROCESSOR (PG 33)
206/ ADDED 0 OHM RESISTOR FOR 2.5V_MARVELL TO MEASURE CURRENT (PG 27)
202/ COMBINED FIREWIRE FUSE INTO ONE TO LIMIT PORT POWER TO 22W@24V OR 13.5W@15V (PG 28) 203/ UPDATED L3 SYMBOLS TO REFLECT MISSING SA17 SIGNAL ON 4MBIT PARTS VS. 8MBIT PARTS (PG 8)
198/ NO STUFFED 4700PF FOR 14V PBUS GATE - C741 (PG 31)
205/ REMOVED P93 SUPPORT CIRCUIT (PG 25)
REV 3.0 - 09/20/02
204/ CHANGED TO NEW SPIDEY CONNECTOR AND PINOUT (PG 23)
207/ ADDED 0 OHM RESISTOR FOR POWER BUTTON - DEBUG (PG 25)
RELEASED FOR PROTO 2-ENCLOSURE
260/ MIRRORED AIRPORT CONNECTOR BECAUSE CONNECTIONS ARE MIRRORED ON THE FLEX (PG 24)
208/ ADDED 2 JUMPERS FOR PMU_RESET_BUTTON_L AND PMU_NMI_BUTTON_L (PG 25)209/ CHANGED TO PROTO2 BOM OPTION - INTREPID REV 2.0, AND MARVELL 2.0 CHANGES
LAST MINUTE BOM CHANGES FOR PROTO2-ENCLOSURE (9/25/02)210/ CHANGED R474 TO 49.9K, 1%, R475 TO 1.0K, 1%, AND R683 TO 10.7K, 1% (PG 30)
255/ UPDATED DVI_HPD CIRCUIT PER HYDRA IMPLEMENTATION (PG 22)
253/ ADDED PULL-UP TO PMU_SLEEP_LED_L AND CHANGED R451 TO PULL-DOWN SLEEP_LED_H TO ENSURE STATES WHEN CHIPS TRISTATE OUTPUTS (PG 23)
250/ ADDED MORE FUNCTIONAL TEST POINTS PER WAYNE’S INPUT (PG 39)249/ CHANGED DS1 (PIN 32) TO PULL-UP FOR A-ONLY OPERATION (PG 28) 248/ ADDED 1K PULL-DOWN TO FW_DS1, FW_SE, AND FW_SM INPUTS PER TI’S RECOMMENDATION (PG 28)
238/ CHANGED +14V_PBUS TO +PBUS SINCE THE VOLTAGE MAY CHANGE BACK AND FORTH (PG ALL)
235/ CHANGED R21 TO +3V_SLEEP TO PREVENT LEAKAGE TO MAXBUS_SLEEP BEFORE LMU SETS OUTPUT AS OPEN-DRAIN (PG 23)
226/ CHANGED SMBUS PULL-UP RESISTOR TO 7.15K (DON’T HAVE ANOTHER 5% ~7K RESISTOR IN BOM) - PER IBOOK (PG 30)225/ ADDED 2 10K PULL-UP TO USB NC PINS (M6 AND P6) - PER NEC (PG 26)
217/ DELETED CAPACITOR OPTION ON INT_CPUFB_IN - MAKE RISE/FALL TIME WORSE (PG 9)216/ REPLACED IRF7822 IN THE BATTERY CHARGER AND 14V SWITCHER SECTION WITH IRF7811W (PG 30, 31)
212/ ADDED 10K PULL-UP STUFFING OPTION TO CG_ADDRSEL AND 10K PULL-DOWN STUFFING OPTION TO CG_FSEL (PG 15)
219/ UPDATED TO NEW EMI SHIELD PART NUMBER, AND NEW 300MHZ SRAM PART NUMBER (PG 4, 8)
222/ DELETED PULL-UP RESISTOR TO VCORE_VCC ON VGATE SINCE THERE’S A 10K PULL-UP RESISTOR ON INTREPID SIDE (PG 33)
224/ SEPARATED FW PORTS TO ANOTHER PAGE; UPDATED PIN DEFINTIONS (PG 28, 29)
228/ CHANGED TO NEW MOUNTING HOLE SIZES - ALL INCREASED BY 0.2MM IN DIAMETER EXCEPT FOR THREE CPU MTG HOLES (PG 4)229/ CHANGED BOM OPTION TO 167MHZ BUS WITH PLL SET TO 1GHZ/833MHZ (PG 7,9)
231/ CHANGED JUMPER PADS FOR PMU_RESET_L AND PMU_NMI_L TO 0603 RESISTOR PADS (PG 25) 230/ CHANGED TO 10K PULL-DOWN FOR MOD_DTI, MOD_SYNC, AND MOD_BITCLK - PER INTREPID PADS SPREADSHEET (PG 14)
233/ CHANGED INT_PLL_EN_PD TO PULL-DOWN AND CHANGED JTAG_ENET_TDI TO PULL-UP (PG 14)234/ DISCONNECTED FW_LKON FROM INT_EXTINT3_PU BECAUSE FW_LKON OUTPUT NOW WORKS FINE (PG 15)
242/ ADDED C843 TO SPEED UP Q10 TURN ON AND CHANGED Q14 TURN ON TO AC_IN (PG 31) 243/ REMOVED C650 (2MILLOHM) SENSE RESISTOR FROM CPU_VCORE SWITCHER BECAUSE IT CAUSES TOO MUCH DROOP ON VOLTAGE (PG 34)244/ REPLACED LMC6462 WITH LMC7111 BECAUSE ONLY NEED 1 OP-AMP (PG 31)245/ CHANGED LTC4210 TIMER CAPACITOR TO ONE 0805 INSTEAD OF TWO 0402 (PG 29)
247/ CHANGED TO NEW CALIFORNIA MICRO DEVICES LOW-CAPACITANCE ESD DIODES FOR FIREWIRE (PG 29)
251/ CHANGED BACK TO OLD BAV99DW DIODES BECAUSE CMD1210 CAN ONLY HANDLE 8MA FORWARD CURRENT (PG 29)
257/ SWAPPED JTAG_CPU_TRST_L AND JTAG_CPU_TDI WITH SENSOR5_I2C*_PD BECAUSE 200OHM PULL-DOWN PREVENTS IN-CIRCUIT PROGRAMMING ON PA0258/ REMOVED XW17 - CPU_VCORE_JUMPER - FOR HUGE COPPER POUR (PG 34)
261/ FINALIZED ALL CHANGES FOR SI1162 PART - RUNNING HIGH SWING MODE (PG 21)
RELEASED FOR PROTO 2-ENCLOSURE
REV 4.0 - 10/24/02
256/ REPINNED OUT TUBA CONNECTOR (PG 25)
211/ CHANGED INTRPEID PART NUMBER TO REV 2.0 (PG 9-16)
220/ SWITCHED TO NEW 16PIN MODEM CONNECTOR (PG 25) 221/ FIXED AGP CLOCK CONSTRAINTS (PG 13,35)
223/ ADDED BACK INDIVIDUAL FUSE FOR FIREWIRE PORT (PG 28)
227/ DELETED ALL INTREPID_REV1 STUFFING OPTION (PG 9-16)
232/ ADDED DAMPING RESISTOR FOR 8MHZ CRYSTAL (PG 23)
236/ CHANGED FW_PD AND FW_PU TO 5% RESISTORS (PG 28)
239/ ADDED A29 ADAPTER DETECT (PG 30)
241/ DELETED OLD BATTERY CURRENT LIMITER CIRCUIT (PG 31) 240/ ADDED NEW SYSTEM CURRENT MONITOR FOR +PBUS (PG 31)
246/ FINALIZED ALL POWER SUPPLY CHANGES (PG 29-32)
252/ REMOVED COMMON MODE CHOKE PADS FOR FIREWIRE B (PG 29)
218/ CHANGED POWER SUPPLY TO FAN TO +3V_SLEEP (PG 25)
214/ REMOVED NO_TEST=TRUE PROPERTY ON MAXBUS/L3 BUS (PG 35) 213/ REMOVED ZEBRA 15/16 SUPPORT (PG 28)
215/ ADDED FUNCTIONAL TEST POINT DEFINITION (PG 38)
237/ ADDED FIREWIRE PORT CURRENT LIMITER (PG 29)
254/ ADDED SILICON IMAGE SI1162 - FIRST PASS (PG 21)
259/ ADDED PART NUMBER TABLE FOR SPEAKER CLIP (PG 4)
262/ CHANGED TO SI3446DV FOR FAN FETS (PG 25)
195/ CHANGED STUFFING OPTION TO ENABLE 1.5V_LDO AND MAKE 1.5V_MAIN INTO 1.8V (PG 16, 19, 34)
191/ CHANGED STUFFING OPTION TO FORCE 14V INTO FORCE CONTINUOUS MODE TO REDUCE INDUCTOR SINGING (PG 31)
194/ CHANGED LINE_WIDTH FOR FIREWIRE SIGNALS TO MAKE THEM 55OHM SINGLE AND 110OHM DIFFERENTIAL (PG 36)
196/ ADDED BACK IN COMMON MODE CHOKE FOR FIREWIRE B TO ENSURE TESTABILITY (PG 28)
192/ CHANGED STUFFING OPTION TO RAISE MARVELL CORE VOLTAGE TO 1.32V (PG 27) 193/ REMOVED COMMON MODE CHOKE FOR FIREWIRE B SIGNALS (PG 28)
RELEASED FOR PROTO 2 RELEASED FOR PROTO 2
266/ CY28512 NOW RUNS ON 3V_MAIN AND 2.5V_MAIN... UPDATED THE STRAPS TOO (PG 15)265/ FINE TUNED PCI SERIES RESISTOR R VALUES FOR EMI AND DIVIDED CY28512 OUTPUT FROM 2.5V TO 1.5V (PG 13,15)264/ ADDED ONE MORE 1000UF POSCAP ON CPU_VCORE_SLEEP TO REDUCE RIPPLE BY ANOTHER 10MV, AND CHANGED OFFSET TO +30MV (PG 34) 263/ PULLED DS2 HIGH TO SHUT-OFF PORT 3 ON FIREWIRE PHY COMPLETELY (PG 28)
267/ ALS SENSOR IS NOW RUNNING DURING SLEEP PER THAI’S REQUEST (PG 23, 24) 268/ CHGND1 NOW SPLITS INTO CHGND1 AND CHGND6 BECAUSE OF FIREWIRE B ROUTING ON THE SURFACE (PG 29) 269/ SEPARATED 0 OHM RESISTORS FOR EACH FIREWIRE GROUND PINS (PG 29)270/ CY28512 RESET PIN NOW GOES TO +3V_MAIN - INT_RESET_L WILL NOT WORK (PG 15)271/ CHANGED PULL-UPS FOR FAN CONTROL SIGNALS TO +3V_SLEEP - LEAKAGE PROBLEM THROUGH THE FAN (PG 25)272/ NO STUFFED PULL-UP RESISTORS FOR EIDE_RESET AND EIDE_DMAACK_L - PER MKE DRIVE SPEC (PG 24)
RELEASED FOR EVT
273/ UPDATED BOMOPTION "NO SSCG" TO "NO_SSCG" (PG 9)
314/ CHANGED CPU VCORE TO 1.32V@1GHZ AND 1.15V@667MHZ (PG 34)
REV 5.0 - 12/03/02
324/ CHANGED R152 TO 511 OHM, 1% TO AVOID LOW CPU CLOCK AMPLITUDE (PG 9)325/ CHANGED R451 TO 10K FROM 100K (PG 23) - OTHERWISE, IT MAY BE TOO WEAK326/ REMOVED R621 AND CONNECTED R608 TO GROUND WITH 10K RESISTOR TO ENSURE KBD LED IS OFF WHEN LMU IS IN RESET (PG 23)327/ SWAPPED R265 AND R653 VALUES BECAUSE BATTERY VOLTAGE CAN GO DOWN TO 10.4V, AND WE NEED TO ENSURE VGS<-4.5V (PG 29)
REV A - 01/14/02
RELEASED FOR DVT
RELEASED FOR PRODUCTION RELEASED FOR PRODUCTION
CR-40
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 41 44
A051-6278
USB_DDP 15B2 15C2
USB_DDM 15B2 15C2
USB_DCP 15B2 15C2 26A5
USB_DCM 15B2 15C2 26A5
USB_DBP 15B2 15D2
USB_DBM 15B2 15D2
USB_DAP 15B2 15D2 26A5
USB_DAM 15B2 15D2 26A5
USB_D2P 15D1 26A4 26A5 39B6
USB_D2M 15D1 26A4 26A5 39B6
USB_D1P 15C1 26A4 26A5 39B6
USB_D1M 15C1 26A5 26B4 39B6
USB2_PCI_REQ_L 13A7 13D7 26B7
USB2_PCI_INT_L 15B5 15C7 26A8
USB2_PCI_GNT_L 13C7 26B7
UIDE_RST_L 14C7 24A4 37C5
UIDE_REF 14C7 38C3
UIDE_IOCHRDY 14C7 24A4 37C5
UIDE_INTRQ 14C7 37C5
UIDE_DMARQ 14C7 37C5
UIDE_DMACK_L 14C7 24A4 37C5
UIDE_DIOW_L 14C7 24A4 37C5
UIDE_DIOR_L 14C7 24A4 37C5
UIDE_DATA<15..0> 14D7 24B4 24C4 24D4 37C5
UIDE_CS1_L 14C7 24B4 37C5
UIDE_CS0_L 14C7 24C4 37C5
UIDE_ADDR<2..0> 14D7 24B4 24C4 37C5
TV_Y 22B6 39D6
TV_GND2 22A6 38B6 39A7
TV_GND1 22B6 38B6 39A7
TV_COMP 22B6 39D6
TV_C 22B6 39D6
TPS2211_SHDN_L_PU 18C4
TPAD_TXD 23A8 30B2 30C4
TPAD_RXD 23A8 30C2 30C4
TPAD_F_TXD 23A7 39C4
TPAD_F_RXD 23A7 39C4
37B2 39A8
TMDS_DP<2..0> 20B2 20C2 20D2 21B1 21B2 22D5 22D6
37B2 39A8 39B8
TMDS_DN<2..0> 20B1 20C1 20D1 21B1 21B2 22D5 22D6
TMDS_D2_CMF 20C1
TMDS_D1_CMF 20C1
TMDS_D0_CMF 20D1
TMDS_CONN_CLKP 22C7 37B2 39D7
TMDS_CONN_CLKN 22C7 37B2 39A8
TMDS_CLK_CMF 20B1
TMDS_CLKP 20A2 21B1 21B2 22C8 37B2
TMDS_CLKN 20A1 21B1 21B2 22C8 37B2
THERM_L_OC 25B3 30B2 30B4
THERM2_M_DP 25B6 25B7 37A2
THERM2_M_DM 25A7 25B6 37A2
THERM2_DP 25A5 25B4 25B5 37A2
THERM2_DM 25A5 25B4 25B5 37A2
THERM2_A_DP 25A6 25A7 37A2
THERM2_A_DM 25A6 25A7 37A2
THERM1_M_DP 25B6 25B7 37A2
THERM1_M_DM 25B6 25B7 37A2
THERM1_DP 25A5 25B4 25B5 37A2
THERM1_DM 25A5 25B4 25B5 37A2
THERM1_A_DP 25A6 25A7 37A2
THERM1_A_DM 25A6 25A7 37A2
SYSTEM_CLK_EN 15A5 15B7 15C7 30C4
SYSCLK_LA_TP 9A6
SYSCLK_DDRCLK_B1_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_B1_L_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_B1_L 10D4 12A5 36C1
SYSCLK_DDRCLK_B1 10D4 12A5 36C1
SYSCLK_DDRCLK_B0_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_B0_L_UF 10B6 10C5 36D1
SYSCLK_DDRCLK_B0_L 10C4 12D3 36C1
SYSCLK_DDRCLK_B0 10D4 12D3 36D1
SYSCLK_DDRCLK_A1_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_A1_L_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_A1_L 10D4 12A6 36D1
SYSCLK_DDRCLK_A1 10D4 12A6 36D1
SYSCLK_DDRCLK_A0_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_A0_L_UF 10B6 10D5 36D1
SYSCLK_DDRCLK_A0_L 10D4 12D8 36D1
SYSCLK_DDRCLK_A0 10D4 12D8 36D1
SYSCLK_CPU_UF 9A6 36D1
SYSCLK_CPU 5C3 9A6 36D1
SUTRO_ALS_OUT 23C4 24B2 39C2
SUTRO_ALS_GAIN_SW 23C4 24B2 39C2
STOP_AGP_L 13D2 13D4 19A7
ST7_XTAL_IN 23C5
ST7_SLEEP_LED_H 23C2 23C4
ST7_SENSOR5_SDA_PU 23B2 23D4
ST7_SENSOR5_SCK_PU 23B2 23D4
ST7_SENSOR4_SDA_PD 23B2 23D4
ST7_SENSOR4_SCK_PD 23B2 23D4
ST7_RESET_L 23D5
ST7_PB6_PD 23B2 23C4
ST7_OSC2 23D5
ST7_OSC1 23D5
ST7_KBD_LED_OUT 23A4 23C4
ST7_ICP_SEL_PD 23A2 23D6
SOFT_PWR_ON_L 22D1 23A8 30A8 30C6 30D7 34A4
SND_TO_AUDIO 15B1 25C6 39D6
SND_SYNC 15B1 25C6 39D6
SND_SCLK 15B1 25C6 36B1 39C6
SND_LIN_SENSE_L 15B5 25C7 39C6
SND_HW_RESET_L 15A7 15B5 25C7 39C6
SND_HP_SENSE_L 15B5 25C6 39C6
SND_HP_MUTE_L 15C5 25C4 39C6
SND_HP_MUTE 25C6
SND_CLKOUT 15A1 25C6 36B1 39D6
SND_AMP_MUTE_L 15C5 25D5 39C6
SND_AMP_MUTE 25C6
SND_AGND 25C7 38B6
SLEEP_L_LS5_EN_L 33A5
SLEEP_L_LS5 20D6 27A8 33A4 34C8 35D7
SLEEP_LS5_EN_L 33A4
SLEEP_LS5 25D8 33A3 33A8
SLEEP_LED_UF 23C1
SLEEP_LED_SW_L 23C2
SLEEP_LED_L 23D1
SLEEP_LED_I 23D1
SLEEP_LED 23C1 25C7
35D2
SLEEP 23C4 30B6 30D7 33A5 33A6 33B3 35B3
SI_TMDS_DP<2..0> 21A2 21B3 21C1
SI_TMDS_DN<2..0> 21A2 21B3 21C1
SI_TMDS_CLKP 21A2 21B3 21C1
SI_TMDS_CLKN 21A2 21B3 21C1
SI_I2C_OFF 21C3
SI_EXT_SWING_SET 21C1
SI_EDGE 21C3
SI_DK<1..0> 21C3
RUN_OR_AC 29C6
ROM_WP_L 10B3
ROM_RW_L 10B3 13A5 24C6 39B1
ROM_ONBOARD_CS_L 10B3 24C6 39B1
ROM_OE_L 10B3 13A5 24C5 39B1
ROM_CS_L 10B3 13A5 24B6 39B1
RJ45_DP<3..0> 27B2 37D2 39A3 39B3
RJ45_DN<3..0> 27B2 37D2 39A3 39B3
RJ45_C3_PD 27B2
RJ45_C2_PD 27B2
RJ45_C1_PD 27B2
RJ45_C0_PD 27B2
RIGHT_USB_DP 26A3 32A7 37A2 39D1
RIGHT_USB_DM 26A3 32A7 37A2 39D1
RF_DISABLE_L_SPN 24D6 39C1
RAM_WE_L 10A4 12B3 12B8 36A5
RAM_RAS_L 10A4 12B5 12B6 36A5
RAM_MUXSEL_L 11A3 11A5 11B5 11B7 36A5
RAM_MUXSEL_H 11A3 11A5 11B1 11B3 36A5
12D3 36A5 36B5 36C5
RAM_DQS_B<7..0> 11C2 11C4 11C6 11C8 12A3 12B3 12C3
36C5
11C7 12A8 12B8 12C8 12D8 36A5 36B5
RAM_DQS_A<7..0> 11B2 11B4 11B6 11B8 11C1 11C3 11C5
12D5 36A5 36B5 36C5
RAM_DQM_B<7..0> 11C2 11C4 11C6 11C8 12A5 12B5 12C5
36C5
11C7 12A6 12B6 12C6 12D6 36A5 36B5
RAM_DQM_A<7..0> 11B2 11B4 11B6 11B8 11C1 11C3 11C5
12D5 36A5 36B5 36C5
12A3 12A5 12B3 12B5 12C3 12C5 12D3
RAM_DATA_B<63..0> 11C2 11C4 11C6 11C8 11D2 11D4
12D6 12D8 36A5 36B5 36C5
11D3 12A6 12A8 12B6 12B8 12C6 12C8
11C3 11C4 11C5 11C6 11C7 11C8 11D1
RAM_DATA_A<63..0> 11B2 11B4 11B6 11B8 11C1 11C2
RAM_CS_L<3..0> 10C4 12B3 12B5 12B6 12B8 36A5
RAM_CKE<3..0> 10A3 10C4 12B6 12B8 12C3 12C5 36A5
RAM_CAS_L 10A4 12B5 12B6 36A5
RAM_BA<1..0> 10A4 12B3 12B5 12B6 12B8 36A5
RAM_ADDR<12..0> 10A4 10B4 12B3 12B5 12B6 12B8 36A5
PWR_BUTTON_L 23A7 25C2 39B2
POWER_VALID 30B2 30C4
POWER_UP 29C7
PMU_TO_INT 15C2 30C4
PMU_SMB_DATA 30B4 30C2 31A2
PMU_SMB_CLK 30B4 30C2 31A3
PMU_SLEEP_LED_L 23C2 30C4
PMU_SLEEP_LED 23C4
PMU_RESET_L 30B6
PMU_RESET_BUTTON_L 25B2 30C4 30D2
PMU_REQ_L 15B7 15C2 30C4
PMU_POWER_UP_L 29C7 30C6 30D7 33B6
PMU_POWERUP_OK 30B4 30D2
PMU_PME_L 15B5 26B8 30B2 30C4
PMU_OOPS 30B2 30B4
PMU_NUMLOCK_LED_L 30C6
PMU_NMI_L 30C2 30C4
PMU_NMI_BUTTON_L 25C2 30C2 30C4
PMU_LID_CLOSED_L 23A8 23C4 30B2 30C4
PMU_KB_RESET_L 30A6 30B7 39B2
PMU_KB_RESET_IN2 30A7
PMU_KB_RESET_IN1 30A7
PMU_INT_NMI 15B5 15B7 30D4
PMU_INT_L 15B5 15B7 30B6
PMU_I2C_DATA 30B4 30C2
PMU_I2C_CLK 30B4 30C2
PMU_FROM_INT 15C2 30C4
PMU_EPM 30D2 30D4
PMU_CPU_HRESET_L 23A4 23C4 30C4
PMU_CNVSS 30B6 30C7
PMU_CLK 15C2 30C4
PMU_CHRG_BATT_0 30C4 31A8
PMU_CHARGE_V 30C4 31B8
PMU_CAPSLOCK_LED_L 30C6
PMU_BYTE 30B6 30C7
PMU_BATT_DET_L 30B3 30D2 31A4 39C3
PMU_BATT1_DET_L_PU 30B4 30D2
PMU_BATT0_DET_L 30B4
PMU_AC_IN 30B4
PMU_AC_DET 30A4 30B4
PMU_ACK_L 15C2 30C4
PLL_STOP_L 7C7
PCI_TRDY_L 13B7 13C7 18A7 24C5 26B7 37C5 39A5
PCI_STOP_L 13A7 13C7 18B7 24C5 26B7 37C5 39A5
PCI_PAR 13C7 18B7 24C5 26B7 37C5 39D4
PCI_IRDY_L 13B7 13C7 18B7 24C6 26B7 37C5 39A5
PCI_FRAME_L 13B7 13C7 18B7 24C5 26B7 37C5 39A5
PCI_DEVSEL_L 13B7 13C7 18A7 24C5 26B7 37C5 39A5
PCI_CBE<3..0> 13C7 18B7 24C5 24C6 26B7 37C5 39D4
39B5 39B6 39C5 39D5
26B7 26C7 26C8 26D7 37C5 39A5 39A6
24B5 24B6 24C5 24C6 24D4 24D5 24D6
PCI_AD<31..0> 10B3 10C1 10C3 13C6 13D6 18B7 18C7
PCI1510_VR_EN_L 18C7
OVER_18V_ADJ 31C3
NUMLOCK_LED_L 23B8 30C7
NUMLOCK_LED 23B8
NEC_XT2_R 26D4
NEC_XT2 26D5 36B1
NEC_XT1 26D5 36B1
NEC_USB_RSDP2 26C5 37B2
NEC_USB_RSDP1 26C5 37B2
NEC_USB_RSDM2 26C5 37B2
NEC_USB_RSDM1 26C5 37B2
NEC_USB_DBP 26A4 26C3 37B2
NEC_USB_DBM 26A4 26C3 37B2
NEC_USB_DAP 26A4 26C4 37B2
NEC_USB_DAM 26B4 26C3 37B2
NEC_SMI_L_TP 26A7
NEC_RREF 26B5
NEC_RIGHT_USB_PWREN 26B5 32A7 39C1
NEC_RIGHT_USB_OVERCURRENT 26C1 32A7 39C1
NEC_PPON5_TP 26B5
NEC_PPON4_TP 26B5
NEC_PPON3_TP 26B5
NEC_PME_L 26A7 26B7
NEC_PCI_SERR_L 26B7 26C8
NEC_PCI_PERR_L 26B7 26C8
NEC_PCI_INTC_L 26A7 26B7
NEC_PCI_INTB_L 26A7 26B7
NEC_PCI_INTA_L 26A7 26B7
NEC_OCI<5..1> 26B5 26C3
NEC_NC2_TP 26B5
NEC_NC1_TP 26B5
NEC_NANDTESTOUT_TP 26A4
NEC_NANDTESTEN_TP 26A5
NEC_MAIN_RESET_L 26A7 26B7
NEC_LEGC 26A7
NEC_LEFT_USB_PWREN 24B2 26B5 39D1
NEC_LEFT_USB_OVERCURRENT 24B2 26C1 39D1
NEC_IO_RESET_L 26B7
NEC_IDSEL 26B7
NEC_CRUN_L 26A7
NEC_AVDD 26D6 38A3
NEC_AMC_TP 26A5
MPIC_CPU_INT_L 5B2 5B3 15B5
MODEM_USB_DP 15B1 25C3 37A2 39B6
MODEM_USB_DM 15B1 25C3 37A2 39B6
MLB_PHOTODIODE 23D8
MLB_ALS_OUT_FB 23D7
MLB_ALS_OUT 23C4 23D6
MLB_ALS_OP_IN 23D7
MLB_ALS_OP_COMP 23D7
MLB_ALS_GAIN_SW 23C4 23C8
MEM_WE_L 10A5 10C6 36A5
MEM_RAS_L 10A5 10C6 36A5
MEM_MUXSEL_L<1..0> 10B6 11A4 11A6 36A5
MEM_MUXSEL_H<1..0> 10B6 11A4 11A6 36A5
11C5 11C7 36A5 36B5 36C5
MEM_DQS<7..0> 10C6 11B1 11B3 11B5 11B7 11C1 11C3
11C5 11C7 36A5 36B5 36C5
MEM_DQM<7..0> 10C6 11B1 11B3 11B5 11B7 11C1 11C3
11C1 11C3 11C5 11C7 36A5 36B5 36C5
MEM_DATA<63..0> 10B8 10C8 10D8 11B1 11B3 11B5 11B7
MEM_CS_L<3..0> 10C5 10C6 36A5
MEM_CKE<3..0> 10B6 10C5 36A5
MEM_CAS_L 10A5 10C6 36A5
MEM_CAL_PU 19B2
MEM_CAL_PD 19B2
MEM_CAL_CLK 19B2
MEM_BA<1..0> 10A5 10C6 10D6 36A5
MEM_ADDR<12..0> 10A5 10B5 10D6 36A5
MDI_P<3..0> 27B5 37D2
MDI_M<3..0> 27B5 37D2
MDI3_PD 27B3
MDI2_PD 27B4
MDI1_PD 27B4
MDI0_PD 27B4
9D8 16D8 17D8 23B3 34D8 38D3
MAXBUS_SLEEP 5A2 5D2 5D5 7A8 7D7 9B8 9C3 9C8 9D1
MAX4172_OUT 31D4
MAX1717_AB_SEL 34C6
MAX1715_VCC 35D5 38C1
MAX1715_TON 35C5 38C1
MAX1715_SKIP 35C4 38C1
MAX1715_REF 35B5 38C1
MAX1715_ON_RC 35C7
MAX1715_GND 35B5 35C5 38C1
30D7 39C1
MAIN_RESET_L 18A7 18D5 19B8 21C3 24D6 26B8 30D4
LVDS_U3P_SPN 20B2
LVDS_U3N_SPN 20B2
LVDS_U2P 20B2 22A4 37B2 39B7
LVDS_U2N 20B2 22A4 37B2 39B7
LVDS_U1P 20B2 22A4 37C2 39B7
LVDS_U1N 20C2 22A4 37C2 39B7
LVDS_U0P 20C2 22A4 37C2 39B7
LVDS_U0N 20C2 22A4 37C2 39B7
LVDS_L3P_SPN 20C2
LVDS_L3N_SPN 20C2
LVDS_L2P 20C2 22B4 37C2 39C7
LVDS_L2N 20C2 22B4 37C2 39C7
LVDS_L1P 20C2 22B4 37C2 39C7
LVDS_L1N 20C2 22B4 37C2 39C7
LVDS_L0P 20C2 22B4 37C2 39C7
LVDS_L0N 20C2 22B4 37C2 39C7
LVDS_DDC_DATA 20C2 22B5 39A7
LVDS_DDC_CLK 20C2 22B5 39A7
LTC3707_START_RC 33B6
LTC3411_VCC 35A6 38B1
LTC3411_SYNC 35A6 38A1
LTC3411_SHDN 35A6 38A1
LTC3411_ITH_RC 35A5 38A1
LTC3411_ITH 35A5 38A1
LTC3411_GND 35A5 38A1
LTC3405_SW 27D4 38B3
LTC1962_L3_VOUT 6B2 38A1
LTC1962_L3_VIN 6B3 38A1
LTC1962_INT_VIN 15D7 38A1
LTC1962_1V5_VOUT 16B2 38A1
LTC1962_1V5_VIN 16B3 38A1
LTC1778_SHDN 20C8
LTC1625_ITH 31D3
LT1962_L3_BYP 6A2
LT1962_L3_ADJ 6B2 39C1
LT1962_INT_BYP 15D6
LT1962_INT_ADJ 15D6
LT1962_1V5__BYP 16B2
LT1962_1V5_ADJ 16B2
LM2594_IN 28D8 38B3
LID_CLOSED_L 23A7 39C4
LEFT_USB_DP 24B2 26A3 37A2 39D1
LEFT_USB_DM 24B2 26B3 37A2 39D1
LED_RX_SPN 27B5
LED_LINK100 27B5
LED_LINK10 27B5
LCD_PWREN_L 22A5
LCD_DIGON_L 22A6
L3_ZQ<1..0> 8D2 8D5
L3_VREF 8B7 8C3 8C6 38D3
L3_PULLDOWN<1..0> 8C3 8C6 8C7
38D3
L3_OVDD 6B1 6D3 8A2 8B5 8B7 8B8 8D1 8D4
L3_ECHO_CLK<3..0> 6B3 8C3 8C6 36C1
L3_DQPD<1..0> 8C1 8C4 8D7
L3_DQPC<1..0> 8C1 8C4 8D7
L3_DQPB<1..0> 8C1 8C4 8D7
L3_DQPA<1..0> 8C1 8C4 8D7
L3_DATA<63..0> 6A6 6B6 6C6 8C1 8C4 8D1 8D4 36C5
L3_CNTL<1..0> 6C3 8C3 8C6 36C5
L3_CLK_REF 8B7 8D1 8D4 38D3
L3_CLK<1..0> 6C3 8D1 8D4 36C1
L3_ADDR<17..0> 6D6 8C3 8C6 8D3 8D6 36C5
KBD_Y<7..0> 23B7 30C6 30D6 39C3 39D3
KBD_X<9..0> 23A5 23B5 23B7 30C6 39A4 39B4 39D3
KBD_SHIFT_L 23A5 23B7 30A8 30C6 39B4
KBD_OPTION_L 23A5 23B7 30A8 30B6 39B4
KBD_NUMLOCK_LED 23B7 39C3
KBD_LED_SET 23A5
KBD_LED_EN 23A5
KBD_LED2_OUT 23A5 23A7 38B6 39C2
KBD_LED1_OUT 23A5 23A7 38B6 39C2
KBD_ID 23A7 23B5 30B6 39C4
KBD_FUNCTION_L 23A5 23A7 30B6 39B4
KBD_CONTROL_L 23A5 23A7 30A8 30C6 39B4
KBD_COMMAND_L 23A5 23A7 30C6 39B4
KBD_CAPSLOCK_LED 23A7 39B4
JTAG_L3_TMS 8C3 8C6 39C8
JTAG_L3_TDO_TP 8C3 39B8
JTAG_L3_TDI_TP 8C6 39C8
JTAG_L3_TCK 8C3 8C6 8C7 39B8
JTAG_L3_SRAM2_TDI 8C3 8C6
JTAG_ENET_TDI 14C5 14D2 27A5
JTAG_CPU_TRST_L 5A3 5B3 23D4 39C8
JTAG_CPU_TMS 5B2 5C3 23C4 39C8
JTAG_CPU_TDO_TP 5C3 39C8
JTAG_CPU_TDI 5B2 5C3 23D4 39C8
JTAG_CPU_TCK 5B2 5C3 23B2 39C8
JTAG_ASIC_TRST_L 14C2 14C5 27A5 39D8
JTAG_ASIC_TMS 14C5 14D2 27A5 39D8
JTAG_ASIC_TDO_TP 27A5 39D8
JTAG_ASIC_TDI 14C5 14D2 39D8
JTAG_ASIC_TCK 14C5 14D2 27A5 39D8
IO_RESET_L 18A7 19B8 26B8 27B8 30C6 30D7
INV_ON_PWM 20C4 22A3
INT_WATCHDOG_L 15A5 30C6
INT_TST_PLLEN_PD 14C5 14D2
INT_TST_MONOUT_TP 14C5
INT_TST_MONIN_PD 14C2 14C5
INT_SUSPEND_REQ_L 9B6 30B6 30C7
INT_SUSPEND_ACK_L 9B6 30B6
INT_SND_TO_AUDIO 15B3
INT_SND_SYNC 15B3
INT_SND_SCLK 15A3
INT_SND_CLKOUT 15A3
INT_ROM_RW_L 13A6 13C7
INT_ROM_OE_L 13A6 13C7
INT_ROM_CS_L 13A6 13C7
INT_RESET_L 10B3 14D3 30C7 30D4
INT_REF_CLK_OUT 15A5 15B7 36C1
INT_REF_CLK_IN 15A5 15B5 36C1
INT_PU_RESET_L 14D3 25C4 25D4 30A2 30C4
INT_PROC_SLEEP_REQ_L 15A5 30B4
INT_PEND_PROC_INT 15A5 30C4
INT_PCI_FB_OUT 13C7 36C1
INT_PCI_FB_IN 13C7 36C1
INT_MOD_SYNC_PD 15A2 15A7
INT_MOD_DTO_PU 15A2 15B7
INT_MOD_DTI_PD 15A2 15A7
INT_MOD_CLKOUT_PU 15A2 15B7
INT_MOD_BITCLK_PD 15A2 15A7
INT_MEM_VREF 10A7 10B6 38C3
INT_MEM_REF_H 10B6 38C3
INT_JTAG_TEI 14C2 14C5
INT_I2C_DATA2 15A2 25C4 25C6 39C6
INT_I2C_DATA1 14B2 14C3 15B7 25B4 39B8
INT_I2C_DATA0 12A3 12A8 14C2 14C3 23D2 23D4 39B8
INT_I2C_CLK2 15A2 25C4 25C6 39C6
INT_I2C_CLK1 14C2 14C3 15B7 25B4 39B8
INT_I2C_CLK0 12A3 12A8 14C2 14C3 23D2 23D4 39B8
INT_GPIO15_PU 15B5 15B7
INT_GPIO12_PU 15B5 15B7
INT_GPIO9_PU 15A7 15B5
INT_GPIO1_PU 15C5 15C7 34C8
INT_EXTINT16_PU 15A7 15B5
INT_EXTINT14_PU 15B5 15C7
INT_EXTINT13_PU 15B5 15B7
INT_EXTINT12_PU 15A7 15B5
INT_EXTINT11_PU 15A7 15B5
INT_EXTINT10_PU 15A7 15B5
INT_EXTINT8_PU 15B5 15C7
INT_EXTINT3_PU 15B5 15B7
INT_ENET_RST_L 15B5 27B8
INT_DDRCLK5_P_TP 10B6
INT_DDRCLK5_N_TP 10B6
INT_DDRCLK2_P_TP 10B6
INT_DDRCLK2_N_TP 10B6
INT_CPUFB_OUT_SHORT 9A5 36D1
INT_CPUFB_OUT_NORM 9A4 36D1
INT_CPUFB_OUT 9A6 36D1
INT_CPUFB_LONG 9A4 36D1
INT_CPUFB_IN_NORM 9A4 36D1
INT_CPUFB_IN 9A6 9B6 36D1
INT_AUDIO_TO_SND 15B2 25C6 39C6
INT_AGP_VREF 13B4 13D4 38C3
INT_AGP_FB_OUT 13C4 36C1
INT_AGP_FB_IN 13C4 36C1
INT_AGPPVT 13D4
INTREPID_ACS_REF 9A6
IAC_RC_COMP 31D4
IAC_FB 31D4
HP_CONTROL 25C5
HPD_PWR_SW 22C2
HPD_PWR_SNS_EN 20C4 22C3
HPD_ON_RC 22C2
HPD_ON 22C2
HPD_BASE 22C1
HPD_4V_REF 22C3
HIGH_VCORE 20B5
HD_RESET_L 24A3 24D2 37B5
HD_IOCHRDY 24A3 24C1 37B5
HD_INTRQ 14C6 24C1 37B5
HD_DMARQ 14C6 24C2 37B5
HD_DMACK_L 24A3 24C2 37B5
HD_DIOW_L 24A3 24C1 37B5
HD_DIOR_L 24A3 24C2 37B5
37C5
HD_DATA<15..0> 24B3 24C1 24C2 24C3 24D1 24D2 24D3
HD_CS1_L 24B3 24C1 37B5
HD_CS0_L 24C2 24C3 37B5
HD_ADDR<2..0> 24B3 24C1 24C2 24C3 37C5
GPU_Y 21C6 22B8
GPU_XOR_TESTMODE_ENABLE 20A4
GPU_VSYNC 21D5
GPU_VIPHTCL_TP 19C2
GPU_VIPHCLK_TP 19C2
GPU_VIPHAD1_TP 19C2
GPU_VIPHAD0_TP 19C2
GPU_VIPD7_TP 19C2
GPU_VIPD6_CRYSTAL<1..1> 19C2 21B8
GPU_VIPD5_PCI_DEVID<1..1> 19C2 21A8
GPU_VIPD4_PCI_DEVID<0..0> 19C2 21A8
GPU_VIPD3_PCI_DEVID<2..2> 19C2 21A8
GPU_VIPD2_ROMTYPE<1..1> 19C2 21A8
GPU_VIPD1_TP 19C2
GPU_VIPD0_TP 19C2
GPU_VCORE_SW 20C6 38B1
GPU_VCORE_SEQ_L 20D8
GPU_VCORE_SEQ 20D8
GPU_VCORE_PWR_SEQ 20D8
GPU_VCORE_CNTL_L_RC 20B6
GPU_VCORE_CNTL_L 20B6 20C4
GPU_VCORE 20C5 20D6 38C3 39B2
GPU_TV_GND2 22A8 38B6
GPU_TV_GND1 22B8 38B6
GPU_TMDS_DP<2..0> 20B2 21A1 21B2
GPU_TMDS_DN<2..0> 20B2 21A1 21B2
GPU_TMDS_CLKP 20B2 21A1 21B2
GPU_TMDS_CLKN 20B2 21A1 21B2
GPU_THERMDC_TP 21C4
GPU_THERMDA_TP 21C4
GPU_SUS_STAT_L_PU 20C4
GPU_SSCLK_UF 21A3 36C1
GPU_SSCLK_S1 20C4 21A5
GPU_SSCLK_S0 20C4 21A5
GPU_SSCLK_IN 21A3 21B4 36B1
GPU_R_FILTR 22D8
GPU_RSET2 21C6
GPU_RSET1 21C5
GPU_ROMCS_TP 19B4
GPU_ROMA15_TP 19B4
GPU_ROMA14_TP 19B4
GPU_R 21C5 22D8
GPU_MSTRAPSEL<3..0> 21B8 21C4
GPU_IFP1VREF 20A2
GPU_IFP1RSET 20A3
GPU_IFP0VREF 20A4
GPU_IFP0RSET 20A4
GPU_I2C1SDA 20C2
GPU_I2C1SCL 20C2
GPU_HSYNC 21D5
GPU_HPD 20C4 22C3
GPU_G_FILTR 22D8
GPU_GPIO9 20C4
GPU_GPIO8 20C4
GPU_G 21C5 22D8
GPU_FB_VREF 19B4 38C3
GPU_FBCLK1_L 19A5 19B4 36B1
GPU_FBCLK1 19A5 19B4 36B1
GPU_FBCLK0_L 19A5 19B4 36B1
GPU_FBCLK0 19B5 19C4 36B1
GPU_FBACKE 19B4
GPU_FBACAS_TP 21B6
GPU_DVO_VSYNC 21C3 21C6 37C5
GPU_DVO_VREF 21C6 21C7
GPU_DVO_HSYNC 21A8 21C3 21C6 37C5
GPU_DVO_DE 21C3 21C6
GPU_DVO_CLKP 21B3 21C6 36B1
GPU_DVO_CLKN_TP 21C6
GPU_DVO_CLKIN 21C6 21C8
GPU_DVOD<11..0> 21A8 21B6 21B8 21C3 21C6 37D5
GPU_DVI_DDC_DATA 20C2 22C3
GPU_DVI_DDC_CLK 20C2 22D3
GPU_DACVREF2 21C6
GPU_DACVREF1 21C5
GPU_CRT2VSYNC_TP 21D6
GPU_CRT2HSYNC_TP 21D6
GPU_COMP 21C6 22A8
GPU_CLK27M_UF 21B4 36C1
GPU_CLK27M_OUT 21A4 21B3 36C1
GPU_C 21C6 22B8
GPU_B_FILTR 22D8
GPU_BUFRST_TP 20B2
GPU_B 21C5 22D8
GPU_AGP_VREF 19A7 19C5 38C3
GAIN_SETTING2 23C7
FW_XI 28A5 36A1
FW_VREG_PD 28A7
FW_VGND1 29A3 38A3
FW_VGND0 29C2 38A3
FW_TPO1P 29A3 37C2 39D2
FW_TPO1N 29A3 37C2 39D2
FW_TPO0R 29C2 38A3 39A3
FW_TPO0P 37C2
FW_TPO0N 37C2
FW_TPI1P 29A3 37C2 39D2
FW_TPI1N 29A3 37C2 39D2
FW_TPI0P 37C2
FW_TPI0N 37C2
FW_TPB2_PD 28A5
FW_TPB1P 28A5 29A4 37C2
FW_TPB1N 28A5 29A4 37C2
FW_TPB0P 28B1 29C4 37D2
FW_TPB0N 28B1 29C4 37D2
FW_TPA1P 28B5 29A4 37C2
FW_TPA1N 28B5 29A4 37C2
FW_TPA0P 28B5 29C4 37D2
FW_TPA0N 28B5 29C4 37D2
FW_TESTM 28A7
FW_R1 28A5
FW_R0 28A5
FW_PWR_GATE 29D6
FW_PWREN_L 29C6
FW_PORT1_SEL 28C5
FW_PLL_ADJ 28C7
FW_PINT 14C3 28B5 37A5
FW_PHY_RESET_L 28A7
FW_PHY_PD 15C5 28B7
FW_PHY_LREQ 14C2 28B7 37A5
FW_PHY_LPS 14C3 28B7
FW_PHY_DATA<7..0> 28A7 28B7 37A5
FW_PHY_CNTL<1..0> 28B5 28C4 37A5
FW_PC_PU 28B7
FW_PC_PD 28B7
FW_OSC_EN 28A3
FW_OSC 28A4 36A1
FW_LKON 14C3 28B5
FW_LINK_LREQ 14C3 37A5
FW_LINK_DATA<7..0> 14C3 14D3 28A8 28B8 37A5
FW_LINK_CNTL<1..0> 14C3 28C3 37A5
FW_INPUT_PD 28A7
FW_CPS 28B7
FW_CORE_BYP 28C7
FW_CORE_ADJ 28C7
FW_BMODE 28B7
FW_BIAS1 28A5
FW_BIAS0 28A5
FWPLL_BYP 28C8
FWB_TPB1 28A4
FWB_TPB0 28A3
FP_PWR_EN_L 22B3
FP_PWR_EN 20C4 22A6 22B3
FB_4_85V_BU 32A5
FAN2_TACH 25A4 25B3 39B3
FAN2_PWM 25A4 25B3
FAN2_GND 25A4 38B6 39B3
FAN1_TACH 25B3 39B3
FAN1_PWM 25B3
FAN1_GND 25B3 38B6 39B3
ENET_VSSC 27A7
ENET_RX_ER 14C5 27B7 37A5
ENET_RX_DV 14D5 27B7 37A5
ENET_RST_L 27B7
ENET_RSET 27A5
ENET_PHY_TX_ER 14D6 27C7 37A5
ENET_PHY_TX_EN 14D6 27C7 37A5
ENET_PHY_TXD<7..0> 14A5 14B5 27C7 37A5
ENET_MDIO 14C5 27B7 37A5
ENET_MDC 14C5 27B7 37A5
ENET_LINK_TX_ER 14D5 37A5
ENET_LINK_TX_EN 14D5 37A5
ENET_LINK_TXD<7..0> 14A4 14B4 14D5 37A5
ENET_LINK_RXD<7..0> 14C5 27B7 27C7 37A5
ENET_HSDACP 27A7
ENET_HSDACM 27A7
ENET_ENERGY_DET 15B5 27B7
ENET_CTAP_CHGND 27A1 38A6
ENET_CRS 14C5 27B7 37A5
ENET_COMA 27B7
ENET_COL 14C5 27B7 37A5
EIDE_WR_L 14A7 24A8 37B5
EIDE_RST_L 14B7 24A8 37B5
EIDE_RD_L 14A7 24A8 37B5
EIDE_OPTICAL_WR_L 24A5 24A7 37A5 39D4
EIDE_OPTICAL_RST_L 24A7 24B5 37A5 39D4
EIDE_OPTICAL_RD_L 24A6 24A7 37B5 39A4
EIDE_OPTICAL_IOCHRDY 24A5 24A7 37A5 39D4
EIDE_OPTICAL_INT 24A5 24A7 37A5 39D4
EIDE_OPTICAL_DMA_RQ 24A6 24B7 37A5 39A4
EIDE_OPTICAL_DMAACK_L 24A6 24A7 37A5 39A4
37B5 39B4 39C4
EIDE_OPTICAL_DATA<15..0> 24A5 24A6 24B7 24C7 24D7
EIDE_OPTICAL_CS1_L 24A6 24B7 37B5 39D4
EIDE_OPTICAL_CS0_L 24A5 24B7 37B5 39D4
EIDE_OPTICAL_ADDR<2..0> 24A5 24A6 24B7 37B5 39A4
EIDE_IOCHRDY 14B7 24A8 37B5
EIDE_INT 14A7 24A8 37B5
EIDE_DMARQ 14A7 24B8 37B5
EIDE_DMACK_L 14A7 24A8 37B5
EIDE_DATA<15..0> 14B7 14C7 24B8 24C8 24D8 37B5
EIDE_CS1_L 14B7 24B8 37B5
EIDE_CS0_L 14B7 24B8 37B5
EIDE_ADDR<2..0> 14B7 24B8 37B5
EEPROM_WP_PD 23D3
EEPROM_ADDR 23D4
DVI_TURN_ON_BASE 22D2
DVI_TURN_ON 22D3
DVI_TRUN_ON_ILIM 22D2
DVI_HPD_UF 22C3 22C5 39C7
DVI_HPD_DIV 22C3
DVI_HPD 22C4
DVI_DDC_DATA_UF 22C5 39C7
DVI_DDC_DATA 22C4
DVI_DDC_CLK_UF 22C5 22D3 39C7
DVI_DDC_CLK 22D4
DDR_VREF 12D1 12D3 12D5 12D6 12D8 38D3
DDC_CLK_ISO 22D4
DCDC_EN_L 20C8 33B6 35C7
DCDC_EN 20D6 29C7 32B7 33B5 34C8 39C1
CY25811_S1 21A4
CY25811_S0 21A4
CURRENT_THRESHOLD 31C4
CSLOT_WE_L_SPN 14C7
CSLOT_OE_L_SPN 14C7
CSLOT_IOWR_L_SPN 14C7
CSLOT_IOWAIT_L_PU 14C7
CSLOT_IORD_L_SPN 14C7
CSLOT_CE2_L_SPN 14C7
CSLOT_CE1_L_SPN 14C7
CSLOT_ADDR9_SPN 14B7
CSLOT_ADDR8_SPN 14B7
CSLOT_ADDR7_SPN 14B7
CSLOT_ADDR6_SPN 14B7
CSLOT_ADDR5_SPN 14B7
CSLOT_ADDR4_SPN 14B7
CSLOT_ADDR3_SPN 14B7
CPU_WT_L 5A7 9B6 36C5
CPU_VCORE_SNUB 34B3
CPU_VCORE_SLEEP 5D3 5D8 34C1 34D2 38D3 39B2
CPU_VCORE_SEQ_L 34D8
CPU_VCORE_SEQ 34D8
CPU_VCORE_PWR_SEQ 34D8
CPU_VCORE_HI_OC 7B8 30D4 34C8 34D7
CPU_TT<4..0> 5A7 9B6 36C5
CPU_TS_L 5C7 9D2 9D6 36D5
CPU_TSIZ<2..0> 5A7 9B6 36D5
CPU_TEA_L 5B3 9A4 9C2 36D5
CPU_TBST_L 5A7 9B6 36D5
CPU_TBEN 5B3 5D2 9A6
CPU_TA_L 5B3 9A4 9D2 36D5
CPU_SRWX_L 5A3 5C2
CPU_SRESET_L 5B2 5B3 39C8
CPU_SMI_L 5B3 5C2 30C4
CPU_SHD1_L 5A7 5D2
CPU_SHD0_L 5A7 5D2
CPU_QREQ_L 5B3 9B6 9C2 36D5
CPU_QACK_L 5B3 9B6 36D5
CPU_PULLUP 5A3 5C2
CPU_PULLDOWN 5A2 5A3 5C7
CPU_PMONIN_L 5B3 5C2
CPU_PLL_STOP_OC 7C8 30B6
CPU_PLL_STOP_BASE 7C7
CPU_PLL_FS10 7C4
CPU_PLL_FS01 7C3
CPU_PLL_FS00 7C3
CPU_PLL_CFGEXT 5C3 7D3
CPU_PLL_CFG<3..0> 5C3 7D3
CPU_MCP_L 5B3 5D2
CPU_LSSD_MODE 5B3 5C2
CPU_L3_VSEL 6C3 7A7
CPU_L2TSTCLK 5B3 5C2
CPU_L1TSTCLK 5B2 5B3
CPU_HRESET_L 5B3 5C2 7A5 7A8 7B4 23A2 39C8
CPU_HRESET_INV 7A5 7A7 7B5
CPU_HIT_L 5A7 9B6 9D2 36D5
CPU_GBL_L 5A7 9B6 36D5
CPU_EMODE1_L 5A3 5C2
CPU_EMODE0_L 5A3 7B5
CPU_EDTI 5B2 5C3
CPU_DTI<2..0> 5C3 9A4 36D5
CPU_DRDY_L_UF 5C4 36D5
CPU_DRDY_L 5C2 9A4 9C2 36D5
CPU_DBG_L 5C3 9A4 9C2 36D5
9C8 9D4 9D8 36D5
CPU_DATA<63..0> 6A8 6B8 6C8 6D8 9A8 9B3 9B4 9B8 9C4
CPU_CLK_EN 9A6 30C4
CPU_CLKOUT_SPN 5C3
CPU_CI_L 5A7 9B6 36D5
CPU_CHKS_L 5B3 5D2
CPU_CHKSTP_OUT_L 5B3 5C2 39D8
CPU_BUS_VSEL 5C3 7B7
CPU_BR_L 5C7 9D2 9D6 36D5
CPU_BG_L 5C7 9C2 9D6 36D5
CPU_AVDD 5D4 38D3
CPU_ARTRY_L 5A7 9B6 9D2 36D5
CPU_ADDR<31..0> 5B7 5C7 9B6 9C6 9D6 36D5
CPU_AACK_L 5A7 9B6 9C2 36D5
COMP_RC 32C6
COMP_ENABLE 22C1
COMP_DISABLE 22C2
COMM_TXD_L 15C2 25D2 39C2
COMM_TRXC 15C2 25D2 39C2
COMM_SHUTDOWN 15C5 25C3 39C4
COMM_RXD 15C2 25D1 39B2
COMM_RTS_L 15C2 25D1 39B2
COMM_RING_DET_L 15B5 15C7 25C4 30C6 39C4
COMM_RESET_L 15C5 25C3 39C4
COMM_GPIO_L 15C2 25D2 39C2
COMM_DTR_L 15C2 25D1 39B2
CLKLVDS_UP 20B2 22A4 37C2 39A7
CLKLVDS_UN 20B2 22A4 37C2 39B7
CLKLVDS_LP 20C2 22A4 37C2 39B7
CLKLVDS_LN 20C2 22A4 37C2 39B7
CLKFW_PHY_PCLK 28B5 28C4 36A1
CLKFW_PHY_LCLK 14C2 28B7 36A1
CLKFW_LINK_PCLK 14C3 28C3 36A1
CLKFW_LINK_LCLK 14C3 36A1
CLKENET_PHY_TX 27D7 36B1
CLKENET_PHY_RX 27C7 36B1
CLKENET_PHY_GTX 14C6 27C7 36A1
CLKENET_PHY_GBE_REF 27C7 36B1
CLKENET_LINK_TX 14D5 27D8 36A1
CLKENET_LINK_RX 14D5 27C8 36B1
CLKENET_LINK_GTX 14C5 36A1
CLKENET_LINK_GBE_REF 14C5 27C8 36B1
CLK66M_GPU_AGP_UF 13C7 36C1
CLK66M_GPU_AGP 13C8 19B7 36C1
CLK66M_AGP_15V_TP 13C4
CLK33M_USB2_UF 13C7 36C1
CLK33M_USB2 13C8 26B7 36C1
CLK33M_CBUS_UF 13C7 36C1
CLK33M_CBUS 13D8 18A7 36C1
CLK33M_AIRPORT_UF 13C7 36C1
CLK33M_AIRPORT 13D8 24D5 36C1 39B1
CLK32K_PMU_XOUT_UF 30B2
CLK32K_PMU_XOUT 30B3
CLK32K_PMU_XIN 30B3
CLK27M_XTAL_IN 21B4 36B1
CLK27M_GPU_XOUT 21B4 36B1
CLK27M_GPU_XIN 21B4 36B1
CLK25M_XTAL_IN 27A7
CLK25M_ENET_XOUT 27A7 36B1
CLK25M_ENET_XIN 27A7 36B1
CLK18M_XTAL_IN 15A5 36B1
CLK18M_INT_XOUT 15A5 36B1
CLK18M_INT_XIN 15A5 36B1
CLK18M_INT_EXT 15A6 36B1
CLK10M_PMU_XOUT_UF 30B7
CLK10M_PMU_XOUT 30B6
CLK10M_PMU_XIN 30B6
CHGND6 38A6
CHGND5 38A6
CHGND4 38A6
CHGND3 38A6
CHGND2 38A6
CHGND1 38A6
CHARGE_LED_L 30C6 30D7 31D8 39D2
CHARGE_DISABLE 31A7
CG_RESET_L 15B7
CG_LOCK 15B7
CG_FSEL 15B7 15C5
CG_CLKOUT 15B6
CG_ADDRSEL 15B7
CBUS_WP_L 18A1 18B4
CBUS_WE_L 18B1 18C4
CBUS_WAIT_L 18B2 18B4
CBUS_VS2 18B2 18C4
CBUS_VS1 18B2 18C4
CBUS_VPPD1 18C5
CBUS_VPPD0 18C4
CBUS_VCCD1_L 18C4
CBUS_VCCD0_L 18C4
CBUS_SUSPEND_PU 18A7 18D7
CBUS_RESET_L 18B2 18C4
CBUS_REG_L 18B2 18C4
CBUS_READY 18B1 18C4
CBUS_PCI_SERR_L 18B7 18D7
CBUS_PCI_RESET_L 18A7
CBUS_PCI_REQ_L 13A7 13D7 18A7
CBUS_PCI_PERR_L 18B7 18D7
CBUS_PCI_IDSEL 18B7
CBUS_PCI_GNT_L 13D7 18A7
CBUS_OE_L 18C1 18C4
CBUS_MFUNC6_PD 18A7
CBUS_MFUNC5_PD 18A7
CBUS_MFUNC4_PD 18A7
CBUS_MFUNC3_PD 18A7
CBUS_MFUNC2_PD 18A7
CBUS_MFUNC1_PD 18A7
CBUS_IOWR_L 18B2 18C4
CBUS_IORD_L 18B2 18C4
CBUS_INT_L 15B5 15B7 18A7
CBUS_INPACK_L 18B2 18B4
CBUS_DET_2_L 18A2 18C4 39B8
CBUS_DET_1_L 18C2 18C4 39B8
CBUS_DATA<15..0> 18A1 18A2 18A4 18C1 18C2
CBUS_CE2_L 18B4 18C2
CBUS_CE1_L 18C1 18C4
CBUS_BVD2_L 18B2 18C4
CBUS_BVD1_L 18B2 18C4
CBUS_ADDR_16_UF 18B5
CBUS_ADDR<25..0> 18A4 18B1 18B2 18B4 18C1
CAPSLOCK_LED_L 23B8 30C7
CAPSLOCK_LED 23A8
BT_USB_DP 15C1 24B2 37B2 39B6
BT_USB_DM 15C1 24B2 37B2 39B6
BRIGHT_PWM_UF 22A2
BRIGHT_PWM 22A1 39A7
BCKFD_PROT_GATE 31D6
BCKFD_PROT_EN_L 31C6
BBANG_TCK_EN 23B3
BBANG_JTAG_TCK 23B3 23C4
BBANG_HRESET_L 23A4 23C4 39C1
BATT_NEG 31A4 38C6 39C3
BATT_LOW_L 31B6
BATT_LOW 31A6
BATT_DIV 31A5
BATT_DATA 31A4 39C3
BATT_CLK 31A4 39C3
BATT_24V_GATE 31C2
BATT_24PBUS_EN 31C2
BATT_14V_GATE 31C1
BATT_14PBUS_EN 31C1
BATTV_LOW 31B8
BATTV_HIGH 31B7
AMP_CONTROL 25D5
AIRPORT_PME_L_TP 24D5
AIRPORT_PCI_REQ_L 13A7 13D7 24D6 39D4
AIRPORT_PCI_INT_L 15B5 15D7 24D5 39C4
AIRPORT_PCI_GNT_L 13D7 24D5 39C4
AIRPORT_IDSEL 24C5 39B1
AIRPORT_CLKRUN_L 24C6 39C1
AGP_WBF_L 13A4 13B2 19B8
AGP_TRDY_L 13B2 13C2 19B7 37D5
AGP_STOP_L 13B2 13C2 19B7 37D5
AGP_ST<2..0> 13A2 19B7
AGP_SB_STB_L 13A2 19A7 37D5
AGP_SB_STB 13B2 19A7 37D5
AGP_SBA<7..0> 13B2 19A7 37D5
AGP_REQ_L 13C2 13D2 19B7 37D5
AGP_RBF_L 13A2 13C2 19B7 37D5
AGP_PIPE_L 13A2 13B2 19B8
AGP_PAR 13B2 19B7 37D5
AGP_NV_WBF_L 19B7
AGP_NV_PIPE_L 19B7
AGP_NV_INT_L 15B5 19B7
AGP_IRDY_L 13B2 13C2 19B7 37D5
AGP_GPU_RESET_L 19B7
AGP_GNT_L 13C2 13D2 19B7 37D5
AGP_FRAME_L 13B2 13C2 19B7 37D5
AGP_DEVSEL_L 13B2 13C2 19B7 37D5
AGP_CBE<3..0> 13B2 19B7 19C7 37D5
AGP_CAL_PU 19A7
AGP_CAL_PD 19A7
AGP_BUSY_L 13C4 13D2 19A7
AGP_AD_STB_L<1..0> 13A2 13B2 19A7 37D5
AGP_AD_STB<1..0> 13A2 13B2 19A7 19B7 37D5
AGP_AD<31..0> 13B2 13C2 13D2 19C7 19D7 37D5
ADAPTER_I_REG 31D3
ADAPTER_DET 30A4 31D8 39C2
AC_IN_L_RC 31C2
AC_IN_L 31C2 31C6
AC_IN_FW_CNTL 29C7
AC_IN 27B8 29C7 30B3 31C5 31C7
AC_GTR_18V 31C4
AC_ENABLE_L 31C6
AC_ENABLE_GATE 31D6
AC_DIV 31C8
A29_DET_L 30A3
A29_DETECT 30A2 31A5 31C4
A29_CURRENT_ADJ 31C4
A29_CLS_ADJ 31A5
3707_STBY 33C5
3707_SGND 33B5 38D1
3707_INTVCC 33D4 38D1
3707_FSET 33C5
3707_FCB 33C5
3405_VFB 27D4
3405_MODE 27D5
1778_VRNG 20B7 38B1
1778_VIN 20C7 38B1
1778_VFB 20B7 38B1
1778_VCC 20C7 38B1
1778_TG 20B7 38B1
1778_SHDN_L_D3COLD 20D7
1778_SHDN_L 20B7
1778_ITH_RC 20B8 38B1
1778_ITH 20B7 38B1
1778_ION 20B7 38B1
1778_GND 20B6 20B8 38B1
1778_FCB 20B7 38B1
1778_BST_RC 20C6 38B1
1778_BST 20B7 38B1
1778_BG 20B7 38B1
1772_VCTL 31B5
1772_REF 31B5
1772_LX 31B4 38C6
1772_LDO 31C4 38C6
1772_IINP 31B5
1772_ICTL 31B5
1772_ICHG 31B5
1772_GND 31A5 38C6
1772_DLOV 31B4 38C6
1772_DLO 31B4
1772_DHI 31B4
1772_DCIN 31B5 38C6
1772_CSSP 31C5 37A2
1772_CSSN 31C5 37A2
1772_CSIP 31B4 37A2
1772_CSIN 31B4 37A2
1772_CLS 31A4
1772_CELLS 31B4
1772_CCV_RC 31B5
1772_CCV 31B5
1772_CCS 31B5
1772_CCI 31B5
1772_BST_ESR 31C3
1772_BST 31B4
1772_ACOK_L 31B5 31C4
1772_ACIN 31B5
1625_VSW 32C4 38D1
1625_VIN 32C6 38D1
1625_VFB 32B5
1625_TG 32C5
1625_SGND 32B7 38D1
1625_RUNSS 32C6
1625_INTVCC 32C5 38D1
1625_FCB 32C6
1625_EXTVCC 32D5 38D1
1625_ENABLE_L 32D6
1625_ENABLE 32D7
1625_DIV 32C8
1625_COMP 31D2 32C6
1625_BST_ESR 32C5
1625_BST 32C5
1625_BG 32C5
5V_VOSNS 33C5
5V_TG 33C5
5V_SW 33C5 38D1
5V_SNSP 33C5 37A2
5V_SNSM 33C5 37A2
5V_SND_PWREN 25D8
5V_SLEEP_PWREN 33A8
5V_RUNSS 33C5
5V_RSNS 33D7 38D1
5V_ITH_RC 33C6
5V_ITH 33C5
5V_HD_PWREN 33A8
5V_BOOST_ESR 33D6
5V_BOOST 33C5
5V_BG 33C5
3V_VOSNS 33C4
3V_TG 33D4
3V_SW 33C4 38D1
3V_SNSP 33C4 37A2
3V_SNSM 33C4 37A2
3V_SLEEP_PWREN_L 33A3
3V_RUNSS 33C4
3V_RSNS 33D2 38D1
3V_PMU_VTAP 32B3
3V_ITH_RC 33C3
3V_ITH 33C4
3V_BOOST_ESR 33D3
3V_BOOST 33C4
3V_BG 33C4
3V_5V_OK 33B4 35D6
2_34V_REF 30A4
2_8V_BYP 20A8
2_8V_ADJ1 20A7
2_5V_SLEEP_PWREN_L 35C2
2_5V_LX 35B4 38D1
2_5V_ILIM 35C5 38C1
2_5V_DL 35B4 38D1
2_5V_DH 35C4 38D1
2_5V_BST 35C4 38D1
2_5V_BOOST 35C4 38D1
1_8V_VFB 35A5 38A1
1_8V_SW 35A5 38A1
1_8V_SLEEP_PWREN_L 35A3
1_5V_LX 35B5 38C1
1_5V_ILIM 35C5 38C1
1_5V_FB 35B5 35B7 38C1
1_5V_DL 35B5 38C1
1_5V_DH 35C5 38C1
1_5V_BST 35C5 38C1
1_5V_BOOST 35C6 38C1
1_5V_2_5V_OK 20C8 35C5 38B1
1V65_REF 31A5
1V20_REF 31C7 32C8 38D1
+VPP_CBUS_SW 18B1 18B2 18D2 38C3
+VCC_CBUS_SW 18B1 18B2 18D2 38C3
+PBUS 38D6 39B2
+HD_LOGIC_SLEEP 24C2 38C6
+FW_VP1 29A3 38B3
+FW_VP0 29C2 38B3
+FW_SW 29D5 38B3
+FW_PWR_PORTA 29C5 38B3
+FW_PWR_OR 28B8 28D8 29D5 38B3
+FW_FUSE 29D7 38B3
+BATT_VSNS 31A4 38C6
+BATT_RSNS 31B2 38C6
+BATT_POS 31A4 38C6 39C3
+BATT_24V_FUSE 31B1 31D2 38C6
+BATT_14V_FUSE 31D1 38C6
+BATT 38D6
+ADAPTER_SW 31D6 38C6
+ADAPTER_SENSE 31D5 38C6
+ADAPTER_OR_BATT 32A5 38C6
+ADAPTER_ILIM 32B6 38C6
+ADAPTER 31D8 32B7 38D6
+24V_PBUS 38D6 39B2
+12_8V_INV 22B1 38B6 39A2
+5V_TPAD_SLEEP 23C7 38B6 39C4
+5V_SOUND_SLEEP 25C5 25D6 38B6
+5V_SLEEP 38D6
+5V_MAIN 38D6
+5V_INV_UF_SW 22B2 38B6
+5V_INV_SW 22B1 38B6 39D1
+5V_HD_SLEEP 24D1 33A7 38C6
+5V_DDC_SLEEP_UF 22D6 38B6
+5V_DDC_SLEEP 22D3 22D5 38B6 39A2
+4_85V_RAW 30B4 32A4 38C6
+4_85V_ESR 32A4 38C6
+4_6V_BU 32A3 33B5 38C6
+3V_SLEEP 38D6
+3V_SI_VCC 21D2 38B3
+3V_SI_PLLVCC 21D2 38B3
+3V_SI_AVCC 21D2 38B3
+3V_PMU_RESET 30B7 34A4
+3V_PMU_ESR 32A2 38C6
+3V_PMU_AVCC 30B1 30B6 30D5 38C6
+3V_PMU 38D6 39A2
+3V_NEC_VDD 26D7 38A3
+3V_MAIN 38D6
+3V_LCD_SW 22A4 38B6
+3V_LCD 22B4 38B6
+3V_INTREPID_USB 15C3 38D3
+3V_HALL_EFFECT 23C6 38B6 39C4
+3V_GPU_SS 21A4 38C3
+3V_GPU_PLLVDD 21D6 38C3
+3V_GPU_DVO 21B6 38C3
+3V_GPU_AVDD1 20B2 38C3
+3V_GPU_AVDD0 20B4 38C3
21D7 38C3
20D2 21B8 21C7 21C8 21D1 21D3 21D6
+3V_GPU 13D1 15C5 19A4 20A8 20B2 20B4 20C4
+3V_FW_UF 28D7 38B3
+3V_FW_ESD_ILIM 29D4 38B3
+3V_FW_ESD 29B3 29D2 38B3
+3V_FW_AVDD_PORT2 28D6 38B3
+3V_FW_AVDD_PORT1 28C6 38B3
+3V_FW_AVDD_PORT0 28C6 38B3
+3V_FW_AVDD 28C6 38A3
+3V_FW 28A3 28D7 29D5 38B3
+3V_DAC2VDD 21D7 38C3
+3V_DAC1VDD 21D4 38C3
+3V_CG_PLL_MAIN 15C6 38A3
+2_8V_IFP_PLLVDD 20A2 20A4 20A5 38C3
+2_5V_SLEEP 16D7 38D6
+2_5V_MARVELL_AVDD 27C4 38B3
+2_5V_MARVELL 27B8 27C4 38B3
+2_5V_MAIN 38D6
38D3
+2_5V_INTREPID 10A8 11D3 11D5 11D6 11D8 16D7 17B8
38C3
+2_5V_GPU_FB 19A4 19A5 19B4 19B5 19C2 19D2 19D5
+2_5V_CG_MAIN 15C6 38A3
+1_95V_FW_PLLVDD 28D5 28D7 38A3
+1_95V_FW_PLL500VDD 28D5 38A3
+1_95V_FW_PLL400VDD 28D5 38A3
+1_95V_FW_DVDD_TX0 28C5 38A3
+1_95V_FW_DVDD_RX0 28C5 38A3
+1_95V_FW_DVDD_PORT1 28D6 38A3
+1_95V_FW_DVDD 28C4 28C7 28D5 38A3
+1_8V_SLEEP 38D6
+1_8V_MAIN 38D6 39A2
+1_5V_SLEEP_VIN 35D8 38D6
+1_5V_SLEEP 38D6
+1_5V_MAIN 38D6
+1_5V_LDO 16B1 19A3 35D8 38D6
+1_5V_INTREPID_PLL8 15D3 38C3
+1_5V_INTREPID_PLL7 9D5 38D3
+1_5V_INTREPID_PLL6 13D6 38D3
+1_5V_INTREPID_PLL5 13D3 38D3
+1_5V_INTREPID_PLL4 15D3 38D3
+1_5V_INTREPID_PLL3 15D3 38D3
+1_5V_INTREPID_PLL2 15D3 38D3
+1_5V_INTREPID_PLL1 15C3 38D3
+1_5V_INTREPID_PLL 9D6 13D4 13D8 15D6 38D3
19C6 19D5 20D8 38C3
+1_5V_AGP 13C5 13D1 13D4 16D5 17C8 19A2 19A8
+1_0V_MARVELL 27D2 38B3
--- for the entire design --
*** Signal Cross-Reference ***
CR-41
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 42 44
A051-6278
VIPPCLK_PD 19C2
VGA_VSYNC 21D4 22C5 39D7
VGA_R 22C5 22D7 39D7
VGA_HSYNC 21D4 22C6 39D7
VGA_G 22C5 22D7 39D7
VGA_B 22C6 22D7 39D7
VCORE_VID<4..0> 34A3 34B8 34D4
VCORE_VGATE 15B5 15B7 34B4 38B1
VCORE_VCC 34C6 38C1
VCORE_TON 34B6 38C1
VCORE_TIME 34B4 38B1
VCORE_SNS 34A1 38B1
VCORE_SLOW<4..1> 34D6
VCORE_SHDN_L 34C6
VCORE_REF 34B6 38C1
VCORE_MUX_SEL 34D5
VCORE_MUX_EN 34D5
VCORE_LX 34B5 38C1
VCORE_ILIM 34C6 38C1
VCORE_GNDSNS_TEST 34A4
VCORE_GNDSNS 34A1 34A5 38B1
VCORE_GNDDIV_TEST 34A4
VCORE_GNDDIV 34A5 34B5 38B1
VCORE_GNDA 34B6
VCORE_GND 34B5 38B1
VCORE_FB 34B5 38B1 39A2
VCORE_FAST<4..1> 34D2 34D3 34D5
VCORE_DL 34B5 38C1
VCORE_DH 34B5 38C1
VCORE_CC 34B6 38B1
VCORE_BST 34C5 38C1
VCORE_BOOST 34C4 38C1
USB_PWREN_EF_L 15B2 15D7
USB_PWREN_CD_L 15B2 15C7
USB_PWREN_AB_L 15B2 15C7
USB_OC_EF_L 15B2 15C7
USB_OC_CD_L 15B2 15C7
USB_OC_AB_L 15B2 15C7
USB_DFP 15B2 37B2
USB_DFM 15B2 37B2
USB_DEP 15B2 15C2 37B2
USB_DEM 15B2 15C2 37B2
CR-42
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 43 44
A051-6278
R105 RES 14C3
R104 RES 9A6
R103 RES 9C7
R102 RES 9C8
R101 RES 9B7
R100 RES 9B2
R99 RES 19B8
R98 RES 9A6
R97 RES 9C8
R96 RES 9D8
R95 RES 9C7
R94 RES 9B8
R93 RES 9B2
R92 RES 9B2
R91 RES 5A1
R90 RES 5D1
R89 RES 15D4
R88 RES 14C5
R87 RES 9D7
R86 RES 9C8
R85 RES 9B8
R84 RES 5C1
R83 RES 19B6
R82 RES 19B5
R81 RES 24B7
R80 RES 15B1
R79 RES 15B1
R78 RES 15D8
R77 RES 13D7
R76 RES 15A8
R75 RES 35A6
R74 RES 5C1
R73 RES 5D1
R72 RES 19B6
R71 RES 13B5
R70 RES 15A2
R69 RES 24C1
R68 RES 15B6
R67 RES 35A6
R66 RES 5D1
R65 RES 5B1
R64 RES 24A8
R63 RES 24A3
R62 RES 24A3
R61 RES 14C7
R60 RES 15B1
R59 RES 15B2
R58 RES 15D1
R57 RES 35A6
R56 RES 5C1
R55 RES 5C1
R54 RES 13A5
R53 RES 24A8
R52 RES 15D2
R51 RES 5C3
R50 RES 5D6
R49 RES 13A5
R48 RES 24A7
R47 RES 24B3
R46 RES 24A3
R45 RES 15C2
R44 RES 5C1
R43 RES 24A2
R42 RES 24A7
R41 RES 24A3
R40 RES 35A6
R39 RES 5D1
R38 RES 5C1
R37 RES 5C1
R36 RES 24A1
R35 RES 19B4
R34 RES 24A4
R33 RES 23B3
R32 RES 5B1
R31 RES 19C2
R30 RES 19B2
R29 RES 19B2
R28 RES 19C6
R27 RES 14C7
R26 RES 14C7
R25 RES 15A6
R24 RES 5C1
R23 RES 5A2
R22 RES 19C6
R21 RES 23B3
R20 RES 23B3
R19 RES 5A2
R18 RES 24B8
R17 RES 24C2
R16 RES 24A3
R15 RES 14C3
R14 RES 7A6
R13 RES 5B1
R12 RES 5B1
R11 RES 24A8
R10 RES 24B8
R9 RES 24A7
R8 RES 15A3
R7 RES 15A6
R6 RES 7B6
R5 RES 5D4
R4 RES 15C1
R3 RES 24C4
R2 RES 15D8
R1 RES 23B3
Q3100 TRA_2N7002DW 31C3 31C4
Q2001 TRA_2N3904 20D7
Q2000 TRA_2N3904 20D7
Q71 TRA_2N7002DW 29C6
Q70 TRA_TP0610 22C2
Q69 TRA_2N7002DW 25D5
Q68 TRA_2N7002DW 22C4 23C7
Q67 TRA_2N7002DW 25C5
Q66 TRA_2N7002DW 31A4 31C3
Q65 TRA_2N7002DW 27A7 27B7
Q64 TRA_2N3906 23B8
Q63 TRA_2N3906 23B8
Q62 TRA_SI4888DY 33C3
Q61 TRA_SI4888DY 33D3
Q60 TRA_SI4435DY 31D1
Q59 TRA_IRF7805 35C3
Q58 TRA_IRF7811W 35B3
Q57 TRA_2N7002 30A3
Q56 TRA_2N3904 25B6
Q55 TRA_IRF7811W 31B3
Q54 TRA_IRF7805 31B3
Q53 TRA_2N3904 25A6
Q52 TRA_SI4888DY 33D6
Q51 TRA_IRF7811W 32C4
Q50 TRA_IRF7805 32C4
Q49 TRA_SI3443DV 25D7
Q48 TRA_IRF7805 35C6
Q47 TRA_IRF7811W 35B6
Q46 TRA_IRF7822 34B3
Q45 TRA_IRF7822 34B4
Q44 TRA_IRF7822 34B3
Q43 TRA_SI4888DY 33C6
Q42 TRA_IRF7805 20C6
Q41 TRA_IRF7805 34C4
Q40 TRA_IRF7805 34C3
Q39 TRA_IRF7811W 20C6
Q38 TRA_2N3904 25A6
Q37 TRA_SI3446DV 35D7
Q36 TRA_2N3904 22C1
Q35 TRA_SI3443DV 33A7
Q34 TRA_2N3904 22D1
Q33 TRA_2N7002DW 22C2
Q32 TRA_TP0610 22D3
Q31 TRA_2N3904 25B6
Q30 TRA_SI3446DV 25A3
Q29 TRA_2N7002DW 22C4 22D4
Q28 TRA_2N7002DW 7C7
Q27 TRA_SI3446DV 25B3
Q26 TRA_2N7002 7C7
Q25 TRA_2N3904 7C6
Q24 TRA_SI3443DV 33A7
Q23 TRA_2N7002DW 31A7
Q22 TRA_2N7002DW 31B6
Q21 TRA_SI3443DV 33B2
Q20 TRA_2N7002DW 23C2 23C3
Q19 TRA_2N7002DW 31B7 31B8
Q18 TRA_2N3906 23C1
Q17 TRA_2N7002DW 29C7 33A6
Q16 TRA_SI4435DY 31D2
Q15 TRA_2N7002DW 33B5
Q14 TRA_2N7002DW 31C2 31C5
Q13 TRA_2N7002 35C6
Q12 TRA_2N7002DW 20B5 20C7
Q11 TRA_2N3904 34D7
Q10 TRA_SI4435DY 31D5
Q9 TRA_FDG6324L 32D6
Q8 TRA_SI4435DY 31D6
Q7 TRA_NDS9407 29D6
Q6 TRA_2N3904 34D7
Q5 TRA_SI3443DV 22A5
Q4 TRA_2N7002DW 31C6 31C7
Q3 TRA_2N7002DW 33A3 33A4
Q2 TRA_2N7002 22A6
Q1 TRA_FDG6324L 22B2
PD1 PHOTODIODE_2P 23D8
L54 IND 29D4
L53 IND 21D1
L52 FILTER_4P 29A3
L51 FILTER_4P 29B3
L50 IND 15C5
L49 IND 15C6
L48 IND 26D7
L47 IND 27D3
L46 IND 23A7
L45 IND 23C7
L44 IND 23A7
L43 IND 23A7
L42 IND 23A7
L41 IND 28D7
L40 IND 31A3
L39 IND 23C1
L38 IND 35B2
L37 IND 29C5
L36 IND 31B2
L35 IND_3P 33D2
L34 IND 29C4
L33 IND_3P 33D7
L32 IND_3P 32C4
L31 IND_3P 34C2
L30 IND 35B7
L29 IND 22B2
L28 IND 22B2
L27 IND 27C4
L26 IND 22B2
L25 IND 20C5
L24 IND 22B7
L23 IND 22A7
L22 IND 22A7
L21 IND 22B7
L20 IND 22B7
L19 IND 21A4
L18 IND 22D5
L17 FILTER_4P 22C7
L16 IND 22D8
L15 IND 22D7
L14 IND 35A4
L13 IND 22D8
L12 IND 22D7
L11 IND 22D8
L10 IND 22D7
L9 IND 31A3
L8 IND 31A3
L7 IND 31A3
L6 IND 31A3
L5 IND 21D3
L4 IND 21D3
L3 IND 28D6
L2 IND 22A4
L1 IND 15D3
J25 CON_M8RT_S_SM 31A4
J24 CON_F6RT_S4MT_TH1 29A2
J23 CON_F200RT_DDRDIMM_SM2 12D4
J22 CON_F9RT_S2MT_SMA 29C1
J21 CON_F80ST_D4MT_SM 24D5
J20 CON_F200RT_DDRDIMM_SM1 12D7
J19 CON_M8RT_S_SM 31D8
J18 CON_RJ45_SHORT_4MT_TH 27C1
J17 CON_F5RT_MINIDIN_TH 22B6
J16 CON_F30RT_T6MT_TH1 22D6
J15 CON_F40RT_S2MT_SM 23C6
J14 CON_F30ST_D_SM 25D6
J13 CON_M50SM_5MM 24D1
J12 CON_F14RT_S2MT_SM 32B8
J11 CON_M50SM_5MM 24B5
J10 CON_M80ST_D4MT_SM 18C2
J9 CON_F16ST_D_SMA 25C3
J8 CON_4RT_WRIB 22B1
J7 CON_F30RT_S2MT_SM 22B3
J6 CON_12 34A4
J5 CON_10STSM_5087 25D1
J4 CON_3RTSM_125 25A3
J3 CON_F14RT_S2MT_SM 24B1
J2 CON_3RTSM_125 25B2
J1 CON_F1ST_S2MT_SM 15A6
G1 OSC 28A4
F5 FUSE 31D1
F4 FUSE 31D1
F3 FUSE 29D5
F2 FUSE 29D7
F1 FUSE 22D6
DZ2 ZENER 29D3
DP20 DPAK3P 20D7
DP4 DPAK3P 29C6 29D6
DP3 DPAK3P 31C1 31C2 31D3
DP2 DPAK3P 35C3 35D6 35D7
DP1 DPAK3P 34C7 34D7
D33 DIODE 33C3
D32 DIODE_SCHOT 35B2
D31 DIODE 29D5
D30 DIODE 31D2
D29 DIODE 31B2
D28 DIODE 31D1
D27 DIODE_SCHOT_3P2 28D8
D26 DIODE 32C4
D25 DIODE 34B2
D24 DIODE_SCHOT 20C5
D23 DIODE_SCHOT 35B6
D22 DIODE 33C7
D21 DIODE_SCHOT 22D5
D20 DIODE_SCHOT 28D7
D19 DIODE_SCHOT 32A6
D18 DIODE_SCHOT 32A6
D17 DIODE_SCHOT 32B6
D16 DIODE 33B6
D15 DIODE_DUAL_6P 29B4
D14 DIODE_SCHOT 33D4
D13 DIODE_DUAL_6P 29B4
D12 DIODE_SCHOT 32A4
D11 DIODE 31C3
D10 DIODE 31C5
D9 DIODE_SCHOT 32B4
D8 DIODE_DUAL_6P 29D2
D7 DIODE_SCHOT 33D5
D6 DIODE_DUAL_6P 29D3
D5 DIODE 20C6
D4 DIODE 32C7
D3 DIODE_SCHOT 32C5
D2 DIODE_SCHOT 34C4
D1 DIODE 27B7
C1602 CAP 16B1
C1601 CAP 16B2
C1600 CAP 16B3
C1000 CAP 28C5
C867 CAP 25C6
C866 CAP 25C6
C865 CAP 22B4
C864 CAP 29D2
C863 CAP 29D3
C862 CAP 29B3
C861 CAP 29D4
C860 CAP 29D4
C859 CAP 29B5
C858 CAP 25D7
C857 CAP 25D7
C856 CAP 25B2
C855 CAP 25A3
C854 CAP_P 34B2
C853 CAP 22C1
C852 CAP 21D1
C851 CAP 21D2
C850 CAP 21D2
C849 CAP 21D2
C848 CAP 21D2
C847 CAP 21D2
C846 CAP 21D2
C845 CAP 21D3
C844 CAP 21D3
C843 CAP 31D5
C842 CAP 15C6
C841 CAP 15C6
C840 CAP 15C6
C839 CAP 15C6
C838 CAP 31C3
C837 CAP 34D4
C836 CAP 26C2
C835 CAP 26C3
C834 CAP 26D4
C833 CAP 26D5
C832 CAP 26D6
C831 CAP 26D6
C830 CAP 26D6
C829 CAP 26D7
C828 CAP 26D7
C827 CAP 26D7
C826 CAP 26D8
C825 CAP 26D8
C824 CAP 26D8
C823 CAP 12A1
C822 CAP 12B1
C821 CAP 12C1
C820 CAP 12C1
C819 CAP 12A1
C818 CAP 12B1
C817 CAP 12C1
C816 CAP 12C1
C815 CAP 12A2
C814 CAP 12B2
C813 CAP 12C2
C812 CAP 12C2
C811 CAP 12A2
C810 CAP 12B2
C809 CAP 12C2
C808 CAP 12C2
C807 CAP 12A2
C806 CAP 12B2
C805 CAP 12C2
C804 CAP 12C2
C803 CAP 23C6
C802 CAP 23A7
C801 CAP 23A6
C800 CAP 23A7
C799 CAP 23B7
C798 CAP 30D6
C797 CAP 30D5
C796 CAP 30B3
C795 CAP_P 31B1
C794 CAP 30B2
C793 CAP 33C2
C792 CAP_P 33A7
C791 CAP 30D5
C790 CAP_P 33C1
C789 CAP 23D5
C788 CAP 23D4
C787 CAP_P 32C2
C786 CAP_P 32C2
C785 CAP_P 32C2
C784 CAP_P 32C2
C783 CAP_P 28D7
C782 CAP 31B4
C781 CAP 23C1
C780 CAP 33D2
C779 CAP 28D8
C778 CAP 23C6
C777 CAP 23C6
C776 CAP 35B2
C775 CAP 28D6
C774 CAP 31A5
C773 CAP 31B4
C772 CAP 29A3
C771 CAP 33D2
C770 CAP 29A3
C769 CAP 28C4
C768 CAP 31B4
C767 CAP 32C4
C766 CAP 33D2
C765 CAP_P 32C2
C764 CAP 18D5
C763 CAP 18D5
C762 CAP 18D6
C761 CAP 18D6
C760 CAP_P 32C2
C759 CAP_P 32C2
C758 CAP 28D6
C757 CAP 31D3
C756 CAP 18D5
C755 CAP 18D5
C754 CAP 18C7
C753 CAP_P 35B1
C752 CAP 32C4
C751 CAP 29C3
C750 CAP 33D2
C749 CAP 28C4
C748 CAP 18B3
C747 CAP_P 35B2
C746 CAP 29C2
C745 CAP 28D5
C744 CAP_P 35B1
C743 CAP 33D2
C742 CAP 18B3
C741 CAP 32C5
C740 CAP 29C2
C739 CAP 18D3
C738 CAP 29D6
C737 CAP 33D7
C736 CAP_P 32C2
C735 CAP 34B4
C734 CAP 25D3
C733 CAP 20C5
C732 CAP_P 32C3
C731 CAP 34B3
C730 CAP 26D8
C729 CAP 33D7
C728 CAP 20C5
C727 CAP 27B5
C726 CAP 27B4
C725 CAP 27A2
C724 CAP 33C8
C723 CAP 33D7
C722 CAP_P 32C2
C721 CAP 22A1
C720 CAP_P 33C8
C719 CAP 27B5
C718 CAP 27B4
C717 CAP 11D6
C716 CAP 11D7
C715 CAP_P 35B7
C714 CAP_P 32C2
C713 CAP 22B1
C712 CAP 11D6
C711 CAP 11D8
C710 CAP 27C5
C709 CAP 22B1
C708 CAP_P 35B7
C707 CAP 11D4
C706 CAP 11D6
C705 CAP 11D8
C704 CAP 35B8
C703 CAP 26D8
C702 CAP 27B5
C701 CAP 11D2
C700 CAP 11D2
C699 CAP 11D2
C698 CAP 11D4
C697 CAP_P 34B2
C696 CAP_P 34B1
C695 CAP_P 34B1
C694 CAP_P 34B2
C693 CAP_P 34B1
C692 CAP_P 34B1
C691 CAP 11D4
C690 CAP 22B8
C689 CAP 35D7
C688 CAP 22B7
C687 CAP 8A2
C686 CAP 8A6
C685 CAP 8B8
C684 CAP 8A1
C683 CAP 35D8
C682 CAP_P 20C5
C681 CAP_P 20C5
C680 CAP_P 20C5
C679 CAP 6B2
C678 CAP 22A8
C677 CAP 22A7
C676 CAP 22A7
C675 CAP 8A4
C674 CAP 8A4
C673 CAP 6B2
C672 CAP 8A3
C671 CAP 8A3
C670 CAP 8A3
C669 CAP 8A4
C668 CAP 25B4
C667 CAP 8A7
C666 CAP 8A7
C665 CAP 8A7
C664 CAP 8A7
C663 CAP 8A7
C662 CAP 8A7
C661 CAP 8A2
C660 CAP 8B7
C659 CAP 6A3
C658 CAP 20C5
C657 CAP 22C5
C656 CAP 22B7
C655 CAP 8A4
C654 CAP 8A8
C653 CAP 8A4
C652 CAP 8A3
C651 CAP 8A8
C650 CAP 8A4
C649 CAP 8A4
C648 CAP 8A7
C647 CAP 8A4
C646 CAP 8A3
C645 CAP 8A7
C644 CAP 8A4
C643 CAP 22B8
C642 CAP 8A2
C641 CAP 8A3
C640 CAP 8A3
C639 CAP 8A5
C638 CAP 8A3
C637 CAP 8A4
C636 CAP 8A6
C635 CAP 8A5
C634 CAP 21A4
C633 CAP 22D5
C632 CAP 22B7
C631 CAP 8A4
C630 CAP 8A4
C629 CAP 21A4
C628 CAP 33A8
C627 CAP 34D1
C626 CAP 33A8
C625 CAP 22D2
C624 CAP 34C1
C623 CAP_P 33A7
C622 CAP 34C2
C621 CAP 34D2
C620 CAP 34C1
C619 CAP 35A5
C618 CAP 22D7
C617 CAP 22C8
C616 CAP 22D7
C615 CAP 22C7
C614 CAP 34D2
C613 CAP 35A4
C612 CAP 34D1
C611 CAP 34C2
C610 CAP 35A4
C609 CAP 22D8
C608 CAP 22D7
C607 CAP 34D2
C606 CAP 23C7
C605 CAP 23D8
C604 CAP 22C5
C603 CAP 22C5
C602 CAP 23D6
C601 CAP 22A3
C600 CAP 23D3
C599 CAP 33B8
C598 CAP 30A6
C597 CAP 30B7
C596 CAP 33A7
C595 CAP 28C7
C594 CAP 22A3
C593 CAP 28C7
C592 CAP 30A7
C591 CAP 28C8
C590 CAP 28C7
C589 CAP 30D6
C588 CAP 28C8
C587 CAP 28C8
C586 CAP 32C3
C585 CAP 33B2
C584 CAP 28A4
C583 CAP 31B1
C582 CAP 31B1
C581 CAP 31B2
C580 CAP 31B5
C579 CAP 18D6
C578 CAP 28C6
C577 CAP 28C6
C576 CAP 28D5
C575 CAP 28C6
C574 CAP 32A5
C573 CAP 33C3
C572 CAP 32C4
C571 CAP 33A5
C570 CAP 31B5
C569 CAP 31B5
C568 CAP 31B2
C567 CAP 31B1
C566 CAP 31B1
C565 CAP 31B5
C564 CAP 31A6
C563 CAP 28A3
C562 CAP 32A4
C561 CAP 33C4
C560 CAP 33C4
C559 CAP 33C4
C558 CAP 33B5
C557 CAP 31B3
C556 CAP 28B3
C555 CAP 32C3
C554 CAP 35D4
C553 CAP 12C2
C552 CAP 12C2
C551 CAP 31C2
C550 CAP 31C5
C549 CAP 29C2
C548 CAP 32A5
C547 CAP 33C4
C546 CAP 28C6
C545 CAP 33C3
C544 CAP 35D5
C543 CAP 12B2
C542 CAP 28A4
C541 CAP 32C3
C540 CAP 32A2
C539 CAP 33C5
C538 CAP 35C2
C537 CAP 35C6
C536 CAP 35C3
C535 CAP 31C4
C534 CAP 31C5
C533 CAP 33C5
C532 CAP 31D4
C531 CAP 28D6
C530 CAP 32A4
C529 CAP 33D4
C528 CAP 33C6
C527 CAP 31B1
C526 CAP 31B2
C525 CAP 31B2
C524 CAP 31B2
C523 CAP 28B4
C522 CAP 32C3
C521 CAP 33C5
C520 CAP 35C3
C519 CAP 28C5
C518 CAP 32A3
C517 CAP 26D8
C516 CAP 26D8
C515 CAP 31B2
C514 CAP 28D6
C513 CAP 28D5
C512 CAP 33C5
C511 CAP 35C7
C510 CAP 20C8
C509 CAP 12D2
C508 CAP 28D6
C507 CAP 28C4
C506 CAP 28C4
C505 CAP 28A7
C504 CAP 32C7
C503 CAP 32C3
C502 CAP 32C4
C501 CAP 33B4
C500 CAP 33C5
C499 CAP 35C6
C498 CAP 12B2
C497 CAP 34B7
C496 CAP 26D8
C495 CAP 26D8
C494 CAP 23C4
C493 CAP 34B4
C492 CAP 33D7
C491 CAP 35C6
C490 CAP 31B4
C489 CAP 34B6
C488 CAP 34B4
C487 CAP 27C2
C486 CAP 27C4
C485 CAP 27C5
C484 CAP 27C4
C483 CAP 27C4
C482 CAP 20B5
C481 CAP 20B6
C480 CAP 25D3
C479 CAP 27C4
C478 CAP 32C6
C477 CAP 32C4
C476 CAP 35B5
C475 CAP 34C6
C474 CAP 27C2
C473 CAP 22A4
C472 CAP 31D3
C471 CAP 34C5
C470 CAP 23C4
C469 CAP 32D5
C468 CAP 33D7
C467 CAP 20C7
C466 CAP 27C4
C465 CAP 27A4
C464 CAP 27D3
C463 CAP 32C6
C462 CAP 22A5
C461 CAP 20B7
C460 CAP 12D1
C459 CAP 10D2
C458 CAP 25D4
C457 CAP 27C3
C456 CAP 27D3
C455 CAP 27C5
C454 CAP 33C6
C453 CAP 20C7
C452 CAP 27C5
C451 CAP 10D2
C450 CAP 25D4
C449 CAP 31D7
C448 CAP 18D3
C447 CAP 27C3
C446 CAP 32C6
C445 CAP 32C6
C444 CAP 32C5
C443 CAP 22A4
C442 CAP 20B8
C441 CAP 10D3
C440 CAP 34B6
C439 CAP 31D6
C438 CAP 27C4
C437 CAP 33A3
C436 CAP 34C4
C435 CAP 27C5
C434 CAP 27A4
C433 CAP 22B4
C432 CAP 20B8
C431 CAP 27A4
C430 CAP 27A8
C429 CAP 27A7
C428 CAP 27C5
C427 CAP 27D4
C426 CAP 27A4
C425 CAP 27B6
C424 CAP 34C3
C423 CAP 34C3
C422 CAP 34C3
C421 CAP 34C3
C420 CAP 34C4
C419 CAP 34C3
C418 CAP 22B2
C417 CAP 34C4
C416 CAP 34C3
C415 CAP 34C3
C414 CAP 34C3
C413 CAP 34C4
C412 CAP 34C4
C411 CAP 15D7
C410 CAP 20B1
C409 CAP 20B1
C408 CAP 20A8
C407 CAP 20D1
C406 CAP 20D1
C405 CAP 22B4
C404 CAP 15D6
C403 CAP 17B8
C402 CAP 17B8
C401 CAP 35D2
C400 CAP 20A8
C399 CAP 15D5
C398 CAP 17B8
C397 CAP 17B8
C396 CAP 35C1
C395 CAP 21D7
C394 CAP 21D6
C393 CAP 20B4
C392 CAP 17A6
C391 CAP 20B2
C390 CAP 20A7
C389 CAP 17B7
C388 CAP 17A5
C387 CAP 17A5
C386 CAP 17A7
C385 CAP 17B6
C384 CAP 17A7
C383 CAP 17A6
C382 CAP 17A7
C381 CAP 17A7
C380 CAP 17A5
C379 CAP 17A6
C378 CAP 17B2
C377 CAP 17C4
C376 CAP 20A1
C375 CAP 20A1
C374 CAP 17C8
C373 CAP 17C5
C372 CAP 17B5
C371 CAP 17B7
C370 CAP 17B6
C369 CAP 17A5
C368 CAP 17A6
C367 CAP 17A6
C366 CAP 17A7
C365 CAP 17B5
C364 CAP 17A6
C363 CAP 20B2
C362 CAP 20B2
C361 CAP 20A6
C360 CAP 20A6
C359 CAP 21D7
C358 CAP 17C6
C357 CAP 17C5
C356 CAP 17B5
C355 CAP 17C3
C354 CAP 20A5
C353 CAP 21C6
C352 CAP 21D7
C351 CAP 21B4
C350 CAP 17B6
C349 CAP 17A6
C348 CAP 17A6
C347 CAP 17B7
C346 CAP 17B5
C345 CAP 17B5
C344 CAP 21D5
C343 CAP 20A2
C342 CAP 20A6
C341 CAP 20A5
C340 CAP 20B4
C339 CAP 20B4
C338 CAP 21D5
C337 CAP 21B7
C336 CAP 17C8
C335 CAP 17C6
C334 CAP 17C7
C333 CAP 17C6
C332 CAP 17A6
C331 CAP 15D5
C330 CAP 17B6
C329 CAP 17C3
C328 CAP 17D7
C327 CAP 17D5
C326 CAP 17D8
C325 CAP 21D6
C324 CAP 21D7
C323 CAP 17A7
C322 CAP 17A5
C321 CAP 17A6
C320 CAP 17A6
C319 CAP 21D4
C318 CAP 19C4
C317 CAP 19D4
C316 CAP 21D5
C315 CAP 21D4
C314 CAP 19C4
C313 CAP 19C4
C312 CAP 21D6
C311 CAP 17C6
C310 CAP 17C5
C309 CAP 17C5
C308 CAP 17B6
C307 CAP 17A7
C306 CAP 17B5
C305 CAP 17A5
C304 CAP 17A7
C303 CAP 17B6
C302 CAP 17A7
C301 CAP 17D4
C300 CAP 17D5
C299 CAP 17D6
C298 CAP 17D6
C297 CAP 6D3
C296 CAP 6C3
C295 CAP 6C2
C294 CAP 19C4
C293 CAP 17B7
C292 CAP 17A5
C291 CAP 9D5
C290 CAP 6D3
C289 CAP 19D4
C288 CAP 19D4
C287 CAP 20D5
C286 CAP 20D6
C285 CAP 20D4
C284 CAP 20D4
C283 CAP 19D4
C282 CAP 19C4
C281 CAP 21B4
C280 CAP 17C5
C279 CAP 17C7
C278 CAP 17B3
C277 CAP 17B7
C276 CAP 17A5
C275 CAP 17A5
C274 CAP 17B7
C273 CAP 17B6
C272 CAP 17B6
C271 CAP 17A7
C270 CAP 17A6
C269 CAP 17D6
C268 CAP 17D5
C267 CAP 17D5
C266 CAP 6C3
C265 CAP 6D2
C264 CAP 19D5
C263 CAP 21C4
C262 CAP 17C8
C261 CAP 17D1
C260 CAP 17D1
C259 CAP 17D1
C258 CAP 17C1
C257 CAP 30A3
C256 CAP 35A2
C255 CAP 5D7
C254 CAP 19C4
C253 CAP 20C1
C252 CAP 20C1
C251 CAP 19D3
C250 CAP 21D4
C249 CAP 17C7
C248 CAP 17C6
C247 CAP 17B7
C246 CAP 17C7
C245 CAP 17D1
C244 CAP 17D3
C243 CAP 17D3
C242 CAP 17C2
C241 CAP 17D5
C240 CAP 17D7
C239 CAP 5D8
C238 CAP 5D5
C237 CAP 6D3
C236 CAP 6D2
C235 CAP 20D6
C234 CAP 20D5
C233 CAP 20D5
C232 CAP 21D4
C231 CAP 21D4
C230 CAP 17B7
C229 CAP 17C6
C228 CAP 17B7
C227 CAP 17B3
C226 CAP 13B4
C225 CAP 17D3
C224 CAP 10A7
C223 CAP 17D3
C222 CAP 17D3
C221 CAP 17D3
C220 CAP 17D5
C219 CAP 17D7
C218 CAP 17D7
C217 CAP 17D6
C216 CAP 17D6
C215 CAP 17D8
C214 CAP 35A2
C213 CAP 20D6
C212 CAP 20D5
C211 CAP 21D4
C210 CAP 17C8
C209 CAP 17C7
C208 CAP 17C6
C207 CAP 17C7
C206 CAP 17D2
C205 CAP 17D6
C204 CAP 5D8
C203 CAP 5D5
C202 CAP 5D6
C201 CAP 5D6
C200 CAP 5D7
C199 CAP 20D4
C198 CAP 20D5
C197 CAP 20D5
C196 CAP 19C5
C194 CAP 17C6
C193 CAP 17C5
C192 CAP 17D1
C191 CAP 17D1
C190 CAP 17D2
C189 CAP 17D3
C188 CAP 17D3
C187 CAP 17B3
C186 CAP 17C7
C185 CAP 17D1
C184 CAP 17D6
C183 CAP 17D7
C182 CAP 17C7
C181 CAP 17D8
C180 CAP 5D7
C179 CAP 6C3
C178 CAP 15D5
C177 CAP 17C1
C176 CAP 15C5
C175 CAP 17D2
C174 CAP 5D6
C173 CAP 5D6
C172 CAP 5D7
C171 CAP 6C2
C170 CAP 19D4
C169 CAP 17C2
C168 CAP 17C3
C167 CAP 17B3
C166 CAP 15D5
C165 CAP 17D2
C164 CAP 17D2
C163 CAP 17D3
C162 CAP 17D3
C161 CAP 17D2
C160 CAP 17D6
C159 CAP 17D7
C158 CAP 17D7
C157 CAP 17D7
C156 CAP 17D6
C155 CAP 17D7
C154 CAP 17D4
C153 CAP 5D8
C152 CAP 20D4
C151 CAP 20D5
C150 CAP 19D5
C149 CAP 19C6
C148 CAP 17C4
C147 CAP 17B2
C146 CAP 17D1
C145 CAP 17D2
C144 CAP 13D4
C143 CAP 17D2
C142 CAP 17D5
C141 CAP 5D7
C140 CAP 5D6
C139 CAP 5D7
C138 CAP 5D7
C137 CAP 15D5
C136 CAP 17D3
C135 CAP 17B3
C134 CAP 17B2
C133 CAP 17D3
C132 CAP 17C1
C131 CAP 17D2
C130 CAP 17B2
C129 CAP 15A5
C128 CAP 20D5
C127 CAP 20D5
C126 CAP 20D5
C125 CAP 19D5
C124 CAP 17D4
C123 CAP 17B1
C122 CAP 17B2
C121 CAP 17C2
C120 CAP 17B1
C119 CAP 17C1
C118 CAP 17B3
C117 CAP 17C1
C116 CAP 17B3
C115 CAP 17D5
C114 CAP 17D6
C113 CAP 17D6
C112 CAP 34C1
C111 CAP 5D5
C110 CAP 5D6
C109 CAP 5D7
C108 CAP 5D7
C107 CAP 17B1
C106 CAP 17C3
C105 CAP 19C4
C104 CAP 19D4
C103 CAP 17D4
C102 CAP 17B1
C101 CAP 17B2
C100 CAP 17B2
C99 CAP 15C2
C98 CAP 17B1
C97 CAP 17D6
C96 CAP 17D5
C95 CAP 5D5
C94 CAP 19D2
C93 CAP 19D3
C92 CAP 19D6
C90 CAP 24A4
C89 CAP 15C3
C88 CAP 15C3
C87 CAP 13D7
C86 CAP 35A7
C85 CAP 19D4
C84 CAP 19D3
C83 CAP 20D5
C82 CAP 20D4
C81 CAP 19D4
C80 CAP 19D4
C79 CAP 17C2
C78 CAP 17B3
C77 CAP 5C3
C76 CAP 5D5
C75 CAP 5D5
C74 CAP 5D6
C73 CAP 5D5
C72 CAP 19D4
C71 CAP 20D4
C70 CAP 20D4
C69 CAP 20D4
C68 CAP 20D4
C67 CAP 19D4
C66 CAP 19C4
C65 CAP 19C6
C64 CAP 17B2
C63 CAP 17C2
C62 CAP 17B3
C61 CAP 17B3
C60 CAP 17C1
C59 CAP 17B1
C58 CAP 17C3
C57 CAP 17B1
C56 CAP 17C3
C55 CAP 17C2
C54 CAP 17B3
C53 CAP 17B1
C52 CAP 17B3
C51 CAP 5D5
C50 CAP 20D5
C49 CAP 17C2
C48 CAP 17B1
C47 CAP 17C3
C46 CAP 17C3
C45 CAP 5D5
C44 CAP 19D6
C43 CAP 17B3
C42 CAP 17C3
C41 CAP 17B3
C40 CAP 17C3
C39 CAP 17C3
C38 CAP 17C2
C37 CAP 17B2
C36 CAP 17B1
C35 CAP 17C1
C34 CAP 17B1
C33 CAP 17C1
C32 CAP 34D1
C31 CAP 5D6
C30 CAP 5D6
C29 CAP 5D4
C28 CAP 19C5
C27 CAP 17B1
C26 CAP 17B3
C25 CAP 17B2
C24 CAP 21D3
C23 CAP 17C2
C22 CAP 17B2
C21 CAP 17C1
C19 CAP 17B3
C18 CAP 17B2
C17 CAP 17C3
C16 CAP 15A5
C15 CAP 35A6
C14 CAP 34C2
C13 CAP 19C5
C12 CAP 17C4
C11 CAP 17D8
C10 CAP 17C4
C9 CAP 5D4
C8 CAP 34D1
C7 CAP 34C1
C6 CAP 34D1
C5 CAP 34C1
C4 CAP 34C1
C3 CAP 34D2
C2 CAP 34D1
C1 CAP 34C2
BS1 PCB_STANDOFF 4D3
--- for the entire design --
*** Unit Cross-Reference ***
CR-43
DSIZE
OFSHT
DRAWING NUMBER
NOTICE OF PROPRIETARY PROPERTY
I TO MAINTAIN THE DOCUMENT IN CONFIDENCE
III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART
II NOT TO REPRODUCE OR COPY IT
AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY
12345678
12345678
B
C
D
A
B
C
D
A
REV.
APPLE COMPUTER INC.SCALE
NONE 44 44
A051-6278
ZT116 HOLE_VIA 4A2
ZT115 HOLE_VIA 4A2
ZT114 HOLE_VIA 4A2
ZT112 HOLE_VIA 4A2
ZT111 HOLE_VIA 4A2
ZT110 HOLE_VIA 4A2
ZT109 HOLE_VIA 4B2
ZT108 HOLE_VIA 4B2
ZT107 HOLE_VIA 4B2
ZT106 HOLE_VIA 4B2
ZT105 HOLE_VIA 4B2
ZT104 HOLE_VIA 4B2
ZT103 HOLE_VIA 4B2
ZT102 HOLE_VIA 4B2
ZT101 HOLE_VIA 4B2
ZT100 HOLE_VIA 4A3
ZT76 HOLE_VIA 4A3
ZT75 HOLE_VIA 4A3
ZT74 HOLE_VIA 4A3
ZT73 HOLE_VIA 4A3
ZT72 HOLE_VIA 4A3
ZT71 HOLE_VIA 4B3
ZT70 HOLE_VIA 4B3
ZT69 HOLE_VIA 4B3
ZT68 HOLE_VIA 4B3
ZT67 HOLE_VIA 4B3
ZT66 HOLE_VIA 4B3
ZT65 HOLE_VIA 4B3
ZT64 HOLE_VIA 4B3
ZT63 HOLE_VIA 4B3
ZT62 HOLE_VIA 4A3
ZT61 HOLE_VIA 4A3
ZT60 HOLE_VIA 4A3
ZT59 HOLE_VIA 4A3
ZT58 HOLE_VIA 4A3
ZT57 HOLE_VIA 4A3
ZT56 HOLE_VIA 4B3
ZT55 HOLE_VIA 4B3
ZT54 HOLE_VIA 4B3
ZT53 HOLE_VIA 4B3
ZT52 HOLE_VIA 4B3
ZT51 HOLE_VIA 4B3
ZT50 HOLE_VIA 4B3
ZT49 HOLE_VIA 4B3
ZT48 HOLE_VIA 4B3
ZT47 HOLE_VIA 4A4
ZT46 HOLE_VIA 4A4
ZT45 HOLE_VIA 4A4
ZT44 HOLE_VIA 4A4
ZT43 HOLE_VIA 4A4
ZT42 HOLE_VIA 4A4
ZT41 HOLE_VIA 4B4
ZT40 HOLE_VIA 4B4
ZT39 HOLE_VIA 4B4
ZT38 HOLE_VIA 4B4
ZT37 HOLE_VIA 4B4
ZT36 HOLE_VIA 4B4
ZT35 HOLE_VIA 4B4
ZT34 HOLE_VIA 4B4
ZT33 HOLE_VIA 4B4
ZT32 HOLE_VIA 4A4
ZT31 HOLE_VIA 4A4
ZT30 HOLE_VIA 4A4
ZT29 HOLE_VIA 4A4
ZT28 HOLE_VIA 4A4
ZT27 HOLE_VIA 4A4
ZT26 HOLE_VIA 4B4
ZT25 HOLE_VIA 4B4
ZT24 HOLE_VIA 4B4
ZT23 HOLE_VIA 4B4
ZT22 HOLE_VIA 4B4
ZT21 HOLE_VIA 4B4
ZT20 HOLE_VIA 4B4
ZT19 HOLE_VIA 4B4
ZT18 HOLE_VIA 4B4
ZT14 MTGHOLE 4D3
ZT8 MTGHOLE 4C4
ZT7 MTGHOLE 4D4
ZT6 MTGHOLE 4D4
ZT5 MTGHOLE 4D4
ZT4 MTGHOLE 4C4
ZT3 MTGHOLE 4D4
ZT1 MTGHOLE 4D3
Y7 CRYSTAL 26D4
Y6 CRYSTAL_4PIN 30B3
Y5 CRYSTAL 30B7
Y4 CRYSTAL 23C6
Y3 CRYSTAL 27A7
Y2 CRYSTAL_4PIN 21B4
Y1 CRYSTAL 15A5
XW20 SHORT 31B3
XW18 SHORT 34C2
XW17 SHORT 25C7
XW15 SHORT 22A8
XW14 SHORT 22B8
XW11 SHORT 33B4
XW9 SHORT 34B4
XW8 SHORT 35B6
XW7 SHORT 34B4
XW6 SHORT 32B5
XW4 SHORT 20B7
XW2 SHORT 34B1
XW1 SHORT 35A4
U1600 VREG_LT1962 16B2
U56 CLK_GEN_CY28512 15B6
U55 SIL1162 21C2
U54 OPAMP_LMC7111 31D3
U53 COMPARATOR_LMC7211 30A3
U52 UPD720101_FBGA 26C6
U51 LTC3405 27D4
U50 MAX1916 23A5
U49 TRANSCEIVER_88E1111 27C6
U48 ADM1031 25B4
U47 VREG_LT1962 6B3
U46 CLK_GEN_CY25811 21A4
U45 COMPARATOR_LMC7211 22C2
16D4 16D7
U44 INTREPID 9D4 10D7 13D3 13D7 14D4 14D8 15C4
U43 MAP31_612P 19D1 19D3 19D6 20C3 21D5
U42 APOLLO483 5C5 6D5 6D7
U41 PI3B3257 34D4
U40 OPAMP_MAX4236EUTT 23D7
U39 M16C62 30D5
U38 MAX6804 30B7
U37 EEPROM_16KX8_M24128B 23D3
U36 FEPR_256KX8_ST72264_BGA 23D5
U35 COMPARATOR_LMC7211 31A6
U34 VREG_LT1962 28C8
U33 LTC1761 28D8
U32 7432 22A2 30A7 30A8
U31 VREG_LM2594 28D7
U30 MAX1772 31B5
U29 VREG_LP2951 32B5
U28 TSB81BA3 28B6
U27 LTC3707 33C4
U26 PCI1510GGU 18C5
U25 VREG_LP2951 32B3
U24 AMP_MAX4172 31D5
U23 MAX1715 35C4
U22 COMPARATOR_LMC7211 32C7
U21 MAX1717 34C5
U20 PWR_CNTRL_TPS2211 18D3
U19 LTC1778 20B7
U18 LTC1625 32C5
U17 FEPR_1MX8 10C2
U16 COMPARATOR_LMC7211 31C7
U14 CBTV4020 11C7
U13 CBTV4020 11C5
U12 CBTV4020 11C4
U11 CBTV4020 11C2
U10 VREG_LT1962 15D6
U9 TRA_SI3447DV 35C1
U8 LTC1761 20A7
U7 SRAM_DDR_128KX36 8D5
U6 SRAM_DDR_128KX36 8D2
U5 TRA_SI3447DV 35A2
U4 LTC3411 35A5
U3 SN74AUC1G08 23B3
U2 SN74AUC1G08 23A3
U1 SN74AUC1G04 7A7
T1 XFR_ENET_1000BT 27B3
SP7 SPKR_CLIP_P84 4C2
SP6 SPKR_CLIP_P84 4C2
SP5 SPKR_CLIP_P84 4C2
SP4 SPKR_CLIP_P84 4C2
SP3 SPKR_CLIP_P84 4C2
SP2 SPKR_CLIP_P84 4C3
SP1 SPKR_CLIP_P84 4C3
SH1 SHLD_3P_EMI 4D2
RP59 RPAK4P 25C5 25C5 25D5 25D5
RP58 RPAK4P 21B1
RP57 RPAK4P 21B1
RP56 RPAK4P 21B3
RP55 RPAK4P 21B3
RP54 RPAK4P 26B3 26B4 26D2
RP53 RPAK10P2C 23B5
RP52 RPAK4P 30C8 30D8
RP51 RPAK4P 23B1 23C3 26C8
RP50 RPAK10P2C 23B5
RP49 RPAK4P 30C1 30C1 30D1
RP48 RPAK4P 23B1
RP47 RPAK4P 15B8 15C8
RP46 RPAK4P 8D8
RP45 RPAK4P 8D8
RP44 RPAK4P 24C7 24C8 24D7
RP43 RPAK4P 24C7 24C8 24D8
RP42 RPAK4P 15B8 15C8 15D1
RP41 RPAK4P 15C8
RP40 RPAK4P 15B8 15C1 15C2
RP39 RPAK4P 26A7
RP38 RPAK10P2C 18A8
RP37 RPAK4P 26B8
RP36 RPAK4P 28B8
RP35 RPAK4P 28A8
RP34 RPAK4P 10C4 10C4 10C5 10C5
RP33 RPAK4P 10C4 10C4 10C5 10C5
RP32 RPAK4P 10D4 10D4 10D5 10D5
RP31 RPAK4P 10D4 10D4 10D5 10D5
RP30 RPAK4P 10A4 10A5 10B4 10B5
RP29 RPAK4P 10A4 10B4 10B5
RP28 RPAK4P 15A8 15B8 15C8 15D8
RP27 RPAK4P 10A4 10A5 10A5
RP26 RPAK4P 10B4 10B5 10B5
RP25 RPAK4P 9C2 9C2 9D2 15A8
RP24 RPAK4P 9C2 9D2 9D2
RP23 RPAK4P 13B1 13C1
RP22 RPAK4P 9C2 9D2 9D2
RP21 RPAK4P 13B1 13C1
RP20 RPAK4P 13C1 13D1
RP19 RPAK4P 13A7 13B7
RP18 RPAK4P 13A7 13B7
RP17 RPAK4P 14C1 14D1
RP16 RPAK4P 14A4 14B4 14B5 14B5
RP15 RPAK4P 14B4 14B4 14B5 14B5
RP14 RPAK4P 24C7 24D7 24D8
RP13 RPAK4P 14C1
RP12 RPAK4P 24B7 24B8
RP11 RPAK4P 5B1 5D1
RP10 RPAK4P 24C7 24C8 24C8
RP9 RPAK4P 24D3
RP8 RPAK4P 15B2
RP7 RPAK4P 15A8 15C8 15D1
RP6 RPAK4P 15A8 15B8 15C8
RP5 RPAK4P 24B3 24C3
RP4 RPAK4P 24B3 24C3
RP3 RPAK4P 24B3 24C3
RP2 RPAK4P 24C3 24D3
RP1 RPAK4P 15A8 15B8
R2501 RES 25B1
R2500 RES 25C1
R2200 RES 22A3
R2004 RES 20D8
R2003 RES 20D7
R2002 RES 20D8
R2001 RES 20D7
R2000 RES 20C7
R1901 RES 19B4
R1900 RES 19B4
R1607 RES 35D8
R1606 RES 35D8
R1605 RES 19A3
R1603 RES 16B1
R1602 RES 16B2
R1601 RES 16B2
R1600 RES 16B3
R1402 RES 14D1
R1399 RES 13C8
R1350 RES 13C8
R1000 RES 28C5
R902 RES 30A4
R891 RES 15B5
R890 RES 15B6
R889 RES 15B7
R888 RES 15C7
R887 RES 15B7
R886 RES 15B7
R774 RES 18D4
R773 RES 10A2
R772 RES 10A3
R771 RES 10A3
R770 RES 10A3
R769 RES 34D3
R768 RES 34D3
R767 RES 34D3
R766 RES 34D4
R765 RES 16D6
R764 RES 16D6
R763 RES 18A7
R762 RES 29D5
R761 RES 25D8
R760 RES 21C7
R759 RES 15C7
R758 RES 15C7
R757 RES 21B3
R756 RES 22C1
R755 RES 22C1
R754 RES 22C2
R753 RES 23C3
R752 RES 21D1
R751 RES 21B2
R750 RES 21C2
R749 RES 21C2
R748 RES 21C3
R747 RES 31C3
R746 RES 31C3
R745 RES 31D4
R744 RES 31D4
R743 RES 31C4
R742 RES 31D4
R741 RES 26C8
R740 RES 34D5
R739 RES 34D5
R738 RES 34D6
R737 RES 34D6
R736 RES 34D6
R735 RES 34D6
R734 RES 34D6
R733 RES 34D6
R732 RES 34D6
R731 RES 34D6
R730 RES 34D6
R729 RES 26C2
R728 RES 26C2
R727 RES 34C8
R726 RES 26A4
R725 RES 26B4
R724 RES 26A4
R723 RES 26A4
R722 RES 26A4
R721 RES 26A4
R720 RES 26A4
R719 RES 26B4
R718 RES 26B3
R717 RES 26C4
R716 RES 26C4
R715 RES 26C4
R714 RES 26C4
R713 RES 26D4
R712 RES 26C5
R711 RES 26D7
R710 RES 26B7
R709 RES 26A7
R708 RES 23A4
R707 RES 27D3
R706 RES 27D3
R705 RES 27D4
R704 RES 27D5
R703 RES 27D5
R702 RES 23A7
R701 RES 30B1
R700 RES 30C1
R699 RES 30D1
R698 RES 30B1
R697 RES 30B1
R696 RES 30D1
R695 RES 30D8
R694 RES 34C8
R693 RES 23B5
R692 RES 23C5
R691 RES 23B7
R690 RES 23A4
R689 RES 30C8
R688 RES 30B3
R687 RES 30B2
R686 RES 30D5
R685 RES 31B3
R684 RES 18B7
R683 RES 31B5
R682 RES 31A6
R681 RES 31A5
R680 RES 31A6
R679 RES 31A5
R678 RES 31C4
R677 RES 31B2
R676 RES 18D7
R675 RES 18A7
R674 RES 28A3
R673 RES 28A4
R672 RES 28D5
R671 RES 22C3
R670 RES 18D8
R669 RES 18D8
R668 RES 29C3
R667 RES 26B4
R666 RES 26B4
R665 RES 31C6
R664 RES 24B6
R663 RES 31C6
R662 RES 18D8
R661 RES 18B4
R660 RES 31C1
R659 RES 28A7
R658 RES 24D4
R657 RES 31C1
R656 RES 29C7
R655 RES 29C6
R654 RES 29D7
R653 RES 29D6
R652 RES 34B2
R651 RES 33D7
R650 RES 28A6
R649 RES 6B1
R648 RES 19A4
R647 RES 19A4
R646 RES 8B8
R645 RES 8B8
R644 RES 6A2
R643 RES 25A5
R642 RES 25B5
R641 RES 8C8
R640 RES 6B1
R639 RES 6B2
R638 RES 25A5
R637 RES 25B5
R636 RES 8B7
R635 RES 19A3
R634 RES 19A2
R633 RES 21C8
R632 RES 21C8
R631 RES 21C8
R630 RES 25A5
R629 RES 25B5
R628 RES 8B7
R627 RES 6B3
R626 RES 25B5
R625 RES 8C8
R624 RES 8C8
R623 RES 21A4
R622 RES 25A5
R620 RES 21A3
R619 RES 21A4
R618 RES 22C6
R617 RES 8D1
R616 RES 8D4
R615 RES 21A4
R614 RES 21A4
R613 RES 21A5
R612 RES 33A8
R611 RES 22C2
R610 RES 22C1
R609 RES 6B4
R608 RES 23A4
R607 RES 22C4
R606 RES 5D2
R605 RES 21C4
R604 RES 22D2
R603 RES 22D2
R602 RES 5D2
R601 RES 19C8
R600 RES 22D2
R599 RES 15C4
R598 RES 22C3
R597 RES 9B1
R596 RES 9A7
R595 RES 9B7
R594 RES 22C3
R593 RES 22D3
R592 RES 25A3
R591 RES 9B1
R590 RES 9B2
R589 RES 9A6
R588 RES 9B7
R587 RES 9C6
R586 RES 9C7
R585 RES 22D4
R584 RES 22D4
R583 RES 9B2
R582 RES 9A7
R581 RES 9A7
R580 RES 9B6
R579 RES 9B7
R578 RES 9C7
R577 RES 22C3
R576 RES 22D3
R575 RES 22D5
R574 RES 9B1
R573 RES 9A7
R572 RES 9B7
R571 RES 9C7
R570 RES 22D5
R569 RES 25A4
R568 RES 9B2
R567 RES 9A7
R566 RES 9B8
R565 RES 9D7
R564 RES 22C4
R563 RES 22C4
R562 RES 9B2
R561 RES 9B2
R560 RES 9A8
R559 RES 9B7
R558 RES 9C8
R557 RES 9D8
R556 RES 9A8
R555 RES 9B8
R554 RES 9C7
R553 RES 35A6
R552 RES 35A6
R551 RES 35A4
R550 RES 15A5
R549 RES 14C1
R548 RES 14D5
R547 RES 14D1
R546 RES 35A4
R545 RES 35A5
R544 RES 14C1
R543 RES 14D5
R542 RES 25B3
R541 RES 7C7
R540 RES 15A5
R539 RES 25B3
R538 RES 7C7
R537 RES 23D6
R536 RES 7C7
R535 RES 7C8
R534 RES 23D7
R533 RES 23C7
R532 RES 15C2
R531 RES 23D7
R530 RES 23D8
R529 RES 7A6
R528 RES 7A6
R527 RES 7D7
R526 RES 7C7
R525 RES 7C7
R524 RES 7C6
R523 RES 7D5
R522 RES 7C5
R521 RES 7C5
R520 RES 7C5
R519 RES 7B4
R518 RES 5D1
R517 RES 7C4
R516 RES 7C4
R515 RES 7C5
R514 RES 7D5
R513 RES 7D6
R512 RES 7C6
R511 RES 7C6
R510 RES 7C6
R509 RES 7A6
R508 RES 7D4
R507 RES 7C4
R506 RES 7C4
R505 RES 7C4
R504 RES 15C1
R503 RES 24A3
R502 RES 24A4
R501 RES 23C7
R500 RES 22C5
R499 RES 24D2
R498 RES 24D2
R497 RES 30B1
R496 RES 30B1
R495 RES 23D3
R494 RES 33A8
R493 RES 23D3
R492 RES 30C7
R491 RES 30B7
R490 RES 30C8
R489 RES 30B7
R488 RES 31B7
R487 RES 31A5
R486 RES 31A7
R485 RES 28C7
R484 RES 28C7
R483 RES 28C8
R482 RES 28C7
R481 RES 30D8
R480 RES 30D1
R479 RES 30B3
R478 RES 30D8
R477 RES 30D1
R476 RES 31B7
R475 RES 31B6
R474 RES 31B7
R473 RES 31D8
R472 RES 28C5
R471 RES 28A4
R470 RES 23D1
R469 RES 23D1
R468 RES 23C1
R467 RES 31B8
R466 RES 31B7
R465 RES 31B4
R464 RES 31B7
R463 RES 28C7
R462 RES 28C5
R461 RES 28D5
R460 RES 28C7
R459 RES 23D5
R458 RES 31B4
R457 RES 31B7
R456 RES 28B8
R455 RES 31B6
R454 RES 32A4
R453 RES 33C2
R452 RES 33B2
R451 RES 23C2
R450 RES 30D8
R449 RES 30C6
R448 RES 30C6
R447 RES 30C1
R446 RES 30C1
R445 RES 30A4
R444 RES 30B3
R443 RES 30B1
R442 RES 30D1
R441 RES 31B2
R440 RES 28A4
R439 RES 33C2
R438 RES 27A5
R437 RES 33B6
R436 RES 30B1
R435 RES 31B5
R434 RES 29A3
R433 RES 28A2
R432 RES 28A3
R431 RES 33B6
R430 RES 30A4
R429 RES 28A2
R428 RES 32A4
R427 RES 33D4
R426 RES 33C4
R425 RES 28B3
R424 RES 33D2
R423 RES 33C3
R422 RES 31C2
R421 RES 31B2
R420 RES 28B4
R419 RES 28B3
R418 RES 32B6
R417 RES 33C3
R416 RES 33B5
R415 RES 31C2
R414 RES 31D5
R413 RES 31C4
R412 RES 31B6
R411 RES 28A3
R410 RES 28B3
R409 RES 28C7
R408 RES 35C5
R407 RES 31C2
R406 RES 31C5
R405 RES 28B4
R404 RES 28C3
R403 RES 28C3
R402 RES 32A4
R401 RES 33C4
R400 RES 33C5
R399 RES 35D5
R398 RES 35C4
R397 RES 28B4
R396 RES 28C3
R395 RES 33D5
R394 RES 31D5
R393 RES 28A5
R392 RES 28D7
R391 RES 28A7
R390 RES 32A2
R389 RES 33C5
R388 RES 28B5
R387 RES 33C7
R386 RES 33C7
R385 RES 35D6
R384 RES 31C4
R383 RES 31D3
R382 RES 31C5
R381 RES 24A5
R380 RES 33C5
R379 RES 33D5
R378 RES 20C8
R377 RES 27B7
R376 RES 29B2
R375 RES 24B6
R374 RES 20B5
R373 RES 35C7
R372 RES 12D2
R371 RES 31C4
R370 RES 34B7
R369 RES 28D6
R368 RES 28B7
R367 RES 28C6
R366 RES 28C7
R365 RES 28A7
R364 RES 28B7
R363 RES 32C7
R362 RES 24B5
R361 RES 24A6
R360 RES 33D5
R359 RES 12D2
R358 RES 34B5
R357 RES 32C7
R356 RES 32C7
R355 RES 35B7
R354 RES 35B7
R353 RES 35C5
R352 RES 35B5
R351 RES 35D5
R350 RES 35B4
R349 RES 35D4
R348 RES 35C5
R347 RES 20C7
R346 RES 34C5
R345 RES 27B2
R344 RES 27A7
R343 RES 27A6
R342 RES 27A7
R341 RES 32D6
R340 RES 20C7
R339 RES 20C6
R338 RES 34D8
R337 RES 34B4
R336 RES 31D7
R335 RES 32C6
R334 RES 24B5
R333 RES 20B6
R332 RES 31A5
R331 RES 27D7
R330 RES 34D7
R329 RES 34C6
R328 RES 27B2
R327 RES 27B4
R326 RES 27B3
R325 RES 25D3
R324 RES 30A3
R323 RES 27B4
R322 RES 32C6
R321 RES 32C5
R320 RES 22A6
R319 RES 34D7
R318 RES 34B6
R317 RES 34C6
R316 RES 31C7
R315 RES 27B4
R314 RES 32C6
R313 RES 22A6
R312 RES 10C3
R311 RES 27B7
R310 RES 34B6
R309 RES 31D8
R308 RES 31C6
R307 RES 27B2
R306 RES 34B6
R305 RES 27B4
R304 RES 32C6
R303 RES 33C7
R302 RES 33A4
R301 RES 31C8
R300 RES 31D6
R299 RES 18D4
R298 RES 27B4
R297 RES 27B4
R296 RES 33C7
R295 RES 33A4
R294 RES 33A4
R293 RES 31C7
R292 RES 31D7
R291 RES 31D7
R290 RES 27B2
R289 RES 27B4
R288 RES 27C7
R287 RES 27B8
R286 RES 32C3
R285 RES 32C3
R284 RES 20B8
R283 RES 20C8
R282 RES 20B8
R281 RES 20C6
R280 RES 10B3
R279 RES 34D7
R278 RES 27C7
R277 RES 20B8
R276 RES 20B5
R275 RES 20B5
R274 RES 33A3
R273 RES 34C5
R272 RES 22B4
R271 RES 20B8
R270 RES 30A3
R269 RES 30A4
R268 RES 10C3
R267 RES 22B4
R266 RES 30A4
R265 RES 29D6
R263 RES 27B7
R262 RES 23D6
R261 RES 25C1
R260 RES 34D5
R259 RES 27C3
R258 RES 34D5
R257 RES 34D5
R256 RES 22B2
R255 RES 34D5
R254 RES 27A6
R253 RES 27A7
R252 RES 34A4
R251 RES 34D5
R250 RES 34A4
R249 RES 34D5
R248 RES 34D5
R247 RES 34B7
R246 RES 34B7
R245 RES 19A4
R244 RES 19A4
R243 RES 21A7
R242 RES 15D7
R241 RES 20B1
R240 RES 20B1
R239 RES 21A7
R238 RES 21B7
R237 RES 20D1
R236 RES 20D1
R235 RES 21A7
R234 RES 21B7
R233 RES 21B8
R232 RES 21A8
R231 RES 35D2
R230 RES 20A7
R229 RES 20A4
R228 RES 21D7
R227 RES 20D2
R226 RES 15D6
R225 RES 15D6
R224 RES 21A6
R223 RES 21A6
R222 RES 21B6
R221 RES 21A6
R220 RES 20A7
R219 RES 20B4
R218 RES 20D2
R217 RES 20B2
R216 RES 20A1
R215 RES 20A1
R214 RES 21A7
R213 RES 21B7
R212 RES 21A8
R211 RES 21B7
R210 RES 21B7
R209 RES 21A7
R208 RES 21A6
R207 RES 15D7
R206 RES 20A4
R205 RES 21C7
R204 RES 21C7
R203 RES 21C7
R202 RES 11A6
R201 RES 20A2
R200 RES 21B8
R199 RES 10A4
R198 RES 20C4
R197 RES 21A7
R196 RES 21C6
R195 RES 21A6
R194 RES 15D4
R193 RES 11A4
R192 RES 11A6
R191 RES 19A6
R190 RES 21A7
R189 RES 11A4
R188 RES 10A5
R187 RES 20C4
R186 RES 19A6
R185 RES 19A5
R184 RES 21B7
R183 RES 21D7
R182 RES 26B3
R181 RES 13B1
R180 RES 21A5
R179 RES 21B4
R178 RES 9D5
R177 RES 9A4
R176 RES 9A5
R175 RES 5D8
R174 RES 20C4
R173 RES 19B2
R172 RES 21B4
R171 RES 21B4
R170 RES 13C4
R169 RES 13A1
R168 RES 9A4
R167 RES 20C4
R166 RES 21D4
R165 RES 21C4
R164 RES 21C4
R163 RES 13D4
R162 RES 9A4
R161 RES 9A4
R160 RES 21A6
R159 RES 21B6
R158 RES 20C1
R157 RES 20C1
R156 RES 21D4
R155 RES 19B8
R154 RES 10A6
R153 RES 10A7
R152 RES 9A6
R151 RES 9A4
R150 RES 20B4
R149 RES 21C4
R148 RES 13B1
R147 RES 13B1
R146 RES 13D8
R145 RES 13B1
R144 RES 10A7
R143 RES 35B3
R142 RES 20B4
R141 RES 13C8
R140 RES 13C5
R139 RES 9C7
R138 RES 9B7
R137 RES 9B1
R136 RES 19A8
R135 RES 13B5
R134 RES 9D7
R133 RES 9D6
R132 RES 9C7
R131 RES 9B6
R130 RES 9B2
R129 RES 9B1
R128 RES 19A8
R127 RES 21D4
R126 RES 13C8
R125 RES 13A1
R124 RES 26B3
R123 RES 15D4
R122 RES 9A5
R121 RES 9D7
R120 RES 9C6
R119 RES 9C7
R118 RES 9B7
R117 RES 9B7
R116 RES 9B2
R115 RES 19B8
R114 RES 15D4
R113 RES 15D4
R112 RES 14A7
R111 RES 9D7
R110 RES 9C7
R109 RES 9B7
R108 RES 9B1
R107 RES 13D8
R106 RES 13D3
CR-44