cv micinn eduard ayguade - udl.cat · ingeniero de telecomunicaciones etse telecomunicación de...

Ministerio de Economía y Competitividad Secretaría de Estado de Investigación,

Desarrollo e Innovación

Currículum

Nombre: Eduard Ayguadé Parra

Fecha: 1 de Julio de 2017

Apellidos: Ayguadé Parra Nombre: Eduard DNI: 38428764-L Fecha de nacimiento: 15 de mayo de 1962 Sexo: V ORCID: 0000-0002-5146-103X ScopusID: 7003451410 ResearcherID: D-8933-2014

Situación profesional actual Organismo: Universitat Politècnica de Catalunya Facultad, Escuela o Instituto: Facultat d'Informàtica de Barcelona Depto./Secc./Unidad estr.: Departamento de Arquitectura de Computadores Dirección postal: Jordi Girona, 1-3. Módulo D6 Teléfono (indicar prefijo, número y extensión): +34-934015951 Fax: +34-934017055 Correo electrónico: [email protected] Especialización (Códigos UNESCO): 330400 - Tecnología de los ordenadores Categoria profesional: Catedrático de Universidad Fecha de inicio: 10 de marzo de 1997 Modalidad de contrato: Funcionario/a Régimen de dedicación: Tiempo completo

Líneas de investigación Arquitectura de computadores, modelos de programación y entornos de ejecución para arquitecturas paralelas

Formación Académica Titulación Superior Centro Fecha Ingeniero de Telecomunicaciones ETSE Telecomunicación de Barcelona (UPC) Julio de 1986 Doctorado Centro Fecha Doctor en Telecomunicaciones Universitat Politècnica de Catalunya Octubre de 1989

Actividades anteriores de carácter científico profesional

Puesto Institución Fechas

Profesor colaborador en exclusiva Facultat d'Informàtica de Barcelona (UPC) 10/1986 a 9 /1987

Profesor asociado a tiempo completo Facultat d'Informàtica de Barcelona (UPC) 10/1987 a 7/1990

Profesor titular de escuela universitaria Facultat d'Informàtica de Barcelona (UPC) 7/1990 a 12/1990

Profesor titular de universidad ETSE Telecomunicaciones de Barcelona (UPC) 12/1990 a 2/1997

Idiomas (R = regular, B = bien, C = correctamente)

Idioma Habla Lee Escribe Inglés B C C

Francés R B R

Participación en Proyectos de I+D financiados en Convocatorias públicas.

§ TITULO DEL PROYECTO: Diseño de Arquitecturas Paralelas de Alta Velocidad a Bajo Coste

(PA85-0314) ENTIDAD FINANCIADORA: CAICYT DURACION DESDE: 1985 HASTA: 1989 INVESTIGADOR PRINCIPAL: M. Valero

§ TITULO DEL PROYECTO: Sistema Multiprocesador Fuertemente Acoplado ENTIDAD FINANCIADORA: Institut Català de Tecnología DURACION DESDE: 1989 HASTA: 1991 INVESTIGADOR PRINCIPAL: J. Labarta

§ TITULO DEL PROYECTO: Arquitectura, Herramientas de Programación y Sistemas Operativos para Multiprocesadores (TIC 89-392) ENTIDAD FINANCIADORA: CICYT DURACION DESDE: 1990 HASTA: 1992 INVESTIGADOR PRINCIPAL: J. Labarta

§ TITULO DEL PROYECTO: Arquitectura y Compilación para Supercomputadores (TIC 92-880) ENTIDAD FINANCIADORA: CICYT DURACION DESDE: Julio 1992 HASTA: Junio 1995 INVESTIGADOR PRINCIPAL: M. Valero (E. Ayguadé: Responsable de la Tarea T2.2 “Transformaciones Automáticas” del Módulo M2 “Compiladores”)

§ TITULO DEL PROYECTO: Acción Integrada Hispano-Britanica 1995-1996: Distribución Automática de Datos para Computadores de Altas Prestaciones (HB163-B) ENTIDAD FINANCIADORA: Ministerio de Educación y Ciencia DURACION DESDE: Abril 1995 HASTA: Marzo 1996 INVESTIGADOR PRINCIPAL: M. Valero (E. Ayguadé: Responsable Técnico de la Propuesta)

§ TITULO DEL PROYECTO: Computación de Altas Prestaciones (TIC 95-429) ENTIDAD FINANCIADORA: CICYT DURACION DESDE: Julio 1995 HASTA: Junio 1998 INVESTIGADOR PRINCIPAL: M. Valero (E. Ayguadé: Responsable del Módulo M2 “Compiladores”)

§ TITULO DEL PROYECTO: Computación Paralela para el Modelado de Problemas Industriales (TIC96-1630-CE) ENTIDAD FINANCIADORA: CICYT DURACIÓN DESDE: Septiembre 1996 HASTA: Septiembre 1999 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Acción Integrada Hispano-Austríaca 1997: Técnicas Avanzadas para la Distribución de Datos (HU1996-10) ENTIDAD FINANCIADORA: Ministerio de Educación y Cultura DURACION DESDE: Enero 1997 HASTA: Diciembre 1997 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Explotación de Paralelismo y Multiprogramación (TIC97-1445-CE) ENTIDAD FINANCIADORA: CICYT DURACIÓN DESDE: Junio 1997 HASTA: Mayo 2000 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Acció Integrada ACI amb University of Illinois 1997: High Performance Compilers ENTIDAD FINANCIADORA: CIRIT DURACION DESDE: Enero 1997 HASTA: Diciembre 1997 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Acció Integrada ACI amb University of California at Santa Cruz 1998: Multithreaded Architectures ENTIDAD FINANCIADORA: CIRIT DURACION DESDE: Enero 1998 HASTA: Diciembre 1998 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Acció Integrada ACI amb University of Illinois 1998: High Performance Compilers for Multithreaded Architectures ENTIDAD FINANCIADORA: CIRIT DURACION DESDE: Enero 1998 HASTA: Diciembre 1998 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Computación de Altas Prestaciones II (TIC 98-511)

ENTIDAD FINANCIADORA: CICYT DURACION DESDE: Julio 1998 HASTA: Junio 2001 INVESTIGADOR PRINCIPAL: M. Valero

§ TITULO DEL PROYECTO: Proyecto Complementatio INTONE (TIC2000-2909-CE)

ENTIDAD FINANCIADORA: CICYT DURACIÓN DESDE: Noviembre 2000 HASTA: Abril 2003 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Computación de Altas Prestaciones III (TIC2001-0995)

ENTIDAD FINANCIADORA: CICYT DURACION DESDE: Julio 2001 HASTA: Junio 2004 INVESTIGADOR PRINCIPAL: M. Valero

§ TITULO DEL PROYECTO: Computación de Altas Prestaciones IV (TIN2004-07739-C02-01)

ENTIDAD FINANCIADORA: CICYT DURACION DESDE: Julio 2004 HASTA: Diciembre 2007 INVESTIGADOR PRINCIPAL: M. Valero

§ TITULO DEL PROYECTO: Supercomputación y eCiencia (CSD2007-00050)

ENTIDAD FINANCIADORA: MICINN Consolider DURACION DESDE: Noviembre 2007 HASTA: Septiembre 2012 INVESTIGADOR PRINCIPAL: M. Valero

§ TITULO DEL PROYECTO: Computación de Altas Prestaciones V (TIN2007-60625)

ENTIDAD FINANCIADORA: CICYT Consolider DURACION DESDE: Octubre 2007 HASTA: Agosto 2012 INVESTIGADOR PRINCIPAL: M. Valero

§ TITULO DEL PROYECTO: Optimización de Aplicaciones Genómicas en Arquitecturas

Heterogeneas (PHB2011-0041-TA) ENTIDAD FINANCIADORA: Programa Hispano-Brasileño de cooperación interuniversitaria DURACIÓN DESDE: Enero 2012 HASTA: Diciembre 2012 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Grup de Recerca Consolidat MPEXPAR (Models de Programació i Entorns d’Execució Paral.lels) (2009 SGR980) ENTIDAD FINANCIADORA: Generalitat de Catalunya, Dep. d’Innovació, Universitats i Empresa DURACION DESDE: Octubre 2009 HASTA: Diciembre 2013 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: BSC-CNS Severo Ochoa research excellence recognition (SEV-2011-

00067) ENTIDAD FINANCIADORA: Spanish Ministry of Science and Innovation DURACIÓN DESDE: January 2012 HASTA December 2015 INVESTIGADOR PRINCIPAL: Mateo Valero, Scientific coordinator: Eduard Ayguadé

§ TITULO DEL PROYECTO: Computación de Altas Prestaciones VI (TIN2012-34557)

ENTIDAD FINANCIADORA: Spanish Ministry of Economy and Competitivity MINECO DURACION DESDE: Junio 2013 HASTA: Junio 2016 INVESTIGADOR PRINCIPAL: M. Valero

§ TITULO DEL PROYECTO: Comparative Genomics in High-Performance Computing Systems (PHBP14/00081) ENTIDAD FINANCIADORA: Programa Hispano-Brasileño de cooperación interuniversitaria DURACIÓN DESDE: Enero 2014 HASTA: Diciembre 2016 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: Grup de Recerca Consolidat MPEXPAR (Models de Programació i Entorns d’Execució Paral.lels) (2014 SGR 1051) ENTIDAD FINANCIADORA: Generalitat de Catalunya, Dep. d’Innovació, Universitats i Empresa DURACION DESDE: Enero 2014 HASTA: Diciembre 2017 INVESTIGADOR PRINCIPAL: E. Ayguadé

§ TITULO DEL PROYECTO: BSC-CNS Severo Ochoa research excellence recognition (SEV-2015-0493) ENTIDAD FINANCIADORA: Spanish Ministry of Science and Innovation DURACIÓN DESDE: January 2016 HASTA December 2019 INVESTIGADOR PRINCIPAL: Mateo Valero

§ TITULO DEL PROYECTO: Computación de Altas Prestaciones VII (TIN2015-65316-P)

ENTIDAD FINANCIADORA: Spanish Ministry of Economy and Competitivity MINECO DURACION DESDE: January 2016 HASTA: December 2019 INVESTIGADOR PRINCIPAL: Mateo Valero and Eduard Ayguadé

Publicaciones o Documentos Científico-Técnicos § AUTORES: T. Jové, E. Ayguadé y M. Valero

TITULO: Arquitectura de los Microprocesadores CISC de 32 bits REF. REVISTA: Mundo Electrónico, Ed. Marcombo. No.180, pp. 25-34. Enero 1988 CLAVE1: A

§ AUTORES: M. Valero, T. Lang, J.M. Llabería, M. Peiron, J.J. Navarro and E. Ayguadé TITULO: Conflict-Free Strides for Vectors in Matched Memories REF. REVISTA: Parallel Processing Letters, World Scientific Publishing Co. Vol.1, no. 2, pp. 95-102. 1991 ISSN/ISBN: 0129-6264 CLAVE: A

§ AUTORES: M. Peiron, M. Valero, E. Ayguadé and T. Lang TITULO: Synchronized Access to Streams in Vector Multiprocessors REF. REVISTA: IEEE TC on Computer Architecture Newsletter. Fall issue, pp. 37-41. 1993 CLAVE: A

§ AUTORES: J. Torres and E. Ayguadé TITULO: Compilació per a Supercomputadors REF. REVISTA: Butlletí de les Societats Catalanes de Física, Química, Matemàtiques i Tecnologia, Institut d’Estudis Catalans. Vol. XIV, no. 2, pp. 235-246. Juny 1994 ISSN/ISBN: 1130-4758 CLAVE: A

§ AUTORES: M. Valero, E. Ayguadé, and M. Peiron TITULO: Network Synchronization and Out-of-order Access to Vectors REF. REVISTA: Parallel Processing Letters, World Scientific Publishing Co. Vol.4, no. 4, pp. 405-415. 1994 ISSN/ISBN: 0129-6264 CLAVE: A

§ AUTORES: M. Valero, T. Lang, M. Peiron and E. Ayguadé TITULO: Conflict-Free Access for Streams in Multi-module Memories REF. REVISTA: IEEE Transactions on Computers. Vol. 44, no. 5, pp. 634-646. May 1995 ISSN/ISBN: 0018-9340 CLAVE: A

§ AUTORES: E. Ayguadé, J. Labarta, J. Garcia, M. Gironès and M. Valero, TITULO: Analyzing Reference Patterns in Automatic Data Distribution Tools REF. REVISTA: International Journal of Parallel Programming. Vol. 23, no. 6, pp. 515-535. December 1995 ISSN/ISBN: 0885-7458 CLAVE: A

§ AUTORES: J. Garcia, E. Ayguadé and J. Labarta, TITULO: Using a 0-1 Integer Programming Model for Automatic Static Data Distribution CONGRESO: Parallel Processing Letters, World Scientific Publishing Co. Vol. 6, no. 1, pp. 159-171. 1996 ISSN/ISBN: 0129-6264 CLAVE: A

1 CLAVE: L = libro completo, CL = capítulo de libro, A = artículo, E = editor.

§ AUTORES: E. Ayguadé, J. Garcia, M. Girones, M. L. Grande, and J. Labarta, TITULO: DDT: A Research Tool for Automatic Data Distribution in HPF REF. REVISTA: Scientific Programming, Special Issue on Implementations of HPF. Vol. 6, no. 1, pp. 73-94. Spring 1997 ISSN/ISBN: 1058-9244 CLAVE2: A

§ AUTORES: R. Perrott, E. Ayguadé, J. Garcia, and J. Torres, TITULO: High Performance Fortran Implementations: A Survey REF. REVISTA: Scientific Programming. Vol. 6, no. 3, pp. 243-248, 1997. ISSN/ISBN: 1058-9244 CLAVE: A

§ AUTORES: J. Llosa, E. Ayguadé and M. Valero TITULO: Quantitative Evaluation of Register Pressure on Software Pipelined Loops REF. REVISTA: International Journal of Parallel Programming. Vol. 26, no. 2, pp. 121-142. April 1998. ISSN/ISBN: 0885-7458 CLAVE: A

§ AUTORES: E. Ayguadé, J. Garcia and U. Kremer,

TITULO: Tools and Techniques for Automatic Data Layout: A Case Study REF. REVISTA: Parallel Computing, Special Issue on Languages and Compilers for Parallel Computing. North Holland. Vol. 24, no. 3-4, pp. 557-578, May 1998. ISSN/ISBN: 0167-8191 CLAVE: A

§ AUTORES: J. Llosa, M. Valero, E. Ayguadé and A. González

TITULO: Modulo Scheduling with Reduced Register Pressure REF. REVISTA: IEEE Transactions on Computers. Vol. 47, no. 6. pp. 625-638. June 1998. ISSN/ISBN: 0018-9340 CLAVE: A

§ AUTORES: E. Ayguadé (contributor). Phillip A. Laplante (Editor-in-chief). TITULO: Comprehensive Dictionary of Electrical Engineering REF. LIBRO: CRC Handbook and IEEE Press. ISBN 0-8493-3128-5, 1999. CLAVE: CL

§ AUTORES: M. Gonzalez, E. Ayguadé, X. Martorell, J. Labarta, N. Navarro and J. Oliver

TITULO: NanosCompiler: Supporting Flexible Multilevel Parallelism in OpenMP REF. REVISTA: Concurrency: Practice and Experience. Special issue on OpenMP. vol. 12, no. 12. pp. 1205-1218. October 2000. ISSN/ISBN: 1040-3108 CLAVE: A

§ AUTORES: Dimitrios S. Nikolopoulos, Theodore S. Papatheodorou, Constantine D.

Polychronopoulos, Jesús Labarta, and Eduard Ayguadé TITULO: A transparent runtime data distribution engine for OpenMP REF. REVISTA: Scientific Programming vol. 8, no. 3, pp. 143-162. August 2000. Doi: 10.1155/2000/417570 http://dx.doi.org/10.1155/2000/417570.


§ AUTORES: J. Llosa, E. Ayguadé, A. González, M. Valero and J. Eckhardt TITULO: Lifetime-sensitive Modulo Scheduling in a Production Environment REF. REVISTA: IEEE Transactions on Computers. Vol. 50, no. 3, pp. 234-249. March 2001. ISSN/ISBN: 0018-9340 CLAVE3: A

§ AUTORES: J. Garcia, E. Ayguadé and J. Labarta

TITULO: A Framework for Integrating Data Alignment, Distribution and Redistribution in Distributed Memory Multiprocessors REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems. Vol. 12, no. 4. pp. 416-431. April 2001. ISSN/ISBN: 1045-9219 CLAVE: A

§ AUTORES: J. Oliver, J. Guitart, E. Ayguadé, N. Navarro and J. Torres

TITULO: Strategies for the Efficient Exploitation of Loop-level Parallelism in Java REF. REVISTA: Concurrency and Computation: Practice and Experience (Java Grande 2000 Special Issue). Vol. 13(8-9). pp. 663-680. July 2001. ISSN/ISBN: 1040-3108 CLAVE: A

§ AUTORES: D. Nikolopoulos, E. Artiaga, E. Ayguadé and J. Labarta

TITULO: Exploiting Memory Affinity in OpenMP through Schedule Reuse REF. REVISTA: ACM SIGARCH Computer Architecture News. Vol. 29, no. 5, pp. 49-55, ACM Press, December 2001. ISSN/ISBN: 0163-5964 CLAVE: A

§ AUTORES: M. Kandermir, P. Banerjee, A. Choudhary, J. Ramanujam and E. Ayguadé

TITULO: Static and Dynamic Locality Optimizations Using Integer Linear Programming REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems. Vol. 12, no. 9, pp. 922-941. September 2001. ISSN/ISBN: 1045-9219 CLAVE: A

§ AUTORES: D. Lopez, J. Llosa, M. Valero and E. Ayguadé

TITULO: Cost-conscious Strategies to Increase Performance of Numerical Programs on Aggressive VLIW Architectures REF. REVISTA: IEEE Transactions on Computers. Vol. 50, no. 10, pp. 1033-1051. October 2001. ISSN/ISBN: 0018-9340 CLAVE: A

§ AUTORES: J. Labarta, E. Ayguadé, J. Oliver and D. Henty

TITULO: New OpenMP Directives for Irregular Data Access Loops REF. REVISTA: Scientific Programming. Vol. 9, no. 2-3. pp. 175-183. IOS Press, March 2002. ISSN/ISBN: 1058-9244 CLAVE: A

§ AUTORES: D. Nikolopoulos, T. S. Papatheodorou, C. D. Polychronopoulos, J. Labarta and E.

Ayguadé TITULO: Scheduler-activated Dynamic Page Migration for Multiprogrammed DSM Multiprocessors. REF. REVISTA: Journal of Parallel and Distributed Computing. Vol. 62, no. 6. pp. 1069-1103. Academic Press. June 2002. ISSN/ISBN: 0743-7315 CLAVE: A


§ AUTORES: D. S. Nikolopoulos, E. Ayguadé and C. D. Polychronopoulos

TITULO: Runtime vs. Manual Data Distribution for Architecture-agnostic Shared-memory Programming Models REF. REVISTA: International Journal of Parallel Programming, vol. 30, no. 4. Plenum Publishing Corporation. pp. 225-254. August 2002. ISSN/ISBN: 0885-7458 CLAVE4: A

§ AUTORES: E. Ayguadé

TITULO: Special Issue on OpenMP Guest Editor’s Introduction REF. REVISTA: International Journal of Parallel Programming. Vol. 31, No. 3, pp. 181-183. June 2003. CLAVE: E

§ AUTORES: H. Jin, G. Jost, J. Yan, E. Ayguadé, M. Gonzalez and X. Martorell.

TITULO: Automatic Multilevel Parallelization Using OpenMP REF. REVISTA: Scientific Programming. Vol. 11, no. 2. pp. 177-190. June 2003. CLAVE: A

§ AUTORES: D. S. Nikolopoulos, E. Artiaga, E. Ayguadé and J. Labarta

TITULO: Scaling Non-Regular Shared-Memory Codes by Reusing Custom Loop Schedules REF. REVISTA: Scientific Programming. Vol. 11, no. 2. pp. 143-159. June 2003. CLAVE: A

§ AUTORES: E. Ayguadé and B. Chapman

TITULO: Special Issue on OpenMP Guest Editor’s Foreword REF. REVISTA: Scientific Programming. Vol. 11, no. 2. pp. 79-80. June 2003. CLAVE: E

§ AUTORES: J. Zalamea, J. Llosa, E. Ayguadé and M. Valero

TITULO: Register-constrained Modulo Scheduling REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems, vol. 15, no. 5, pp. 417-430. May 2004. CLAVE: A

§ AUTORES: Daniel Ortega, Mateo Valero, Eduard Ayguade

TITULO: Dynamic Memory Instruction Bypasssing REF. REVISTA: International Journal on Parallel Programming, special issue with selected papers from ICS’2003. Vol. 32, no. 3, pp. 199-224. June 2004. CLAVE: A


TITULO: Software and Hardware Techniques to Optimize Register File Utilization in VLIW Architectures REF. REVISTA: International Journal of Parallel Programming, vol. 32, no. 6, pp. 447-474. December 2004. CLAVE: A

§ AUTORES: Marc Gonzalez, Eduard Ayguadé, Xavier Martorell and Jesús Labarta

TITULO: Nested Parallelism and Pipelining in OpenMP REF. LIBRO: High-Performance Computing: Paradigm and Infrastructure, Chapter 6. T. Yang and M. Guo Eds. John Wiley & Sons, Inc. December 2005. ISSN/ISBN: 978-0-471-65471-X CLAVE: CL


§ AUTORES: David Carrera, Jordi Guitart, Vicenç Beltran, Jordi Torres and Eduard Ayguadé

TITULO: Performance Impact of the Grid Middleware REF. LIBRO: Engineering the GRID – Status and Persperctives, B. DiMartino, J. Dongarra, A. Hoisie, L. Yang and H. Zima Eds. American Scientific Publishers. Chapter 15, pp. 235-248. November 2005. ISSN/ISBN: 1-58883-038-1 CLAVE5: CL

§ AUTORES: Tomer Morad, Uri Weiser, Avinoam Kolodny, Mateo Valero and Eduard Ayguadé

TITULO: Performance, Power Efficiency and Scalability of Asymmetric Chip Multiprocessors REF. REVISTA: IEEE Computer Architecture Letters. Vol. 5, Issue 1, pp. 14-17. January 2006. CLAVE: A

§ AUTORES: David Ródenas, Xavier Martorell, Eduard Ayguadé, Jesus Labarta, George Almási,

Calin Cascaval, José Castaños, and José Moreira TITULO: Multilevel Parallelism using OpenMP on a Massive Multithreaded Architecture REF. REVISTA: Journal of Embedded Computing, Special issue: Issues in embedded single-chip multicore architectures, Vol 2(2), pp.141-155. April 2006. CLAVE: A

§ AUTORES: E. Ayguadé, M. Gonzalez, X. Martorell and G. Jost

TITULO: Employing Nested OpenMP for the Parallelization of Multi-Zone Computational Fluid Dynamics Applications REF. REVISTA: Journal of Parallel and Distributed Computing, Volume 66, Issue 5, May 2006, Pages 686-697. CLAVE: A

§ AUTORES: J.J. Costa, T. Cortes, X. Martorell, E. Ayguade and J. Labarta

TITULO: Running OpenMP applications efficiently on an everything-shared SDSM REF. REVISTA: Journal of Parallel and Distributed Computing, Volume 66, Issue 5, May 2006, Pages 647-658. CLAVE: A

§ AUTORES: Tim Harris, Adrian Cristal, Osman S. Unsal, Eduard Ayguade, Simon P. Jones,

Fabrizio Gagliardi, Burton Smith and Mateo Valero TITULO: Transactional Memory: An Overview REF. REVISTA: IEEE Micro. Hot Tutorials Special Issue. Vol. 27, Issue 3. pp. 8-29. May/June 2007. CLAVE: A

§ AUTORES: Alejandro Duran, Roger Ferrer, Juan Jose Costa, Marc González, Xavier Martorell, Eduard Ayguadé and Jesús Labarta TITULO: A proposal for error handling in OpenMP REF. REVISTA: International Journal of Parallel Programming, Best papers from IWOMP-2006. Vol. 35, No. 4, pp. 393-416. August 2007. CLAVE: A

§ AUTORES: Jordi Guitart, David Carrera, Vicenç Beltran, Jordi Torres, Eduard Ayguade

TITULO: Designing an Overload Control Strategy for Secure e-Commerce Applications REF. REVISTA: Computer Networks Journal. Elsevier. Vol. 51, Issue 15. October, 2007 CLAVE: A


§ AUTORES: Eduard Ayguade and Matthias Mueller TITULO: Guest Editors’ Introduction to Special Issue on OpenMP (vol. 1) REF. REVISTA: International Journal of Parallel Programming, Vol. 35, No. 4, pp. 331-333. August 2007 CLAVE6: E

§ AUTORES: Eduard Ayguade and Matthias Mueller

TITULO: Guest Editors’ Introduction to Special Issue on OpenMP (vol. 2) REF. REVISTA: International Journal of Parallel Programming, Vol. 35, No. 5, October 2007. CLAVE: E

§ AUTORES: Jordi Guitart, David Carrera, Vicenc Beltran, Jordi Torres and Eduard Ayguadé

TITULO: Dynamic CPU Provisioning for Self-Managed Secure Web Applications in SMP Hosting Platforms REF. REVISTA: Computer Networks Journal. Elsevier. Vol 52/7. pp 1390-1409, ISSN:1389-1286, May 2008. CLAVE: A

§ AUTORES: Guang R. Gao, Mitsuhisa Sato, Eduard Ayguadé (Eds.)

TITULO: Guest Editors Introduction: Special Issue on OpenMP REF. REVISTA: International Journal of Parallel Programming vol. 36 no. 3. pp. 287-288 ISSN: 0885-7458. Springer, 2008. CLAVE: E

§ AUTORES: Milos Milovanovic, Roger Ferrer, Vladimir Gajinov, Osman S. Unsal, Adrián Cristal,

Eduard Ayguadé, Mateo Valero TITULO: Nebelung: Execution Environment for Transactional OpenMP REF. REVISTA: International Journal of Parallel Programming vol. 36 no. 3. pp. 326-346 ISSN: 0885-7458. Springer, 2008. CLAVE: A

§ AUTORES: M. Pericas, E. Ayguadé, J. Zalamea, J. Llosa and M. Valero

TITULO: Power–Efficient VLIW Design Using Clustering and Widening REF. REVISTA: International Journal of Embedded Systems (IJES). Inderscience Publishers. Vol. 3, no. 3, pp. 141-149. October 2008. CLAVE: A

§ AUTORES: E. Ayguadé, G. Baumgartner, J. Ramanujam, and P. Sadayappan (Eds.)

TITULO: Languages and Compilers for Parallel Computing REF- REVISTA: 18th International Workshop on Languages and Compilers for Parallel Computing (LCPC 2005), Hawthorne, NY, USA. Lecture Notes in Computer Science. Volume LNCS 4339/2006. Springer, ISBN: 978-3-540-69329-1. May 2007. CLAVE: E

§ AUTORES: Barbara M. Chapman, Weimin Zheng, Guang R. Gao, Mitsuhisa Sato, Eduard Ayguadé and Dongsheng Wang (Eds.) TITULO: A Practical Programming Model for the Multi-Core Era REF. REVISTA: 3rd International Workshop on OpenMP, IWOMP 2007, Beijing, China, June 3-7. Lecture Notes in Computer Science 4935, ISBN 978-3-540-69302-4. Springer 2008. CLAVE: E


§ AUTORES: D. Carrera, V. Beltran, J. Torres and E. Ayguadé TITULO: A Hybrid Connector for Efficient Web Servers REF. REVISTA: International Journal on High Performance Computing and Networking (IJHPCN), InderScience Publishers, Vol. 5, Nos. 5/6, pp.323–330. ISSN: 1740-0562. 2008. CLAVE7: A

§ AUTORES: Eduard Ayguadé, Nawal Copty, Alejandro Duran, Jay Hoeflinger, Yuan Lin, Federico

Massaioli, Xavier Teruel, Priya Unnikrishnan and Guansong Zhang TITULO: The Design of OpenMP Tasks REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems, vol. 20, no. 3, pp. 404-418, January 2009 CLAVE: A

§ AUTORES: Alejandro Duran, Roger Ferrer, Eduard Ayguadé, Rosa M. Badia and Jesús Labarta

TITULO: A Proposal to Extend the OpenMP Tasking Model with Dependent Tasks REF. REVISTA: International Journal of Parallel Programming, vol. 37, no. 3, pp. 292-305. June 2009. CLAVE: A

§ AUTORES: Rudolf Eigenmann and Eduard Ayguadé TITULO: Guest Editor’s Introduction (Special issue on IWOMP 2008) REF. REVISTA: International Journal of Parallel Programming, vol. 37, no. 3, pp. 247-249. June 2009. CLAVE: E

§ AUTORES: Judit Planas, Rosa M. Badia, Eduard Ayguadé and Jesus Labarta

TITULO: Hierarchical task based programming with StarSs REF. REVISTA: International Journal of High Performance Computing Applications. Vol. 23, no. 3, pp. 284-299. July 2009. CLAVE: A

§ AUTORES: Jesús Labarta, Eduard Ayguadé and Mateo Valero

TITULO: BSC Vision Towards Exascale REF. REVISTA: International Journal of High Performance Computing Applications. Vol. 23, no. 4, pp. 340-343. October 2009. CLAVE: A

§ AUTORES: Jordi Guitart, Jordi Torres and Eduard Ayguadé

TITULO: A Survey on Performance Management for Internet Applications REF. REVISTA: Concurrency and Computation: Practice and Experience, Vol. 22 (1), pp. 68-106, January 2010 CLAVE: A

AUTORES: Nikola Vujic, Marc Gonzalez, Xavier Martorell and Eduard Ayguadé TITULO: Automatic Prefetch and Modulo Scheduling Transformations for the Cell BE Architecture REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems, vol. 21, no. 4, pp. 494-505. April 2010. CLAVE: A


§ AUTORES: Eduard Ayguadé, Rosa M. Badia, Pieter Bellens, Daniel Cabrera, Alejandro Duran, Roger Ferrer, Marc Gonzàlez, Francisco Igual, Daniel Jiménez-González, Jesús Labarta, Luis Martinell, Xavier Martorell, Rafael Mayo, Josep M. Pérez, Judit Planas and Enrique Quintana-Ortí TÍTULO: Extending OpenMP to Survive the Heterogeneous Multi-Core Era REF. REVISTA: International Journal of Parallel Programming, vol. 38, no. 5, pp. 440-459. <http://dx.doi.org/10.1007/s10766-010-0135-4>. August 2010. CLAVE8: A

§ AUTORES: Matthias Müller and EduardAyguadé,

TÍTULO: Guest Editors’ Introduction REF. REVISTA: International Journal of Parallel Programming (Special Issue on OpenMP), vol. 38, no. 5, pp. 339-340. <http://dx.doi.org/10.1007/s10766-010-0141-6>. August 2010. CLAVE: E

§ AUTORES: Roger Ferrer, Pieter Bellens, Vicenc Beltran, Marc Gonzalez, Xavier Martorell, Rosa M. Badia, Eduard Ayguade, Jae-Seung Yeom, Scott Schneider, Konstantinos Koukos, Michail Alvanos, Dimitros S. Nikolopoulos, Angelos Bilas TITULO: Parallel Programming Models for Heterogeneous Multicore Architectures REF. REVISTA: IEEE Micro, vol. 30, no. 5, Special Issue “Multicore: The View from Europe”, pp. 42-53, Sep./Oct. 2010. CLAVE: A

§ AUTORES: Eduard Ayguadé and Jordi Torres

TÍTULO: Holistic Management for a more Energy-Efficient Cloud Computing REF. REVISTA: ERCIM News, Special theme: Cloud Computing. Number 83, October 2010. ISSN 0926-4981 CLAVE: A

§ AUTORES: Mauricio Araya-Polo, Javier Cabezas, Mauricio Hanzich, Miquel Pericas, Félix Rubio,

Isaac Gelado, Muhammad Shafiq, Enric Morancho, Nacho Navarro, Eduard Ayguade, José María Cela and Mateo Valero TITULO: Assessing Accelerator-based HPC Reverse Time Migration REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems, special issue High-Performance Computing with Accelerators, vol. 22, no. 1, pp. 147-162, <http://doi.ieeecomputersociety.org/10.1109/TPDS.2010.144>, January 2011. CLAVE: A

§ AUTORES: Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro and Eduard

Ayguadé TITULO: Local Memory Design Space Exploration for High Performance Computing REF. REVISTA: The Computer Journal, Oxford University Press. The Computer Journal, vol. 54, no. 5, pp. 786-799. 2011. DOI: 10.1093/comjnl/bxq026 CLAVE: A

§ AUTORES: Harm Munk, Eduard Ayguadé, Cédric Bastoul, Paul Carpenter, Zbigniew Chamski,

Albert Cohen, Marco Cornero, Philippe Dumont, Marc Duranton, Mohammed Fellahi, Roger Ferrer, Razya Ladelsky, Menno Lindwer, Xavier Martorell, Cupertino Miranda, Dorit Nuzman, Andrea Ornstein, Antoniu Pop, Sebastian Pop, Louis-Noël Pouchet, Alex Ramírez, David Ródenas, Erven Rohou, Ira Rosen, Uzi Shvadron, Konrad Trifunovic and Ayal Zaks TITULO: ACOTES Project: Advanced Compiler Technologies for Embedded Streaming REF. REVISTA: International Journal on Parallel Programming, Volume 39, Number 3, pp. 397-450. Special Issue on High Performance and Embedded Architecture and Compilation. June 2011. DOI 10.1007/s10766-010-0132-7 CLAVE: A


§ AUTORES: Alejandro Duran, Eduard Ayguadé, Rosa M. Badia, Jesús Labarta, Luis Martinell, Xavier Martorell and Judit Planas TÍTULO: OmpSs: A Proposal for Programming Heterogeneous Multi-core Architectures REF. REVISTA: Parallel Processing Letters, Vol. 21, No. 2, pp. 173-193. June 2011 DOI: 10.1142/S0129626411000151 CLAVE9: A

§ AUTORES: Paul Carpenter, Alex Ramirez and Eduard Ayguade

TÍTULO: The Abstract Streaming Machine: Compile-time Performance Modelling of Stream Programs on Heterogeneous Multiprocessors REF. REVISTA: Transactions on HiPEAC, Vol. 5. No. 3. October 2011. ISSN: 1864-306X. CLAVE: A

§ AUTORES: Ramon Bertran, Yolanda Becerra, David Carrera, Vicenç Beltran, Marc Gonzalez,

Xavier Martorell, Nacho Navarro, Jordi Torres and Eduard Ayguadé TITULO: Energy Accounting for Shared Virtualized Environments under DVFS using PMC-based Power Models REF. REVISTA: Future Generation Computer Systems. Volume 28, Issue 2, February 2012, pp. 457-468. DOI: http://dx.doi.org/10.1016/j.future.2011.03.007. CLAVE: A

§ AUTORES: David Carrera, Malgorzata Steinder, Ian Whalley, Jordi Torres, Eduard Ayguadé

TÍTULO: Autonomic Placement of Mixed Batch and Transactional Workloads REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems, vol. 23, no. 2, pp. 219-231, Feb. 2012, DOI:10.1109/TPDS.2011.129 CLAVE: A

§ AUTORES: Nikola Vujic, Felipe Cabarcas, Marc Gonzalez, Alex Ramirez, Xavier Martorell and

Eduard Ayguadé TITULO: DMA++: On the Fly Data Realignment for On-Chip Memories REF. REVISTA: IEEE Transactions on Computers. Doi: 10.1109/TC.2010.255. Vo. 61, no. 2, pp. 237-250. February 2012. CLAVE: A

§ AUTORES: Jesus Labarta, Vladimir Marjanović, Eduard Ayguadé, Rosa M. Badia and Mateo

Valero TÍTULO: Hybrid Parallel Programming with MPI/StarSs REF. REVISTA: Advances in Parallel Computing, Volume 22: Applications, Tools and Techniques on the Road to Exascale Computing. Pp. 621 - 628. IOS Press. 2012. ISBN: 978-1-61499-040-6, DOI: 10.3233/978-1-61499-041-3-621 CLAVE: CL

§ AUTORES: Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro and Eduard Ayguadé TITULO: Counter-based Power Modeling Methods: Top-down vs Bottom-up REF. REVISTA: The Computer Journal. Vol. 56, no. 2, pp. 198-213. February 2013. DOI: 10.1093/comjnl/bxs116. CLAVE: A

§ AUTORES: Muhammad Shafiq, Miquel Pericas, Nacho Navarro and Eduard Ayguadé

TITULO: A Template System for the Efficient Compilation of Domain Abstractions onto Reconfigurable Computers REF. REVISTA: Journal of Systems Architecture. Vol. 59, no. 2, pp. 91-102, Elsevier, February 2013. DOI: 10.1016/j.sysarc.2012.10.002. CLAVE: A


§ AUTORES: Jordà Polo, Yolanda Becerra, David Carrera, M. Steinder, I. Whalley, Jordi Torres and Eduard Ayguadé TÍTULO: Deadline-based MapReduce workload management REF. REVISTA: IEEE Transactions on Network and Service Management, vol. 10, no. 2, pp. 231-244. June 2013. Doi: 10.1109/TNSM.2012.122112.110163. CLAVE10: A

§ AUTORES: Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro and Eduard

Ayguadé TITULO: A Systematic Methodology to Generate Decomposable and Responsive Power Models for CMPs REF. REVISTA: IEEE Transactions on Computers, vol. 62, no. 7, pp. 1289-1302. July 2013. DOI: 10.1109/TC.2012.97 CLAVE: A

§ AUTORES: Vladimir Subotić, Steffen Brinkmann, Vladimir Marjanović, Rosa M. Badia, José Gracia, Christoph Niethammer, Eduard Ayguade, Jesús Labarta and Mateo Valero TITULO: Programmability and portability for exascale: Top down programming methodology and tools with StarSs REF. REVISTA: Journal of Computational Science. Vol. 4, no. 6. pp. 450-456. November 2013. DOI: 10.1016/j.jocs.2013.01.008. CLAVE: A

§ AUTORES: Mateo Valero, Miquel Moreto, Marc Casas, Eduard Ayguadé and Jesús Labarta

TITULO: Runtime-Aware Architectures: A First Approach REF. REVISTA: Supercomputing Frontiers and Innovation. Vol.1, no. 1, pp. 29-44. June 2014. DOI: http://dx.doi.org/10.14529/jsfi140102 CLAVE: A

§ AUTORES: Tassadaq Hussain, Amna Haider and Eduard Ayguadé

TÍTULO: PMSS: A programmable memory system and scheduler for complex memory patterns REF. REVISTA: Journal of Parallel and Distributed Computing, Vol. 74, no. 10, pp. 2983–2993. October 2014. DOI: 10.1016/j.jpdc.2014.06.005. CLAVE: A

§ AUTORES: Nicolas Poggi, David Carrera, Ricard Gavaldà, Eduard Ayguadé and Jordi Torres TITULO: A methodology for the evaluation of high response time on E-commerce users and sales REF. REVISTA: Information Systems Frontiers. Vol. 16, no. 5, pp. 867-885. November 2014. DOI: 10.1007/s10796-012-9387-4. CLAVE: A

§ AUTORES: Tassadaq Hussain, Amna Haider, Shakaib A. Gursal and Eduard Ayguadé

TÍTULO: AMC: Advanced Multi-accelerator Controller REF. REVISTA: Parallel Computing. Vol. 41, pp. 14-30. January 2015. DOI: 10.1016/j.parco.2014.10.003 CLAVE: A

§ AUTORES: Lluc Àlvarez, Lluis Vilanova, Marc Gonzalez, Xavier Martorell, Nacho Navarro and Eduard Ayguadé TITULO: Hardware-Software Coherence Protocol for the Coexistence of Caches and Local Memories REF. REVISTA: IEEE Transactions on Computers. Vol. 64, no. 1, pp. 152-165. January 2015. DOI: 10.1109/TC.2013.194 CLAVE: A


§ AUTORES: Vladimir Gajinov, Srdjan Stipic, Igor Eric, Osman Unsal, Eduard Ayguadé and Adrian Cristal TÍTULO: DaSH: A benchmark suite for hybrid dataflow and shared memory programming models REF. REVISTA: Parallel Computing. Best papers Computing Frontiers 2014. Vol. 45, pp- 18-48. June 2015, DOI: 10.1016/j.parco.2015.03.005 CLAVE11: A

§ AUTORES: Dimitrios Chasapis, Marc Casas, Miquel Moretó, Raul Vidal, Eduard Ayguadé, Jesús Labarta and Mateo Valero TÍTULO: PARSECSs: Evaluating the Impact of Task Parallelism in the PARSEC Benchmark Suite REF. REVISTA: ACM Transactions on Architecture and Code Optimization (TACO), vol. 12, no. 4, article 41. Also presented in 2016 HiPEAC Conference, Prague. January 2016. DOI: 10.1145/2829952. CLAVE: A

§ AUTORES: Edans Sandes, Guillermo Miranda, Xavier Martorell, Eduard Ayguade, George

Teodoro, and Alba Cristina Magalhaes Melo TÍTULO: CUDAlign 4.0: Incremental Speculative Traceback for Exact Chromosome-Wide Alignment in GPU Clusters REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems, vol. 27, No. 10, pp: 2838-2850, October 2016. DOI: 10.1109/TPDS.2016.2515597 CLAVE: A

§ AUTORES: Edans Sandes, Guillermo Miranda, Xavier Martorell, Eduard Ayguadé, George

Teodoro and Alba Cristina Magalhaes Alves de Melo TÍTULO: MASA: A Multiplatform Architecture for Sequence Aligners with Block Pruning REF. REVISTA: ACM Transactions on Parallel Computing (TOPC), Special Issue on PPOPP 2014. Vol. 2, no. 4, article 28. March 2016. DOI: 10.1145/2858656. CLAVE: A

§ AUTORES: Hugo Pérez, Benjamín Hernández, Isaac Rudomin and Eduard Ayguadé

TÍTULO: Task-based Crowd Simulation for Heterogeneous Architectures REF. REVISTA: Innovative Research and Applications in Next-Generation High Performance Computing. IGI Global. pp. 194-219. April 2016. doi:10.4018/978-1-5225-0287-6. ISBN (hardcover): ISBN 9781522502876. CLAVE: CL

§ AUTORES: Carlos Álvarez, Eduard Ayguadé, Javier Bueno, Antonio Filgueras, Daniel Jiménez-González, Xavier Martorell, Nacho Navarro, Dimitris Theodoropoulos, Dionisios N. Pnevmatikatos, Davide Catani, Claudio Scordino, Paolo Gai, Carlos Segura, Carles Fernández, David Oro, Javier Rodríguez Saeta, Pierluigi Passera, Alberto Pomella, Antonio Rizzo, Roberto Giorgi TÍTULO: The AXIOM Software Layers REF. REVISTA: Microprocessors & Microsystems. Volume 47 Issue PB, pp. 262-277. November 2016. DOI: 10.1016/j.micpro.2016.07.002.

§ AUTORES: Darko Zivanovic, Milan Pavlovic, Milan Radulovic, Hyunsung Shin, Jongpil Son, Sally A. McKee, Paul Carpenter, Petar Radojkovic and Eduard Ayguadé TÍTULO: Main Memory in HPC: Do We Need More, or Could We Live with Less? REF. REVISTA: ACM Transactions on Architecture and Code Optimization (TACO): Vol. 14, No. 1, pp. 3:1-3:26. March 2017. DOI: 10.1145/3023362. CLAVE: A


§ AUTORES: Eduard Ayguadé, Rosa M. Badia, Pieter Bellens, Javier Bueno, Alejandro Duran, Yoav Etsion, Montse Farreras, Roger Ferrer, Jesus Labarta, Vladimir Marjanovic, Lluis Martinell, Xavier Martorell, Josep M. Perez, Judit Planas, Alex Ramirez, Xavier Teruel, Ioanna Tsalouchidou and Mateo Valero TÍTULO: Hybrid Heterogeneous Programming with OmpSs and its Software/hardware Implications REF. REVISTA: Programming multicore and many-core computing systems. Sabri Pllana (Editor), Fatos Xhafa (Editor). Wiley Series on "Parallel and Distributed Computing". ISBN: 978-0-470-93690-0. Chapter 5. pp. 101-120. February 2017. CLAVE12: CL

§ AUTORES: Dario García-Gasulla, Eduard Ayguadé, Jesús Labarta, Javier Béjar, Ulises Cortés,

Toyotaro Suzumura and Richard Chen TÍTULO: A Visual Embedding for the Unsupervised Extraction of Abstract Semantics REF. REVISTA: Cognitive Systems Research. Vol. 42, pp. 73-81. May 2017. DOI: 10.1016/j.cogsys.2016.11.008. CLAVE: A

§ AUTORES: Dimitris Theodoropoulos, Somnath Mazumdar, Eduard Ayguadé, Nicola Bettin, Javier

Bueno, Sara Ermini, Antonio Filgueras, Daniel Jiménez-González, Carlos Álvarez-Martínez, Xavier Martorell, Francesco Montefoschi, David Oro, Dionisis N. Pnevmatikatos, Antonio Rizzo, Paolo Gai, Stefano Garzarella, Bruno Morelli, Alberto Pomella, Roberto Giorgi TÍTULO: The AXIOM platform for next-generation cyber physical systems REF. REVISTA: Microprocessors and Microsystems - Embedded Hardware Design. Vol. 52, pp. 540-555. July 2017. DOI: 10.1016/j.micpro.2017.05.018. CLAVE: A

§ AUTORES: Kallia Chronaki, Alejandro Rico, Marc Casas, Miquel Moreto, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta and Mateo Valero TITULO: Task Scheduling Techniques for Asymmetric Multi-core Systems REF. REVISTA: IEEE Transactions on Parallel and Distributed Systems. Vol. 28, no. 7, pp. 2074-2087. July 2017. DOI: 10.1109/TPDS.2016.2633347. CLAVE: A

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Osman S. Unsal, Adrian Cristal and Eduard Ayguadé TÍTULO: Memory Controller for Vector Processor REF. REVISTA: Journal of Signal Processing Systems. available online December 2016, to appear 2017. DOI: 10.1007/s11265-016-1215-5. CLAVE: A

§ AUTORES: Edans Sandes, George Teodoro, Maria Emilia Walter, Xavier Martorell, Eduard Ayguadé and Alba C.M. A. De Melo TITULO: Formalization of Block Pruning: Reducing the Number of Cells Computed in Exact Biological Sequence Comparison Algorithms REF. REVISTA: The Computer Journal, Oxford University Press. Accepted for publication. 2017. CLAVE: A


Participación en contratos de I+D de especial relevancia con Empresas y/o Administraciones (nacionales y/o internacionales)

§ TITULO DEL CONTRATO: Diseño e Implementación de un Sistema Multiprocesador con Buses

Multiplexados EMPRESA/ADMINISTRACION FINANCIADORA: Telefónica DURACION DESDE: Octubre 1985 HASTA: Septiembre 1986 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: Performance-Critical Applications of Parallel Architectures APPARC, Basic Research Action BRA 6634 EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea ESPRIT III DURACION DESDE: Junio 1992 HASTA: Junio 1995 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: Automatic Data Distribution for the CONVEX SPP EMPRESA/ADMINISTRACION FINANCIADORA: CONVEX Computer Corporation and CONVEX Supercomputer S.A.E DURACION DESDE: Noviembre 1992 HASTA: Enero 1995 INVESTIGADOR RESPONSABLE: J. Labarta (Project Manager), E. Ayguadé (Project Leader)

§ TITULO DEL CONTRATO: Advanced Computer Training and Technology Transfer, ACT- UETP University Enterprises Training Partnership EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea COMETT 92/1/7414/Ca DURACION DESDE: Septiembre 1992 HASTA: Septiembre 1994 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: Training in Advanced Computing Applications, Tools and Architectures, ACT-UETP University Enterprises Training Partnership EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea COMETT 94/1/8353/Ca DURACION DESDE: Septiembre 1994 HASTA: Diciembre 1995 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: Integrating Data and Work Distribution in the Exemplar Systems EMPRESA/ADMINISTRACION FINANCIADORA: CONVEX Computer Corporation and CONVEX Supercomputer S.A.E DURACION DESDE: Enero 1995 HASTA: Julio 1995 INVESTIGADOR RESPONSABLE: J. Labarta (Project Manager), E. Ayguadé (Project Leader)

§ TITULO DEL CONTRATO: PARANDES - Parallel Software for Applications in Chilean Industry EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea Esprit, ITDC’94 DURACION DESDE: 1995 HASTA: 1997 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: PARALIN - Parallel Computing Modelling for Industrial Problems EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea Esprit, INCO-DC DURACION DESDE: 1996 HASTA: 1998 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: NANOS - Effective Integration of Fine-grain Parallelism Exploitation and Multiprogramming EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea Esprit, Long Term Research LTR 21907 DURACION DESDE: 1996 HASTA: 1999 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: INTONE – Innovative OpenMP Tools for Non-experts EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-1999-20252. DURACION DESDE: Noviembre 2000 HASTA: Marzo 2003 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: IBM Faculty Partnership Award “OpenMP compiler for the IBM Blue

Gene chip architecture” EMPRESA/ADMINISTRACION FINANCIADORA: IBM International Business Machines Corporation. DURACION DESDE: Mayo 2001 HASTA: Abril 2002 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: POP – Performance Portability of OpenMP

EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-2001-33071. DURACION DESDE: Diciembre 2001 HASTA: Noviembre 2004 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: IBM Faculty Partnership Award “SDSM Support for Easy Management

and Programming of BlueGene Light” EMPRESA/ADMINISTRACION FINANCIADORA: IBM International Business Machines Corporation. DURACION DESDE: Mayo 2003 HASTA: Abril 2004 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: IBM Research Contract “Scalability of MPI for BG/L”

EMPRESA/ADMINISTRACION FINANCIADORA: IBM T.J. Watson Research DURACION DESDE: Marzo 2003 HASTA: Febrero 2005 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: IBM Faculty Partnership Award “Programming models for Blue Gene

Light with emphasis on productivity and performance” EMPRESA/ADMINISTRACION FINANCIADORA: IBM International Business Machines Corporation DURACION DESDE: Mayo 2004 HASTA: Abril 2005 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: BSC-IBM SOW: Cell Programming Models

EMPRESA/ADMINISTRACION FINANCIADORA: IBM Research Watson DURACION DESDE: June 2006 HASTA: May 2008 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: SARC – Scalable Computer Architecture

EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-2006-27648 DURACION DESDE: January 2006 HASTA: December 2009 INVESTIGADOR RESPONSABLE: M. Valero / X. Martorell

§ TITULO DEL CONTRATO: ACOTES – Advanced Compiler Technologies for Embedded Streaming EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-2006-034869 DURACION DESDE: June 2006 HASTA: May 2009 INVESTIGADOR RESPONSABLE: E. Ayguadé / A. Ramirez

§ TITULO DEL CONTRATO: BSC-IBM SOW: Adaptive Systems

EMPRESA/ADMINISTRACION FINANCIADORA: IBM Research Watson DURACION DESDE: December 2006 HASTA: November 2008 INVESTIGADOR RESPONSABLE: J. Torres

§ TITULO DEL CONTRATO: BSC-Microsoft: Transactional Memory and Multicore Systems

EMPRESA/ADMINISTRACION FINANCIADORA: Microsoft DURACION DESDE: Enero 2007 HASTA: December 2008 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: VELOX -- An Integrated Approach to Transactional Memory on Multi-

and Many-core Computers EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-2007-216852 DURACION DESDE: Enero 2008 HASTA: December 2010 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: BSC-IBM MareIncognito project

EMPRESA/ADMINISTRACION FINANCIADORA: IBM Research DURACION DESDE: Julio 2007 HASTA: Junio 2011 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: HiPEAC-2 Network of Excellence (High-performance and Embedded

Architectures and Compilers) EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, FP7/ICT 217068 DURACION DESDE: Febrero 2008 HASTA: Enero 2012 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: HPC-Europa2, Pan-European Research Infrastructure on High-

Performance Computing, JRA2 HPC on Massively Parallel Architectures: Programming models EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Research Infrastructures Initiative, contract no. 228398 DURACION DESDE: Enero 2009 HASTA: Diciembre 2010 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: Programming models and tools for heterogeneous multicore systems EMPRESA/ADMINISTRACION FINANCIADORA: US Air Force, contract num. FA8655-09-1-3075 DURACION DESDE: Junio 2009 HASTA: Mayo 2010 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: TERAFLUX -- Exploiting Dataflow Parallelism in Teradevice Computing EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-2007-249013 DURACION DESDE: January 2010 HASTA: December 2013 INVESTIGADOR RESPONSABLE: M. Valero

§ TITULO DEL CONTRATO: EnCORE -- ENabling technologies for a programmable many-CORE EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-2007-248647 DURACION DESDE: March 2010 HASTA: February 2013 INVESTIGADOR RESPONSABLE: A. Ramirez

§ TITULO DEL CONTRATO: TEXT – Towards Exaflop applicaTions

EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Information Society Technologies, IST-2007-261580 DURACION DESDE: June 2010 HASTA: May 2012 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: HiPEAC-3 Network of Excellence (High-performance and Embedded

Architectures and Compilers) EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, FP7-ICT 287759 DURACION DESDE: January 2012 HASTA: January 2016 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: MONT-BLANC (European scalable and power efficient HPC platform

based on low-power embedded technology) EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, FP7-ICT 288777 DURACION DESDE: October 2011 HASTA: May 2015 INVESTIGADOR RESPONSABLE: A. Ramírez

§ TITULO DEL CONTRATO: Intel-BSC Exascale Lab EMPRESA/ADMINISTRACIÓN FINANCIADORA: Intel Research DURACION DESDE: November 2011 HASTA: October 2017 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: BSC-IBM Technology Center for Supercomputing EMPRESA/ADMINISTRACIÓN FINANCIADORA: IBM Research DURACION DESDE: June 2013 HASTA: December 2015 INVESTIGADOR RESPONSABLE: M. Valero. TECHNICAL COORDINATOR: E. Ayguadé

§ TITULO DEL CONTRATO: MONT-BLANC2 (European scalable and power efficient HPC platform

based on low-power embedded technology) EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, FP7-ICT 288777 DURACION DESDE: October 2013 HASTA: September 2016 INVESTIGADOR RESPONSABLE: A. Ramírez

§ TITULO DEL CONTRATO: AXIOM (Agile, eXtensible, fast I/O Module for the cyber-physical era)

EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, H2020 645496 DURACION DESDE: January 2015 HASTA: January 2018 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: ExaNode (European Exascale Processor Memory Node Design)

EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, H2020 671578 DURACION DESDE: October 2015 HASTA: September 2018 INVESTIGADOR RESPONSABLE: E. Ayguadé

§ TITULO DEL CONTRATO: INTERWINE (Programming Model INTERoperability ToWards Exascale) EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, H2020 671602 DURACION DESDE: September 2015 HASTA: August 2018 INVESTIGADOR RESPONSABLE: V. Beltran

§ TITULO DEL CONTRATO: Mont-Blanc 3 project

EMPRESA/ADMINISTRACION FINANCIADORA: Comunidad Económica Europea, Computing Systems, H2020 671602 DURACION DESDE: October 2015 HASTA: September 2018 INVESTIGADOR RESPONSABLE: J. Labarta

§ TITULO DEL CONTRATO: BSC-IBM Deep Learning Research Agreement

EMPRESA/ADMINISTRACIÓN FINANCIADORA: IBM Research DURACION DESDE: January 2016 HASTA: December 2016 INVESTIGADOR RESPONSABLE: M. Valero. TECHNICAL COORDINATOR: E. Ayguadé

§ TITULO DEL CONTRATO: LG-BSC Collaboration Agreement

EMPRESA/ADMINISTRACIÓN FINANCIADORA: LG Mobile DURACION DESDE: April 2016 HASTA: March 2017 INVESTIGADOR RESPONSABLE: E. Ayguadé

Patentes y Modelos de utilidad INVENTORES: M. Valero, M. Peiron y E. Ayguadé TITULO: Sincronización del Acceso a la Memoria de Multiprocesadores Vectoriales NUM. DE REGISTRO: P-9401905 AÑO: 1994 ENTIDAD TITULAR: Universitat Politècnica de Catalunya PAISES: España INVENTORES: Eduard Ayguade, Tong Chen, Alexandre E. Eichenberger, Marc Gonzalez, Xavier Martorell, John K. O'Brien, Kathryn M. O'Brien, Zehra N. Sura and Tao Zhang TITULO: Data Transfer Optimized Software Cache for REGULAR Memory References NUM. DE REGISTRO: Serial No.: 057447, Series Code:12 AÑO: March 28, 2008 (filed) ENTIDAD TITULAR: INTERNATIONAL BUSINESS MACHINES CORPORATION PAISES: USA INVENTORES: Eduard Ayguade, Tong Chen, Alexandre E. Eichenberger, Marc Gonzalez, Xavier Martorell, John K. O'Brien, Kathryn M. O'Brien, Zehra N. Sura and Tao Zhang TITULO: Data Transfer Optimized Software Cache for IRREGULAR Memory References NUM. DE REGISTRO: Serial No.: 057456, Series Code:12 AÑO: March 28, 2008 (filed) ENTIDAD TITULAR: INTERNATIONAL BUSINESS MACHINES CORPORATION PAISES: USA

Estancias en Centros extranjeros Centro: Center for Supercomputing Research and Development (CSRD), University of Ilinois at Urbana-Champaign Localidad: Urbana (Illinois) País USA Fecha: 1994 Duración (semanas): 4 Tema: Compiladores para Supercomputadores Clave: Invitado Centro: Université Polytechnique de Bobo-Dioulasso Localidad: Bobo-Dioulasso País Burkina Fasso Fecha: 2008-2009 Duración (semanas): 4 (en dos años) Tema: Parallel Architectures and Programming Clave: Invitado

Contribuciones a Congresos § AUTORES: J. Labarta and E. Ayguadé

TITULO: GTS: Extracting Full Parallelism Out of DO Loops CONGRESO: PARLE’89, Parallel Architectures and Languages Europe. PUBLICACIÓN: Lectures in Computer Science, Springer-Verlag. No. 366, pp. 43-54. June 1989. ISSN/ISBN: 0302-9743

§ AUTORES: E. Ayguadé and J. Labarta, J. Torres and P. Borensztejn TITULO: GTS: Parallelization and Vectorization of Tight Recurrences CONGRESO: ACM/IEEE Supercomputing’89, Reno-Nevada. pp. 531-539. November 1989.

§ AUTORES: E. Ayguadé, J. Labarta, J. Torres, J.M. Llabería and M. Valero

TITULO: Parallelism Evaluation and Partitioning of Nested Loops for Shared-Memory Multiprocessors CONGRESO: 3rd Workshop on Languages and Compilers for Parallel Computing, Irvine (CA), August 1990. PUBLICACIÓN: Advances in Programming Languages and Compilers for Parallel Computing, A. Nicolau et al. (Eds.), chapter 11 (pp. 220-242), Pitman/The MIT Press, 1991. ISSN/ISBN: 0273088416

§ AUTORES: E. Ayguadé, J. Labarta, J. Torres, J.M. Llabería and M. Valero TITULO: Nested-Loop Partitioning for Shared-Memory Multiprocessor Systems CONGRESO: 2nd International Workshop on Compilers for Parallel Computers, Paris (France). pp. 378-385. December 1990. También en 1as Jornadas de Paralelismo, Sitges-Barcelona (España). Septiembre 1990.

§ AUTORES: R. Badia, J. Cortadella and E. Ayguadé TITULO: Computer-aided Synthesis of Data-path by Using a Simulated-annealing-based Approach CONGRESO: 9th International Symposium on Applied Informatics, Innsbruck, Austria. pp. 326-329. February 1991

§ AUTORES: J. Torres, E. Ayguadé, J. Labarta, J.M. Llaberia, and M. Valero TITULO: Automatic Data-Mapping for Distributed-Memory Multiprocessors Systems CONGRESO: 9th International Symposium on Applied Informatics, Innsbruck, Austria. pp. 347-350. February 1991

§ AUTORES: J. Cortadella, R. Badia and E. Ayguadé, TITULO: Scheduling in a Continuous Area-Time Design Space: A Simulated-annealing-based Approach CONGRESO: 5th Int. Workshop on High-level Synthesis, Germany. pp. 102-117. March 1991

§ AUTORES: J. Torres, E. Ayguadé, J. Labarta, J.M. Llaberia and M. Valero, TITULO: On Automatic Loop Data-Mapping for Distributed-Memory Multiprocessors CONGRESO: 2nd European Distributed Memory Computing Conference, Munich-Germany. También en 2as Jornadas de Paralelismo, El Escorial-Madrid (Spain), 1991. PUBLICACIÓN: Lecture Notes in Computer Science, Springer-Verlag. Vol. 487, pp. 173-182. April 1991

§ AUTORES: J. Labarta, E. Ayguadé, J. Torres, J.M. Llabería and M. Valero TITULO: Balanced Loop Partitioning Using GTS CONGRESO: Fourth Workshop on Languages and Compilers for Parallel Computing, Santa Clara (CA), August 1991. PUBLICACIÓN: Languages and Compilers for Parallel Computing, U. Banerjee et al. (Eds.), chapter 19 (pp. 298-312), Lecture Notes in Computer Science, Springer-Verlag. Vol. 589. 1992 ISSN/ISBN: 354055422

§ AUTORES: J. Cortadella, R. Badia and E. Ayguadé TITULO: Scheduling in a Continuous Area-Time Design Space CONGRESO: 17th EUROMICRO Conference. September 1991 PUBLICACIÓN: Microprocessing and Microprogramming, North Holland. Vol. 32, no. 1-5, pp. 199-206.

§ AUTORES: M. Valero, T. Lang, J.M. Llabería, M. Peiron, E. Ayguadé and J.J. Navarro TITULO: Increasing the Number of Strides for Conflict-Free Vector Access CONGRESO: ISCA’92, International Symposium on Computer Architecture, Gold Coast (Australia). In ACM Computer Architecture News. Vol. 20, no. 2, pp. 372-381. May 1992 ISSN/ISBN: 0163-5964. DOI: 10.1145/146628.140400.

§ AUTORES: M. Valero, T. Lang and E. Ayguadé TITULO: Conflict-Free Access of Vectors with Power-of-Two Strides CONGRESO: 6th ACM International Conference on Supercomputing ICS, Washington. pp. 149-156. July 1992

§ AUTORES: J. Torres, E. Ayguadé, J. Labarta, M. Valero and J.M. Llaberia TITULO: Partitioning the Iteration Space for Distributed-Memory Multiprocessors CONGRESO: Int. Conference on Parallel Computing and Transputer Applications, IOS Press, Barcelona. pp. 683-692. September 1992 ISSN/ISBN: 9051990960

§ AUTORES: J. Llosa, E. Ayguadé and J. Labarta TITULO: Design of a Shared-Memory Cluster for a Distributed-Memory Multiprocessor CONGRESO: Int. Conference on Parallel Computing and Transputer Applications, Barcelona. pp. 526-535. September 1992

§ AUTORES: M. Valero, M. Peiron and E. Ayguadé TITULO: Access to Streams in Multiprocessor Systems CONGRESO: EUROMICRO Workshop on Parallel and Distributed Processing, Gran Canaria. pp. 310-316. January 1993

§ AUTORES: J. Torres, E. Ayguadé, J. Labarta and J. Llosa TITULO: Parallel Execution of Loops with Conditional Statements CONGRESO:11th International Conference Applied Informatics, Annecy, France. pp. 37-40. May 1993

§ AUTORES: E. Ayguadé and J. Torres TITULO: Partitioning the Statement per Iteration Space Using Non-singular Matrices CONGRESO: 7th ACM International Conference on Supercomputing ICS, Tokyo, Japan. pp. 407-415. July 1993

§ AUTORES: J. Torres, E. Ayguadé, J. Labarta and M. Valero TITULO: Align and Distribute based Linear Loop Transformations CONGRESO: Sixth Workshop on Languages and Compilers for Parallel Computing, Portland (OR), August 1993. PUBLICACIÓN: Languages and Compilers for Parallel Computing, U. Banerjee et al. (Eds.), Lecture Notes in Computer Science, Springer-Verlag. Vol. 768, pp. 321-339. 1994 ISSN/ISBN: 3-540-57659-2

§ AUTORES: M. Peiron, M. Valero, E. Ayguadé and T. Lang TITULO: Conflict-Free Access to Streams in Multiprocessor Systems CONGRESO: 19th EUROMICRO Conference, Barcelona. PUBLICACIÓN: Microprocessing and Microprogramming. Vol. 38, no. 1-5, pp. 119-130. September 1993. ISSN/ISBN: 0165-6074

§ AUTORES: E. Ayguadé, J. Labarta, J. Garcia, M. Gironès and M. Valero TITULO: A Study of Data Sets and Affinity in the Perfect ClubTM CONGRESO: 4th International Workshop on Compilers for Parallel Computers, Delft (The Netherlands). pp. 5-16. December 1993

§ AUTORES: M. Valero, M. Peiron and E. Ayguadé TITULO: Access to Vectors in Multi-Module Memories CONGRESO: 2nd EUROMICRO Workshop on Parallel and Distributed Processing, Malaga. pp. 228-236. January 1994

§ AUTORES: M. Peiron M. Valero, and E. Ayguadé TITULO: Synchronized Access to Streams in SIMD Vector Multiprocessors CONGRESO: 8th ACM International Conference on Supercomputing ICS, Manchester (UK). pp. 23-32. July 1994

§ AUTORES: E. Ayguadé, J. Garcia, M. Girones, J. Labarta, J. Torres and M. Valero TITULO: Detecting and Using Affinity in an Automatic Data Distribution Tool CONGRESO: 7th Workshop on Languages and Compilers for Parallel Computing, Ithaca (NY), August 1994. PUBLICACIÓN: Languages and Compilers for Parallel Computing, (Springer-Verlag), K. Pingali et al. (Eds.), Lecture Notes in Computer Science, Springer-Verlag. Vol. 892. pp. 61-75. 1995

§ AUTORES: M. Valero, M. Peiron and E. Ayguadé TITULO: Memory Access Synchronization in Vector Multiprocessors CONGRESO: CONPAR 94 - VAPP VI, Linz (Austria). PUBLICACIÓN: Lecture Notes in Computer Science, Springer-Verlag. Vol. 854, pp. 414-425. September 1994

§ AUTORES: J. Llosa, M. Valero, J. Fortes and E. Ayguadé TITULO: Using Sacks to Organize Registers in VLIW Machines CONGRESO: CONPAR 94 - VAPP VI, Linz (Austria). PUBLICACIÓN: Lecture Notes in Computer Science, Springer-Verlag. Vol. 854, pp. 628-639. September 1994

§ AUTORES: E. Ayguadé, J. Labarta, J. Garcia, M. Gironès and M. Valero TITULO: Detecting Affinity for Automatic Data Distribution CONGRESO: 2nd International Workshop on Massive Parallelism, Capri-Italy, pp. 32-46. October 1994

§ AUTORES: J. Llosa, M. Valero, E. Ayguadé, and J. Labarta TITULO: Register Requirements of Software Pipelined Loops and its Effects on Performance CONGRESO: 2nd International Workshop on Massive Parallelism, Capri-Italy, pp. 173-189. October 1994

§ AUTORES: C. Barrado, J. Labarta and E. Ayguadé TITULO: An Efficient Scheduling for DOACROSS Loops CONGRESO: Parallel and Distributed Computing and Systems, Washington DC. pp. 303-307. October 1994

§ AUTORES: R. Espasa, M. Valero, D. Padua, M. Jiménez and E. Ayguadé TITULO: Quantitative Analysis of Vector Code CONGRESO: 3rd EUROMICRO Workshop on Parallel and Distributed Processing, San Remo (Italia). pp. 452-461. January 1995

§ AUTORES: J. Llosa, M. Valero and E. Ayguadé TITULO: Non-consistent Dual Register Files to Reduce Register Pressure CONGRESO: IEEE Int. Symp. on High-Performance Computer Architecture HPCA-1, Raleigh (USA), pp. 22-31. January 1995

§ AUTORES: J. Garcia, E. Ayguadé and J. Labarta TITULO: A Novel Approach Towards Automatic Data Distribution CONGRESO: 2nd Workshop on Automatic Data Layout and Performance Prediction, 18-21/4/1995, Rice University. PUBLICACIÓN: CRPC Technical Report CRPC-TR95548, Houston-TX (USA), April 1995

§ AUTORES: M. Peiron, M. Valero, E. Ayguadé and T. Lang TITULO: Vector Multiprocessors with Arbitrated Memory Access CONGRESO: 22nd Int. Symposium on Computer Architecture, S. Margherita Ligure (Italy). PUBLICACIÓN: ACM Computer Architecture News. Vol. 23, no. 2, pp. 243-252. June 1995

§ AUTORES: C. Barrado, J. Labarta, E. Ayguadé and M. Valero TITULO: Automatic Generation of Loop Schedulings for VLIW CONGRESO: 3rd Parallel Architectures and Compilation Techniques PACT’95, Cyprus (Greece). pp. 306-309. June 1995

§ AUTORES: J. Torres, E. Ayguadé, J. Labarta, and M. Valero TITULO: Revisiting Framework of Linear Loop Transformations CONGRESO: 5th International Workshop on Compilers for Parallel Computers, Malaga. pp. 187-199. June 1995

§ AUTORES: C. Barrado, J. Labarta, E. Ayguadé, and M. Valero TITULO: Generating a Periodic Pattern for VLIW CONGRESO: 5th International Workshop on Compilers for Parallel Computers, Malaga. pp. 485-502. June 1995

§ AUTORES: J. Llosa, M. Valero, and E. Ayguadé TITULO: Bidirectional Scheduling to Minimize Register Requirements CONGRESO: 5th International Workshop on Compilers for Parallel Computers, Malaga. pp. 534-554. June 1995 CLAVE: Conf

§ AUTORES: E. Ayguadé, C. Barrado, J. Labarta, J. Llosa, D. Lopez, S. Moreno, D. Padua, E. Riera and M. Valero TITULO: ICTINEO: Una Herramienta para la Investigación en Paralelismo a Nivel de Instrucciones CONGRESO: 6as Jornadas de Paralelismo, Barcelona (Spain). Julio 1995

§ AUTORES: E. Ayguadé, J. Garcia, M. Girones, M.L. Grande and J. Labarta TITULO: Data Redistribution in an Automatic Data Distribution Tool CONGRESO: 8th Workshop on Languages and Compilers for Parallel Computing, San Jose (CA), August 1995. PUBLICACIÓN: Languages and Compilers for Parallel Computing, (Springer-Verlag), Huang et al. (Eds.) Lecture Notes in Computer Science, Springer-Verlag. Vol. 1033, pp. 271-287. 1996

§ AUTORES: E. Ayguadé, P. Knijnenburg, and J. Torres, TITULO: Multi-transformations: Definition and Usefulness CONGRESO: XV Int. Conference of the Chilean Computer Science Society, Arica-Chile. pp. 37-47. October 1995

§ AUTORES: J. Garcia, E. Ayguadé and J. Labarta, TITULO: A Novel Approach Towards Automatic Static Data Distribution CONGRESO: IEEE/ACM Supercomputing’95, Pp. 78-78, San Diego-CA (USA). December 1995

§ AUTORES: J. Llosa, M. Valero, E. Ayguadé and A. Gonzalez, TITULO: Hypernode Reduction Modulo Scheduling CONGRESO: MICRO-28, 28th International Symposium on Microarchitecture, Ann Arbor-MI (USA). pp. 350-360. December 1995

§ AUTORES: J. Torres, E. Ayguadé, J. Labarta, and M. Valero TITULO: Loop Parallelization: Revisiting Framework of Linear Loop Transformations CONGRESO: 4th EUROMICRO Workshop on Parallel and Distributed Processing, Braga (Portugal). pp. 420-427. January 1996

§ AUTORES: X. Martorell, J. Labarta, J.I. Navarro and E. Ayguadé TITULO: A Library Implementation of the Nano-Threads Programming Model CONGRESO: Euro-Par’96, Lyon (France). PUBLICACIÓN: Lecture Notes in Computer Science, Springer-Verlag. Vol. 1124, pp. 644-649. August 1996

§ AUTORES: E. Ayguadé, J. Garcia, M. L. Grande, and J. Labarta, TITULO: Data Distribution and Loop Parallelization for Shared-memory Multiprocessors, CONGRESO: Ninth Workshop on Languages and Compilers for Parallel Computing, San Jose (CA). August 1996. PUBLICACIÓN: Languages and Compilers for Parallel Computing, (Springer-Verlag), D. Sehr et al. (Eds.) Lecture Notes in Computer Science, Springer-Verlag. Vol. 1239, pp. 41-55. 1997

§ AUTORES: J. Llosa, A. Gonzalez, E. Ayguadé and M. Valero, TITULO: Swing Modulo Scheduling: A Lifetime-Sensitive Approach CONGRESO: 4th Parallel Architectures and Compilation Techniques PACT’96, Boston (MA). pp. 80-86. October 1996

§ AUTORES: J. Garcia, E. Ayguadé, and J. Labarta, TITULO: A Framework for Automatic Dynamic Data Mapping, CONGRESO: Eighth IEEE Symposium on Parallel and Distributed Processing SPDP’96, New Orleans (Louisiana). pp. 92-99. October 1996

§ AUTORES: J. Garcia, E. Ayguadé and J. Labarta, TITULO: Dynamic Data Distribution with Control Flow Analysis CONGRESO: IEEE/ACM Supercomputing’96, Pittsburgh (PA). November 1996

§ AUTORES: E. Ayguadé, J. Garcia, M. L. Grande and J. Labarta, TITULO: Using Pipelined Computations in Parallelizing Compilers CONGRESO: XVI International Conference of the Chilean Computer Sciency Society, Valdivia (Chile). pp. 165-174. November 1996.

§ AUTORES: J. Llosa, M. Valero, and E. Ayguadé TITULO: Heuristics for Register-constrained Software Pipelining CONGRESO: 29th International Symposium on Microarchitecture (MICRO-29), Paris (France). pp. 250-261. December 1996.

§ AUTORES: J. Garcia, E. Ayguadé, and J. Labarta, TITULO: Two-dimensional Data Redistribution with Constant Topology CONGRESO: 3rd Workshop on Automatic Data Layout and Performance Prediction. January 9-10 1997, Barcelona.

§ AUTORES: X. Martorell, J. Labarta, J.I. Navarro and E. Ayguadé TITULO: Analysis of Several Scheduling Algorithms under the Nano-Threads Programming Model CONGRESO: 11th IEEE International Parallel Processing Symposium IPPS’97, pp. 281-287, Geneve (Suiza). April 1997

§ AUTORES: D. Lopez, M. Valero, J. Llosa and E. Ayguadé TITULO: Increasing Memory Bandwidth with Wide Busses: Compiler, Hardware and Performance Trade-offs CONGRESO: 11th International Conference on Supercomputing (ICS’97), Vienna (Austria). pp. 12-19. July 1997

§ AUTORES: E. Ayguadé, X. Martorell, J. Labarta, M. Gonzalez and J.I. Navarro TITULO: Exploiting Parallelism Through Directives on the Nano-Threads Programming Model CONGRESO: 10th Workshop on Programming Languages and Compilers for Parallel Computing, Minneapolis (USA), August 1997. PUBLICACIÓN: Languages and Compilers for Parallel Computing, (Springer-Verlag), Zhiyuan Li et al. (Eds.) Lecture Notes in Computer Science, Springer-Verlag. Vol. 1366, pp. 307-321. 1998

§ AUTORES: D. Lopez, J. Llosa, M. Valero and E. Ayguadé TITULO: Resource Widening vs. Replication: Limits and Performance-cost Trade-off CONGRESO: 12nd International Conference on Supercomputing (ICS’98), Melbourne (Australia). pp. 441-448. July 1998

§ AUTORES: D. Lopez, J. Llosa, M. Valero and E. Ayguadé TITULO: Widening Resources: A Cost-effective Technique for Aggressive ILP Architectures CONGRESO: 31st Annual International Symposium on Microarchitecture (Micro-31), Dallas, TX (USA). pp. 237-246. November 1998. También en Jornadas de Paralelismo, San Sebastian (España). pp. 243-250. September 1998.

§ AUTORES: X. Martorell, E. Ayguadé, N. Navarro, J. Corbalan, M. Gonzalez and J. Labarta TITULO: Thread Fork/join Techniques for Multi-level Parallelism Exploitation in NUMA Multiprocessors CONGRESO: 13th International Conference on Supercomputing (ICS’99), Rhodes (Greece). pp. 294-301. June 1999.

§ AUTORES: I. Martel, D. Ortega, E. Ayguadé and M. Valero TITULO: Increasing Effective IPC by Exploiting Distant Parallelism CONGRESO: 13th International Conference on Supercomputing (ICS’99), Rhodes (Greece). pp. 348-355. June 1999.

§ AUTORES: M. Kandermir, P. Banerjee, A. Choudhary, J. Ramanujam and E. Ayguadé TITULO: An Integer Linear Programming Approach for Optimizing Cache Locality CONGRESO: 13th International Conference on Supercomputing (ICS’99), Rhodes (Greece). pp. 500-509. June 1999.

§ AUTORES: X. Martorell, E. Ayguadé, J. Labarta and N. Navarro TITULO: Improving the Performance of Multiprogrammed Workloads in Origin2000 Systems CONGRESO: 5th European Cray/SGI MPP Workshop, Bologna (Italy). pp. 70-80. September 1999.

§ AUTORES: D. Ortega, I. Martel, V. Krishnan, E. Ayguadé and M. Valero TITULO: A Characterization of Parallel SPECint Programs in Simultaneous Multithreading Architectures CONGRESO: X Jornadas de Paralelismo, Murcia (Spain). pp. 119-124. September 1999.

§ AUTORES: J. Zalamea, J. Llosa, E. Ayguadé and M. Valero TITULO: Memory Controlled Spill Code for Software Pipelining CONGRESO: X Jornadas de Paralelismo, Murcia (Spain). pp. 131-136. September 1999.

§ AUTORES: D. Lopez, J. Llosa, E. Ayguadé and M. Valero TITULO: Impact on Performance of Fused Multiply-Add Functional Units in Aggressive VLIW Architectures CONGRESO: 29th Annual International Conference on Parallel Processing (ICPP’99), Aizu (Japan). pp. 22-29. September 1999.

§ AUTORES: E. Ayguadé, X. Martorell, J. Labarta, M. Gonzalez and N. Navarro TITULO: Exploiting Multiple Levels of Parallelism in OpenMP: A Case Study CONGRESO: 29th Annual International Conference on Parallel Processing (ICPP’99), Aizu (Japan). pp. 172-180. September 1999.

§ AUTORES: E. Ayguadé, M. Gonzalez, J. Labarta, X. Martorell, N. Navarro, J. Oliver TITULO: NanosCompiler: A Research Infrastructure for OpenMP Extensions CONGRESO: 1st European Workshop on OpenMP (EWOMP’99), Lund (Sweden). pp. 27-31. September/October 1999.

§ AUTORES: D. Ortega, I. Martel, V. Krishnan, E. Ayguadé and M. Valero TITULO: Quantifying the Benefits of SPECint Distant Parallelism in Simultaneous Multi-threading Architectures CONGRESO: International Conference on Parallel Architectures and Compilation Techniques (PACT’99), Newport Beach-CA (USA). pp. 117-124. October 1999.

§ AUTORES: M. Gonzalez, X. Martorell, J. Oliver, E. Ayguadé and J. Labarta TITULO: Code Generation and Run-time Support for Multi-level Parallelism Exploitation CONGRESO: 8th International Workshop on Compilers for Parallel Computing (CPC’00), Aussois (France). pp. 291-301. January 2000.

§ AUTORES: M. Gonzalez, A. Serra, X. Martorell, J. Oliver, E. Ayguadé, J. Labarta and N. Navarro TITULO: Applying Interposition Techniques for Performance Analysis of OpenMP Parallel Applications CONGRESO: IEEE 2000 International Parallel and Distributed Processing Symposium (IPDPS’2000), Cancun (Mexico). pp. 235-240. May 1-5, 2000.

§ AUTORES: D.S. Nikolopoulos, T.S. Papatheodorou, C.D. Polychronopoulos, J. Labarta and E. Ayguadé TITULO: A Case for User-level Dynamic Page Migration CONGRESO: 14th ACM International Conference on Supercomputing (ICS’00), Santa Fe, New Mexico (USA). pp. 119-130. May 8-11, 2000.

§ AUTORES: J. Guitart, J. Torres, E. Ayguadé, J. Oliver and J. Labarta TITULO: Java Instrumentation Suite: Accurate Analysis of Java Threaded Applications CONGRESO: 2nd Workshop on Java for High Performance Computing (part of the 14th ACM International Conference on Supercomputing ICS’00), Santa Fe, New Mexico (USA). pp. 15-25. May 7, 2000.

§ AUTORES: D.S. Nikolopoulos, T.S. Papatheodorou, C.D. Polychronopoulos, J. Labarta and E. Ayguadé TITULO: UPMLib: A Runtime System for Tuning the Memory Performance of OpenMP Programs on Scalable Shared-memory Multiprocessors CONGRESO: 5th ACM Workshop on Languages, Compilers, and Run-time Systems for Scalable Computers (LCR2000), University of Rochester, Rochester NY (USA). May 2000. PUBLICACIÓN: Lecture Notes in Computer Science LNCS 1915. Sandhya Dwarkadas (Ed.). pp. 85-99. Springer.

§ AUTORES: J. Oliver, E. Ayguadé and N. Navarro TITULO: Towards an Efficient Exploitation of Loop-level Parallelism in Java CONGRESO: ACM Java Grande 2000 Conference, San Francisco CA (USA). pp. 9-15. June 2-4, 2000.

§ AUTORES: J. Zalamea, J. Llosa, E. Ayguadé and M. Valero TITULO: Improved Spill Code Generation for Software Pipelined Loops CONGRESO: ACM SIGPLAN 2000 Conference on Programming Language Design and Implementation (PLDI’00), Vancouber B.C. (Canada). June 12-14, 2000. In ACM SIGPLAN Notices, Vol. 35, No. 5, pp. 134-144. DOI: 10.1145/349299.349319.

§ AUTORES: D.S. Nikolopoulos, T.S. Papatheodorou, C.D. Polychronopoulos, J. Labarta and E. Ayguadé TITULO: User-level Dynamic Page Migration for Multiprogrammed Shared-memory Multiprocessors. CONGRESO: 30th Annual International Conference on Parallel Processing (ICPP’00), Vancouver (Canada). pp. 95-103. August 2000.

§ AUTORES: M. Gonzalez, J. Oliver, X. Martorell, E. Ayguadé, J. Labarta and N. Navarro TITULO: OpenMP Extensions for Thread Groups and Their Run-time Support CONGRESO: 13th International Workshop on Languages and Compilers for Parallel Computing (LCPC’2000), New York (USA). pp. 317-331. August, 2000. PUBLICACIÓN: Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science LNCS 2017. S.P. Midkiff, J.E. Moreira, M. Gupta, S. Chatterjee, J. Ferrante, J. Prins, W. Pugh, C.-W. Tseng (Eds.). pp. 324-338. 2001.

§ AUTORES: M. Gonzalez, J. Oliver, X. Martorell, E. Ayguadé, J. Labarta and N. Navarro

TITULO: Precedence Relations in the OpenMP Programming Model CONGRESO: 2nd European Workshop on OpenMP (EWOMP’00), pp. 58-67. Edimburgh (UK), September 2000.

§ AUTORES: J. Labarta, E. Ayguadé, J. Oliver and D. Henty TITULO: New OpenMP Directives for Irregular Data Access Loops CONGRESO: 2nd European Workshop on OpenMP (EWOMP’00), pp. 91-97. Edimburgh (UK), September 2000.

§ AUTORES: D.S. Nikolopoulos, T.S. Papatheodorou, C.D. Polychronopoulos, J. Labarta and E. Ayguadé TITULO: Leveraging Transparent Data Distribution in OpenMP via User-level Dynamic Page Migration. CONGRESO: 3rd International Symposium on High-Performance Computing, Workshop on OpenMP: Experiences and Implementations, Tokyo (Japan). October 2000. PUBLICACIÓN: High Performance Computing, M. Valero, K. Joe, M. Kitsuregawa and H. Tanaka (Eds.), Lecture Notes on Computer Science LNCS 1940, pp. 415-ff, Springer-Verlag. October 2000.

§ AUTORES: R. A.L Gonçalves, E. Ayguadé, M. Valero and P. Navaux TITULO: A Simulator for SMT Architectures: Evaluating Instruction Cache Topologies. CONGRESO: 12th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD

§ ’2000), Sao Paulo (Brasil). pp. 279-286. October 2000.

§ AUTORES: D.S. Nikolopoulos, T.S. Papatheodorou, C.D. Polychronopoulos, J. Labarta and E. Ayguadé TITULO: Is Data Distribution Necessary in OpenMP? CONGRESO: IEEE/ACM Supercomputing’2000: High Performance Computing and Networking Conference, Dallas-TX (USA). November 2000. SC’2000 Best Paper Award

§ AUTORES: J. Zalamea, J. Llosa, E. Ayguadé and M. Valero TITULO: Two-level Hierarchical Register File Organization for VLIW Processors CONGRESO: 33rd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-33), Monterrey CA (USA). pp. 137-146. December, 2000.

§ AUTORES: J. Guitart, J. Torres and E. Ayguadé TITULO: Efficient Execution of Parallel Java Applications CONGRESO: 3rd Workshop on Java for High-Performance Computing, in conjunction with the 15th International Conference on Supercomputing (ICS’01). Sorrento (Italy). pp. 31-35. June 2001.

§ AUTORES: D.S. Nikolopoulos, E. Ayguadé, T.S. Papatheodorou, C.D. Polychronopoulos and J. Labarta TITULO: The Trade-off between Implicit and Explicit Data Distribution in Shared-memory Programming Paradigms CONGRESO: 15th International Conference on Supercomputing (ICS’01). pp. 23-37. ACM Press. Sorrento (Italy). June 2001.

§ AUTORES: D. Ortega, M. Valero and E. Ayguadé TITULO: A Novel Mechanism that Boosts Software Prefetching CONGRESO: 15th International Conference on Supercomputing (ICS’01). Sorrento (Italy). pp. 501-510. June 2001.

§ AUTORES: J. Zalamea, J. Llosa, E. Ayguadé and M. Valero TITULO: Software and Hardware Techniques to Optimize Register File Utilization in VLIW Architectures CONGRESO: The International Workshop on Advanced Compiler Technology for High Performance and Embedded Systems (IWACT). July 2001.

§ AUTORES: M. Gonzalez, E. Ayguadé, X. Martorell and J. Labarta TITULO: Defining and Supporting Pipelined Executions in OpenMP CONGRESO: 2nd International Workshop on OpenMP Applications and Tools (WOMPAT-2001). July 2001. PUBLICATION: OpenMP Shared Memory Parallel Programming, R. Eigenmann and M. Voss (Eds.), Lecture Notes on Computer Science LNCS 2104, pp. 155-169, Springer. 2001.

§ AUTORES: D. Nikolopoulos and E. Ayguadé TITULO: A Study of Implicit Data Distribution Methods for OpenMP Using the SPEC Benchmarks CONGRESO: 2nd International Workshop on OpenMP Applications and Tools (WOMPAT-2001). July 2001. PUBLICATION: OpenMP Shared Memory Parallel Programming, R. Eigenmann and M. Voss (Eds.), Lecture Notes on Computer Science LNCS 2104, pp. 115-129, Springer. 2001.

§ AUTORES: J. Zalamea, J. Llosa, E. Ayguadé and M. Valero TITULO: MIRS: Modulo Scheduling with Integrated Register Spilling CONGRESO: 14th Workshop on Languages and Compilers for Parallel Computing. Cumberland Falls, Kentucky (USA). August 2001. PUBLICATION: Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science LNCS 2624, pp. 239-253, May 2003.

§ AUTORES: E. Ayguadé, F. Dahlgren, C. Eisenbeis, R. Espasa, G. G. Gao, H. Mueller, R. Sakellariou adn A. Seznec TITULO: Instruction-level Parallelism and Computer Architecture (Foreword to Euro-Par’2001 Conference Track) CONGRESO: Euro-Par’2001: Parallel Processing. PUBLICATION: Lecture Notes in Computer Science LNCS 2150, Springer. pp. 385-385. August 2001.

§ AUTORES: D. Nikolopoulos, E. Artiaga, E. Ayguadé and J. Labarta TITULO: Exploiting Memory Affinity in OpenMP through Schedule Reuse CONGRESO: 3rd European Workshop on OpenMP (EWOMP’01) in conjunction with the 10th International Conference on Parallel Architectures and Compilation Techniques (PACT’01). pp. 85-92. Barcelona (Spain) September 2001.

§ AUTORES: E. Ayguadé, M. Brorsson, H. Brunst, H.-C. Hoppe, S. Karlsson, X. Martorell, W.E. Nagel, F. Schlimbach, G. Utrera and M. Winkler TITULO: OpenMP Performance Analysis Approach in the INTONE Project CONGRESO: 3rd European Workshop on OpenMP (EWOMP’01) in conjunction with the 10th International Conference on Parallel Architectures and Compilation Techniques (PACT’01). pp. 19-25. Barcelona (Spain), September 2001.

§ AUTORES: H. Jin, G. Jost, J. Yan, E. Ayguadé, M. Gonzalez and X. Martorell. TITULO: Automatic Multilevel Parallelization Using OpenMP CONGRESO: 3rd European Workshop on OpenMP (EWOMP’01) in conjunction with the 10th International Conference on Parallel Architectures and Compilation Techniques (PACT’01). pp. 45-55. Barcelona (Spain), September 2001.

§ AUTORES: M. Gonzalez, E. Ayguadé, X. Martorell and J. Labarta

TITULO: Complex Pipelined Executions in OpenMP Parallel Applications CONGRESO: International Conference on Parallel Processing (ICPP’01). pp. 295-302. Valencia (Spain). September 2001.

§ AUTORES: J. Guitart, J. Torres, E. Ayguadé and M. Bull TITULO: Performance Analysis of Parallel Java Applications on Shared-memory Systems CONGRESO: International Conference on Parallel Processing (ICPP’01). pp. 357-364. Valencia (Spain). September 2001.

§ AUTORES: R. A.L Gonçalves, E. Ayguadé, M. Valero and P. Navaux TITULO: Performance Evaluation of Decoding and Dispatching Stages in Simultaneous Multithreaded Architectures. CONGRESO: 13th Symposium on Computer Architecture and High Performance Computing (SBAC-PAD’2001), Pirenópolis (Brasil). pp. 90-97. September 2001.

§ AUTORES: D. Nikolopoulos, E. Ayguadé and C. D. Polychronopoulos TITULO: Scaling Irregular Parallel Codes with Minimal Programming Effort. CONGRESO: ACM/IEEE Supercomputing’2001: High Performance Networking and Computing Conference (SC’2001). Denver, Colorado (USA). November 2001. (Nominated for Best Paper Award).

§ AUTORES: J. Zalamea, J. Llosa, E. Ayguadé and M. Valero TITULO: Modulo Scheduling with Integrated Register Spilling for Clustered VLIW Architectures CONGRESO: 34th Annual International Symposium on Microarchitecture. Austin, Texas (USA). pp. 160-169. December 2001.

§ AUTORES: M. González, E. Ayguadé, X. Martorell, J. Labarta and P-V. Luong

TITULO: Dual-Level Parallelism Exploitation with OpenMP in Coastal Ocean Circulation Modeling CONGRESO: 2nd Workshop on OpenMP: Experiences and Implementations (WOMPEI’02 part of ISHPC-02). Kyoto (Japan), May 2002. PUBLICATION: Lecture Notes in Computer Science LNCS 2327, Springer. pp. 469-478. May 2002. ISSN/ISBN: 0302-9743

§ AUTORES: D. Ortega, E. Ayguadé, J-L. Baer and M. Valero TITULO: A Novel Mechanism that Boosts Software Prefetching CONGRESO: 11th Parallel Architectures and Compilation Techniques (PACT’02). Virginia, USA, pp. 189-198. September 2002.

§ AUTORES: E. Artiaga, N. Navarro, E. Ayguade, J. Labarta TITULO: Dynamic Loop Schedulers and Memory Behavior CONGRESO: Fourth European Workshop on OpenMP (EWOMP 2002). Rome, Italy, September 2002.

§ AUTORES: David Carrera, Jordi Guitart, Jordi Torres, Eduard Ayguadé and Jesús Labarta TITULO: Complete Instrumentation Requirements for Performance Analysis of Web based Technologies CONGRESO: 2003 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). Austin, Texas (USA), pp. 166-175. March 2003.


TITULO: Hierarchical Clustered Register File Organization for VLIW Processors CONGRESO: 2003 International Parallel and Distributed Processing Symposium

§ (IPDPS-2003). Nice, France. April 2003.

§ AUTORES: Jordi Guitart, Xavier Martorell, Jordi Torres and Eduard Ayguadé TITULO: Application/Kernel Cooperation towards the Efficient Execution of Shared-memory Parallel Java Codes CONGRESO: 2003 International Parallel and Distributed Processing Symposium (IPDPS-2003). Nice, France. April 2003.

§ AUTORES: George Almasi, Eduard Ayguade, Calin Cascaval, Jose Castanos, Jesus Labarta, Francisco Martinez, Xavier Martorell, Jose Moreira TITULO: Evaluation of OpenMP for the Cyclops Multithreaded Architecture CONGRESO: International Workshop on OpenMP Applications and Tools. June 2003. PUBLICATION: Lecture Notes on Computer Science, vol. LNCS 2716, pp. 147–159. Springer-Verlag. 2003.

§ AUTORES: Eduard Ayguade, Bob Blainey, Alejandro Duran, Jesus Labarta, Francisco Martinez, Xavier Martorell, Raul Silvera TITULO: Is the SCHEDULE Clause Really Necessary in OpenMP? CONGRESO: International Workshop on OpenMP Applications and Tools. June 2003. PUBLICATION: Lecture Notes on Computer Science, vol. LNCS 2716, pp. 69–83. Springer-Verlag. 2003.

§ AUTORES: Daniel Ortega, Mateo Valero, Eduard Ayguade TITULO: Dynamic Memory Instruction Bypasssing CONGRESO: 17th Annual ACM International Conference on Supercomputing (ICS’04), San Francisco (CA). June 2003.

§ AUTORES: M. Pericas, E. Ayguadé, J. Zalamea, J. Llosa and M. Valero TITULO: Power and Performace Evaluation of Widened and Clustered VLIW Cores CONGRESO: SAMOS III: International Workshop on Systems, Architectures, Modeling and Simulation. Samos, Greece. July 21-23, 2003. PUBLICATION: Computer Systems: Architectures, Modelling and Simulation. Lecture Notes in Computer Science (LNCS), Springer-verlag, vol. 3133, pp. 88-97. November 2004.

§ AUTORES: Marc Gonzalez, Eduard Ayguadé, Xavier Martorell and Jesús Labarta

TITULO: Exploiting Pipelined Executions in OpenMP CONGRESO: 32nd Annual International Conference on Parallel Processing (ICPP’03). Kaohsiung, Taiwan. Pp. 153-160. October 2003.

§ AUTORES: M. Pericas, E. Ayguadé, J. Zalamea, J. Llosa and M. Valero TITULO: Power–Performance Trade–Offs in Wide and Clustered VLIW Cores for Numerical Codes CONGRESO: The 5th International Symposium on High Performance Computing (ISHPC-V), Tokyo, Japan. October 20-22, 2003. PUBLICATION: Lecture Notes in Computer Science (LNCS), Springer-Verlag, Alexander V. Veidenbaum, Kazuki Joe, Hideharu Amano, Hideo Aiso (Eds.), vol. 2858, pp. 113-126, October 2003.

§ AUTORES: E. Ayguadé, M. Gonzalez, X. Martorell and G. Jost TITULO: Employing Nested OpenMP for the Parallelization of Multi-Zone Computational Fluid Dynamics Applications CONGRESO: International Parallel and Distributed Processing Symposium (IPDPS’2004), pp. 6. Santa Fe, NM (USA). April 2004.

§ AUTORES: J.J. Costa, T. Cortes, X. Martorell, E. Ayguade and J. Labarta TITULO: Running OpenMP applications efficiently on an everything-shared SDSM CONGRESO: 18th International Parallel and Distributed Processing Symposium (IPDPS’2004), pp. 35. Santa Fe, NM (USA). April 2004. (IPDPS’04 Best Paper Award).

§ AUTORES: J. Balart, A. Duran, M. Gonzàlez, X. Martorell, E. Ayguadé and J. Labarta TITULO: Skeleton driven transformations for an OpenMP compiler CONGRESO: 11th Workshop Compilers for Parallel Computers (CPC'04). Pp. 123-134. Seeon, Germany. July 2004.

§ AUTORES: V. Beltran, D. Carrera, J. Torres and E. Ayguadé TITULO: Evaluating the Scalability of Java Event-Driven Web Servers CONGRESO: The 2004 International Conference on Parallel Processing (ICPP’04), pp. 134-142. Montreal (Canada). August 2004.

§ AUTORES: J. Balart, A. Duran, M. Gonzàlez, X. Martorell, E. Ayguadé and J. Labarta TITULO: Nanos Mercurium: A Research Compiler for OpenMP CONGRESO: European Workshop on OpenMP (EWOMP'04). Pp. 103-109. Stockholm, Sweden. October 2004.

§ AUTORES: David Carrera, David García, Jordi Torres, Eduard Ayguadé and Jesús Labarta

TITULO: WAS Control Center: An Autonomic Performance-Triggered Tracing Environment for WebSphere CONGRESO: 13th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP'05), pp. 26-32, Lugano, Switzerland, February 2005

§ AUTORES: Jordi Guitart, David Carrera, Jordi Torres, Eduard Ayguadé and Jesús Labarta TITULO: Tuning Dynamic Web Applications using Fine-Grain Analysis CONGRESO: 13th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP'05), pp. 84-91, Lugano, Switzerland, February 2005

§ AUTORES: David Ródenas, Xavier Martorell, Eduard Ayguade, Jesús Labarta, George Almasi, Calin Cascaval, José Castaños, Jose Moreira TITULO: Optimizing NANOS OpenMP for the IBM Cyclops Multithreaded Architecture CONGRESO: 19th International Parallel and Distributed Processing Symposium (IPDPS-2005), pp. 110-119, April 2005

§ AUTORES: Jordi Guitart, Vicenç Beltran, David Carrera, Jordi Torres, Eduard Ayguade TITULO: Characterizing Secure Dynamic Web Applications Scalability CONGRESO: 19th International Parallel and Distributed Processing Symposium (IPDPS-2005), pp. 108-117, April 2005

§ AUTORES: J. Guitart, V. Beltran, D. Carrera, J. Torres, E. Ayguadé TITULO: Session-Based Adaptative Overload Control for Secure Dynamic Web Application CONGRESO: The 2005 International Conference on Parallel Processing (ICPP-05), pp. 341-349, Oslo, Norway June 14-17, 2005

§ AUTORES: Jairo Balart, Alejandro Duran, Marc Gonzalez, Xavier Martorell, Eduard Ayguade and Jesus Labarta TITULO: Experiences Parallelizing a Web Server with OpenMP CONGRESO: 1st International Workshop on OpenMP (IWOMP-2005), Eugene, Oregon USA. June 1-4, 2005. PUBLICATION: Lecture Notes in Computer Science LNCS vol. 4315, pp. 191-202, 2008.

§ AUTORES: A. Duran, M. Gonzalez, J. Corbalan, X. Martorell, E. Ayguade, J. Labarta and R. Silvera TITULO: Automatic Thread Distribution for Nested Parallelism In OpenMP CONGRESO: 19th ACM International Conference on Supercomputing (ICS’05), Cambridge, MA, USA, pp. 121-130, June 20 - 22, 2005

§ AUTORES: D. Carrera, V. Beltran, J. Torres and E. Ayguadé TITULO: A Hybrid Web Server Architecture for e-Commerce Applications CONGRESO: The 11th International Conference on Parallel and Distributed Systems (ICPADS 2005), pp. 182-188, July 20 - 22, 2005, Fukuoka, Japan

§ AUTORES: V. Beltran, D. Carrera, J. Torres and E. Ayguadé TITULO: A Hybrid Web Server Architecture for Secure e-Business Web Applications CONGRESO: The 2005 International Conference on High Performance Computing and Communications (HPCC 05), September 21-24, 2005, Naples, Italy. PUBLICATION: Lecture Notes in Computer Science, pp. 366-377, vol. 3726, September 2005.

§ AUTORES: Ramon Nou, Jordi Guitart, Vicenç Beltran, David Carrera, Lidia Montero, Jordi Torres and Eduard Ayguadé TITULO: Simulating Complex Systems with a Low-detail Model CONGRESO: XVI Jornadas de Paralelismo, pp. 301-308, September 2005.

§ AUTORES: Jairo Balart, Alejandro Duran, Marc González, Xavier Martorell, Eduard Ayguadé and Jesús Labarta TITULO: Experiences parallelizing a Web Server with OpenMP CONGRESO: XVI Jornadas de Paralelismo, pp. 403-410, September 2005.

§ AUTORES: X. Martorell, M. Gonzalez, A. Duran, J. Balart., R. Ferrer, E. Ayguade and J. Labarta TITULO: Techniques supporting threadprivate in OpenMP CONGRESO: 11th International Workshop on High-Level Parallel Programming Models and Supportive Environments HIPS 2006 (in conjuntion with 20th International Parallel and Distributed Processing Symposium IPDPS 2006), April 2006.

§ AUTORES: Alejandro Duran, Roger Ferrer, Juan Jose Costa, Marc González, Xavier Martorell, Eduard Ayguadé and Jesús Labarta TITULO: A proposal for error handling in OpenMP CONGRESO: 2nd International Workshop on OpenmP (IWOMP 2006), Reïms (France), June 2006. PUBLICATION: Lecture Notes in Computer Science LNCS vo0l. 4315, pp. 422-434, 2008.

§ AUTORES: Eduard Ayguadé, Wolfgang Karl, Koen De Bosschere, Jean-Francois Collard TITULO: Parallel Computer Architecture and Instruction Level Parallelism Topic 7 CONGRESO: 12th International Euro-Par Conference (Euro-Par 2006), Dresden, Germany, August 2006. PUBLICATION: Lecture Notes in Computer Science vol. 4128, pp. 459. Springer, 2006.

§ AUTORES: Jairo Balart, Marc Gonzàlez, Xavier Martorell, Eduard Ayguadé and Jesús Labarta TITULO: Runtime Address Space Computation for SDSM Systems CONGRESO: The 19th Int. Workshop on Languages and Compilers for Parallel Computing (LCPC 2006), New Orleans, Louisiana, November 2006. PUBLICATION: Lecture Notes on Computer Science. LNCS 4382/2007, pp. 330 – 344, 2007.

§ AUTORES: Eduard Ayguade, Nawal Copty, Alejandro Duran, Jay Hoeflinger, Yuan Lin, Federico Massaioli, Ernesto Su, Priya Unnikrishnan, Guansong Zhang TITULO: A Proposal for Task Parallelism in OpenMP CONGRESO: International Workshop on OpenMP (IWOMP 2007). Beijing, China. June 2007. PUBLICATION: Lecture Notes in Computer Science, vol. 4935, pp. 1-12. Springer-Verlag, 2008.

§ AUTORES: Miloš Milovanović, Roger Ferrer, Osman S. Unsal, Adrian Cristal, Xavier Martorell, Eduard Ayguadé, Jesús Labarta and Mateo Valero TITULO: Transactioonal Memory and OpenMP CONGRESO: International Workshop on OpenMP (IWOMP 2007). Beijing, China. June 2007. PUBLICATION: Lecture Notes in Computer Science, vol. 4935, pp. 37-53. ISBN 0302-9743. Springer-Verlag, 2008.

§ AUTORES: Paul Carpenter, David Rodenas, Xavier Martorell, Alex Ramirez, Eduard Ayguade TITULO: An streaming machine description and programming models CONGRESO: SAMOS VII: International Symposium on Systems, Architectures, Modeling and Simulation, Samos, Greece. PUBLICATION: Embedded Computer Systems: Architectures, Modeling, and Simulation, LNCS vol. 4599/2007, pp. 107-116. Springer. July 2007.

§ AUTORES: M. Milovanovic, R. Ferrer, O. Unsal, A. Cristal, X. Martorell, E. Ayguade, J. Labarta and M. Valero. TITULO: Transactional Memory and openMP CONGRESO: Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2007). Láquila, July 18th. Academia Press, ISBN 978 90 382 1127 5, pp.151, 2007.

§ AUTORES: Felipe Cabarcas, Alejandro Rico, David Rodenas, X. Martorell, Alex Ramirez and Eduard Ayguadé TITULO: CellSim: A Cell Processor Simulation Infrastructure CONGRESO: Poster Abstracts. Advanced Computer Architecture and Compilation for Embedded Systems (ACACES 2007). Láquila, July 18th. Academia Press, ISBN 978 90 382 1127 5.

§ AUTORES: Vicenç Beltran, Jordi Torres and Eduard Ayguadé TITULO: Improving Disk Bandwidth-Bound Applications Through Main Memory Compression CONGRESO: MEDEA 2007: MEmory performance Workshop: DEaling with Applications, systems and architecture. In conjunction with Parallel Architectures and Compilation Techniques (PACT-2007). Brasov, Rumania. September 2007.

§ AUTORES: Miloš Milovanović, Roger Ferrer, Vladimir Gajinov, Osman S. Unsal, Adrian Cristal, Eduard Ayguadé and Mateo Valero TITULO: Multithreaded Software Transactional Memory and OpenMP CONGRESO: MEDEA 2007: MEmory performance Workshop: DEaling with Applications, systems and architecture. In conjunction with Parallel Architectures and Compilation Techniques (PACT-2007). Brasov, Rumania. September 2007.

§ AUTORES: Ferad Zyulkyarov, Osman S Unsal, Adrian Cristal, Milos Milovanovic, Eduard Ayguade and Mateo Valero TITULO: Memory Management for Transaction Processing Core in Heterogeneous Chip-Multiprocessors CONGRESO: OSHMA 2007: Workshop on Operating System support for Heterogeneous Multicore Architectures. In conjunction with Parallel Architectures and Compilation Techniques (PACT-2007). Brasov, Rumania. September 2007.

§ AUTORES: Jairo Balart, Marc Gonzalez, Xavier Martorell, Eduard Ayguade, Zehra Sura, Tong Chen, Tao Zhang, Kevin O’Brien and Kathryn O’Brien TITULO: A Novel Asynchronous Software Cache Implementation for the Cell-BE Processor CONGRESO: LCPC 2007: 20th International Workshop on Languages and Compilers for Parallel Computing. Urbana (IL), USA. October 2007. PUBLICATION: Lecture Notes in Computer Science, vol. 5234/2008, pp. 125-140. ISBN 0302-9743 . Springer-Verlag, 2008.

§ AUTORES: Eduard Ayguadé, Alejandro Duran, Jay Hoeflinger, Federico Massaioli and Xavier Teruel TITULO: An Experimental Evaluation of the New OpenMP Tasking Model CONGRESO: LCPC 2007: 20th International Workshop on Languages and Compilers for Parallel Computing. Urbana (IL), USA. October 2007. PUBLICATION: Lecture Notes in Computer Science. Vol. 5234/2008, pp. 63-77. ISBN 0302-9743, Springer-Verlag, 2008.

§ AUTORES: David Carrera, Malgorzata Steinder, Ian Whalley, Jordi Torres and Eduard Ayguadé TITULO: Utility-based Placement of Dynamic Web Applications with Fairness Goals CONGRESO: NOMS 2008, IEEE/IFIP Network Operations and Management Symposium. Salvador de Bahia, Brazil. April 7-11, 2008.

§ AUTORES: Vicenç Beltran, Jordi Torres and Eduard Ayguadé TITULO: Understanding Tuning Complexity in Multithreaded and Hybrid Web Servers CONGRESO: 22nd IEEE International Parallel and Distributed Processing Symposium (IPDPS-2008). Miami, Florida USA. April 14-18, 2008.

§ AUTORES: Alejandro Duran, Julita Corbalán and Eduard Ayguadé TITULO: Evaluation of OpenMP Task scheduling strategies CONGRESO: International Workshop on OpenMP (IWOMP-2008). Purdue University, West Lafayette (IN, USA). May 12-14, 2008. PUBLICATION: Lecture Notes in Computer Sciences, vol. 5004/2008, pp. 100-110. ISBN 978-3-540-79560-5, Springer-Verlag, 2008.

§ AUTORES: Alejandro Duran, Josep M. Perez, Eduard Ayguadé, Rosa M. Badia and Jesus Labarta TITULO: Extending the OpenMP Tasking Model to Allow Dependent Tasks CONGRESO: International Workshop on OpenMP (IWOMP-2008). Purdue University, West Lafayette (IN, USA). May 12-14, 2008. PUBLICATION: Lecture Notes in Computer Sciences, vol. 5004/2008, pp. 111-122. ISBN 978-3-540-79560-5, Springer-Verlag, 2008.

§ AUTORES: Jordi Torres, David Carrera, Vicenç Beltran, Nicolás Poggi, Kevin Hogan, Josep Ll. Berral, Ricard Gavaldà, Eduard Ayguadé, Toni Moreno and Jordi Guitart TITULO: Tailoring resources: the energy efficient consolidation strategy goes beyond virtualization CONGRESO: The 5th IEEE International Conference on Autonomic Computing (ICAC-2008). Chicago (IL, USA), pp. 197-198, June 2-6, 2008.

§ AUTORES: David Carrera, Malgorzata Steinder, Ian Whalley, Jordi Torres and Eduard Ayguadé TITULO: Managing SLAs of Heterogeneous Workloads using Dynamic Application Placement CONGRESO: HPDC-17, ACM/IEEE International Symposium on High-Performance Distributed Computing. Boston June 23-27. ISBN 978-1-59593-997-5. pp. 217-218, 2008.

§ AUTORES: David Rodenas, Roger Ferrer, Xavier Martorell and Eduard Ayguadé TITULO: ACOTES Stream Programming Model CONGRESO: HiPEAC ACACES 2008 Summer School Poster abstracts. Academic Press, ISBN: 978 90 382 1288 3, pp. 19-22. L’Aquila (Itally), July 16, 2008.

§ AUTORES: Mauricio Alvarez, Alex Ramirez, Eduard Ayguadé, Xavier Martorell and Mateo Valero TITULO: Scalability of Macroblock-level Parallelism for H.264 Decoding CONGRESO: HiPEAC ACACES 2008 Summer School Poster abstracts. Academic Press, ISBN: 978 90 382 1288 3, pp. 59-62. L’Aquila (Itally), July 16, 2008.

§ AUTORES: Nikola Vujic, Marc Gonzalez, Xavier Martorell and Eduard Ayguadé TITULO: Automatic Pre-fetch and Modulo Scheduling Transformations for the Cell/BE Architecture CONGRESO: HiPEAC ACACES 2008 Summer School Poster abstracts. Academic Press, ISBN: 978 90 382 1288 3, pp.167-170. L’Aquila (Itally), July 16, 2008.

§ AUTORES: Paul Carpenter, Alex Ramirez and Eduard Ayguadé TITULO: The Abstract Streaming Machine CONGRESO: HiPEAC ACACES 2008 Summer School Poster abstracts. Academic Press, ISBN: 978 90 382 1288 3, pp.305-308. L’Aquila (Italy), July 16, 2008.

§ AUTORES: Nikola Vujic, Marc Gonzalez, Xavier Martorell and Eduard Ayguadé TITULO: Automatic Pre-Fetch and Modulo Scheduling Transformations for the Cell BE Architecture CONGRESO: 21st Annual Workshop on Languages and Compilers for Parallel Computing (LCPC). University of Alberta. July 31- August 2, 2008. PUBLICATION: Lecture Notes in Computer Science, 2008, Volume 5335/2008, pp. 31-46, 2008.

§ AUTORES: Xavier Teruel, Priya Unnikrishnan, Xavier Martorell, Eduard Ayguadé, Raul Silvera,

Guansong Zhang and Ettore Tiotto TITULO: OpenMP Tasks in IBM XL compilers CONGRESO: 18th Annual International Centre for Advanced Studies Research Conference (CASCON 2008), Toronto (Canada). October 27-30, 2008.

§ AUTORES: Marc Gonzalez, Nikola Vujic, Xavier Martorell, Eduard Ayguadé, Alexandre E. Eichenberger, Tong Chen, Zehra Sura, Tao Zhang, Kevin O’Brien, and Kathryn O’Brien TITULO: Hybrid Access-Specific Software Cache Techniques for the Cell BE Architecture CONGRESO: The 17th International Conference on Parallel Architectures and Compilation Techniques (PACT-2008). Toronto, Canada. October 25-29, 2008.

§ AUTORES: Ferad Zyulkyarov, Sanja Cvijic, Osman Unsal, Adrian Cristal, Eduard Ayguadé, Tim Harris and Mateo Valero TITULO: WormBench - A Configurable Workload for Evaluating Transactional Memory Systems CONGRESO: MEDEA -- MEmory performance: DEaling with Applications, systems and architecture (workshop held in conjunction with PACT-2008). Toronto, Canada. October 25-29, 2008.

§ AUTORES: Roger Ferrer, Marc Gonzalez, Federico Silla, Xavier Martorell, Eduard Ayguadé TITULO: Evaluation of Memory Performance on the Cell BE with the SARC Programming Model CONGRESO: MEDEA -- MEmory performance: DEaling with Applications, systems and architecture (workshop held in conjunction with PACT-2008). Toronto, Canada. October 25-29, 2008.

§ AUTORES: Alex Duran, Julita Corbalan and Eduard Ayguade TITULO: An adaptive cut-off for task parallelism CONGRESO: SC '08: Proceedings of the 2008 ACM/IEEE conference on Supercomputing. Austin, TX (USA). November 2008

§ AUTORES: Vicenç Beltran, Jordi Torres and Eduard Ayguadé TITULO: Improving Web Server Performance Through Main Memory Compression CONGRESO: The 14th IEEE International Conference on Parallel and Distributed Systems (ICPADS'08). Melbourne (Australia). December 8-10, 2008

§ AUTORES: David Carrera, Malgorzata Steinder, Ian Whalley, Jordi Torres and Eduard Ayguadé TITULO: Enabling Resource Sharing between Transactional and Batch Workloads Using Dynamic Application Placement CONGRESO: 9th ACM/IFIP/USENIX International Middleware Conference (Middleware 2008). Leuven (Belgium). December 1-5, 2008. PUBLICATION: Lecture Notes in Computer Science, vol. 5346/2008, pp. 203-222. ISSN: 0302-9743. December 2008.

§ AUTORES: Yolanda Becerra, David Carrera and Eduard Ayguadé TITULO: Batch Job Profiling and Adaptive Profile Enforcement for Virtualized Environments CONGRESO: The 17th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, 18-20 February 2009, Weimar (Germany).

§ AUTORES: Rosa M. Badia, Josep M. Perez, Eduard Ayguadé and Jesus Labarta TITULO: Impact of the memory hierarchy on shared memory architectures in multicore programming models CONGRESO: The 17th Euromicro International Conference on Parallel, Distributed, and Network-Based Processing, 18-20 February 2009, Weimar (Germany).

§ AUTORES: Ferad Zyulkyarov, Vladimir Gajinov, Osman Unsal, Adrian Cristal, Eduard Ayguadé, Tim Harris, Mateo Valero TITULO: Atomic Quake: Using Transactional Memory in an Interactive Multiplayer Game Server CONGRESO: 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). February 14-18, 2009, Raleigh, North Carolina (USA). In ACM SIGPLAN Notices, Vol. 44, No. 4, pp. 25-34. DOI: 10.1145/1594835.1504183.

§ AUTORES: Chinmay Kulkarni, Osman Unsal, Adrian Cristal, Eduard Ayguadé, Mateo Valero TITULO: Turbocharging boosted transactions or: How I Learnt to Stop Worrying and Love Longer Transactions CONGRESO: 14th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming (PPoPP). February 14-18, 2009, Raleigh, North Carolina (USA). In ACM SIGPLAN Notices, Vol. 44, No. 4, pp. 307-308. DOI: 10.1145/1594835.1504228.

§ AUTORES: Eduard Ayguadé, Rosa M. Badia, Daniel Cabrera, Alejandro Duran, Marc Gonzalez, Francisco Igual, Daniel Jimenez, Jesus Labarta, Xavier Martorell, Rafael Mayo, Josep M. Perez and Enrique S. Quintana-Ortí TITULO: A Proposal to Extend the OpenMP Tasking Model for Heterogeneous Architectures CONGRESO: 5th International Workshop on OpenMP (IWOMP-2009). June 3-5, 2009. Dresden (Germany). PUBLICATION: Evolving OpenMP in an Age of Extreme Parallelism, Lecture Notes in Computer Science, vol. 5568, Springer, 2009

§ AUTORES: V. Gajinov, F. Zyulkyarov, A. Cristal, O. Unsal, E. Ayguadé, T. Harris, and M. Valero TITULO: QuakeTM: Parallelizing a Complex Serial Application Using Transactional Memory CONGRESO: 23rd International Conference on Supercomputing (ICS’09), pp. 126-135. June 8-12, 2009. Yorktown Heights, NY, USA

§ AUTORES: Montse Farreras, Vladimir Marjanovic, Eduard Ayguadé and Jesus Labarta TITULO: Gaining asynchrony by using hybrid UPC/SMPSs CONGRESO: Workshop on Asynchrony in the PGAS Programming Model (APGAS, collocated with ICS 2009). June 8, 2009. Yorktown Heights, NY, USA

§ AUTORES: Vicenç Beltran, Xavier Martorell, Jordi Torres and Eduard Ayguadé TITULO: Accelerating Software Memory Compression on the Cell/B.E. CONGRESO: Workshop on Hardware Accelerators for High Performance Computing (WAHA, collocated with ICS 2009). June 8, 2009. Yorktown Heights, NY, USA

§ AUTORES: Daniel Cabrera, Xavier Martorell, Georgi Gaydadjiev, Eduard Ayguadé and Daniel Jiménez‐González TITULO: OpenMP extensions for FPGA Accelerators CONGRESO: IC-SAMOS - International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. Samos, Greece, July 20-23, 2009.

§ AUTORES: Paul Carpenter, Alex Ramirez and Eduard Ayguadé TITULO: The Abstract Streaming Machine: Compile‐time performance modelling of stream programs on heterogeneous multiprocessors CONGRESO: SAMOS Workshop - International Workshop on Systems, Architectures, Modeling, and Simulation. Samos, Greece, July 20-23, 2009 (Best paper award). In Lecture Notes in Computer Science, Vol. 5657, pp. 12-23. DOI: 10.1007/978-3-642-03138-0_3.

§ AUTORES: Eduard Ayguadé, Rosa M. Badia, Francisco Igual-Peña, Jesús Labarta, Rafael Mayo, Enrique Quintana-Orti TITULO: An Extension of the StarSs Programming Model for Platforms with Multiple GPUs CONGRESO: Euro-Par 2009, Delft (The Netherlands), August 25-28, 2009.

§ AUTORES: Roger Ferrer, Vicenç Beltran, Marc Gonzalez, Xavier Martorell and Eduard Ayguadé TITULO: Achieving High Memory Performance from heterogeneous architectures with the SARC Programming Model CONGRESO: MEDEA 2009 -- MEmory performance: DEaling with Applications, systems and architecture (workshop held in conjunction with PACT-2009). Raleigh, North Carolina. Sept. 12-16 2009.

§ AUTORES: Alejandro Duran, Xavier Teruel, Roger Ferrer, Xavier Martorell and Eduard Ayguadé TITULO: Barcelona OpenMP Tasks Suite: A Set of Benchmarks Targeting the Exploitation of Task Parallelism in OpenMP CONGRESO: 38th International Conference on Parallel Processing (ICPP-2009), Vienna (Austria), September 22-25, 2009.

§ AUTORES: Yolanda Becerra, Vicenç Beltran, David Carrera, Marc González, Jordi Torres and Eduard Ayguadé TITULO: Speeding Up Distributed MapReduce Applications Using Hardware Accelerators CONGRESO: 38th International Conference on Parallel Processing (ICPP-2009), Vienna (Austria), September 22-25, 2009.

§ AUTORES: Nikola Vujic, Lluc Alvarez, Marc Gonzalez, Xavier Martorell and Eduard Ayguadé TITULO: Adaptive and Speculative Memory Consistency Support for Multi-core Architectures with Local Memories CONGRESO: 22nd International Workshop on Languages and Compilers for Parallel Computing, University of Delaware, Newark, Delaware, USA. October 8-10, 2009. PUBLICATION: Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science 5898 Springer 2010, Guang R. Gao, Lori L. Pollock, John Cavazos, Xiaoming Li (Eds.). ISBN 978-3-642-13373-2

§ AUTORES: Roger Ferrer, Alejandro Duran, Xavier Martorell and Eduard Ayguadé TITULO: Unrolling Loops Containing Task Parallelism CONGRESO: 22nd International Workshop on Languages and Compilers for Parallel Computing, University of Delaware, Newark, Delaware, USA. October 8-10, 2009. PUBLICATION: Languages and Compilers for Parallel Computing. Lecture Notes in Computer Science 5898 Springer 2010, Guang R. Gao, Lori L. Pollock, John Cavazos, Xiaoming Li (Eds.). ISBN 978-3-642-13373-2

§ AUTORES: Paul Carpenter, Alex Ramirez and Eduard Ayguadé TITULO: Mapping Stream Programs onto Heterogeneous Multiprocessor Systems CONGRESO: Proceedings of CASES 2009: International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, pp. 57-66. October 11-16, 2009. Grenoble (France).

§ AUTORES: Xavier Teruel, Christopher Barton, Alejandro Duran, Xavier Martorell, Eduard Ayguadé, Priya Unnikrishnan, Guansong Zhang and Raul Silvera TITULO: OpenMP Tasking Analysis for Programmers CONGRESO: 19th Annual International Centre for Advanced Studies Research Conference (CASCON 2009). November 2-5, 2009. Markham, ON (USA).

§ AUTORES: Muhammad Shafiq, Miquel Pericàs, Raul de la Cruz, Mauricio Araya-Polo, Nacho Navarro and Eduard Ayguadé TITULO: Exploiting Memory Customization in FPGA for 3D Stencil Computations CONGRESO: The 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales. Sydney, Australia. 9-11 December 2009

§ AUTORES: Vicenç Beltran, David Carrera, Jordi Torres and Eduard Ayguadé TITULO: CellMT: A Cooperative Multithreading Library for the Cell/B.E. CONGRESO: 16th Annual International Conference on High Performance Computing (HiPC-2009). December 16-19, 2009. Kochi, Cochin (India).

§ AUTORES: Nikola Vujic, Felipe Cabarcas, Marc Gonzalez, Alex Ramirez, Xavier Martorell and

Eduard Ayguadé TITULO: DMA++: On the Fly Data Realignment for On-Chip Memories CONGRESO: The 16th IEEE International Symposium on High-Performance Computer Architecture (HPCA-16). Bangalore, India. January 9-14, 2010. ISSN: 1530-0897.

§ AUTORES: Vladimir Marjanovic, Jesús Labarta, Eduard Ayguadé, and Mateo Valero TITULO: Effective Communication and Computation Overlap with Hybrid MPI/SMPSs CONGRESO: 15th ACM SIGPLAN Annual Symposium on Principles and Practice of Parallel Programming (PPoPP). Bangalore, India. January 9–14, 2010. In ACM SIGPLAN Notices, Vol. 45, No. 5, pp. 337-338. DOI: 10.1145/1837853.1693502.

§ AUTORES: Roger Ferrer, Vicenç Beltran, Marc González, Xavier Martorell and Eduard Ayguadé TITULO: Analysis of Task Offloading for Accelerators CONGRESO: HiPEAC 2010 -- International conference on High-Performance Embedded Architectures and Compilers. Pisa, Italy. January 25-27, 2010.

§ AUTORES: Paul Carpenter, Alex Ramirez and Eduard Ayguadé TITULO: Buffer sizing for self-timed stream programs on heterogeneous distributed memory multiprocessors CONGRESO: HiPEAC 2010 -- International conference on High-Performance Embedded Architectures and Compilers. Pisa, Italy. January 25-27, 2010.

§ AUTORES: Bramimir Dickov, Miquel Pericàs, Nacho Navarro and Eduard Ayguadé TITULO: Row-interleaved Streaming Data Flow Implementation of Sparse Matrix Vector Multiplication in FPGA CONGRESO: 4th HiPEAC Workshop on Reconfigurable Computing (WRC10), in conjunction with HiPEAC 2010 -- International conference on High-Performance Embedded Architectures and Compilers. Pisa, Italy. January 23, 2010.

§ AUTORES: Jordà Polo, David Carrera, Yolanda Becerra, Malgorzata Steinder, Ian Whalley, Jordi Torres and Eduard Ayguadé TITULO: Performance-Driven Task Co-Scheduling for MapReduce Environments CONGRESO: NOMS-2010 -- 12th IEEE/IFIP Network Operations and Management Symposium, Osaka, Japan. April 19-23, 2010.

§ AUTORES: Jordi Torres, Eduard Ayguadé, David Carrera, Jordi Guitart, Vicenç Beltran, Yolanda Becerra, Rosa M. Badia, Jesús Labarta and Mateo Valero TÍTULO: BSC contributions in Energy-aware Resource Management for Large Scale Distributed Systems CONGRESO: Proceedings of the 1st COST Action IC0804 on Large Scale Distributed Systems. Jean-Marc Pierson, Helmut Hlavacs (Ed.) pp. 76-79. ISBN: 978-2-917490-10-5.

§ AUTORES: Vladimir Marjanovic, Jesús Labarta, Eduard Ayguadé and Mateo Valero TITULO: Overlapping Communication and Computation by Using a Hybrid MPI/SMPSs Approach CONGRESO: 24th ACM International Conference on Supercomputing (ICS’10), Tsukuba, Japan. June 1-4, 2010.

§ AUTORES: Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro and Eduard Ayguadé TITULO: Decomposable and Responsive Power Models for Multicore Processors using Performance Counters CONGRESO: 24th ACM International Conference on Supercomputing (ICS’10), Tsukuba, Japan. June 1-4, 2010.

§ AUTORES: Eduard Ayguadé, James Beyer, Alejandro Duran, Roger Ferrer, Grant Haab, Kelvin Li and Federico Massaioli TITULO: An Extension to Improve Tasking Control CONGRESO: IWOMP 2010 – 6th International Workshop on OpenMP, Tsukuba, Japan. June 14-16, 2010.

§ AUTORES: Alejandro Duran, Roger Ferrer, Michael Klemm, Bronis R. de Supinski and Eduard Ayguadé TITULO: A Proposal for User-defined Reductions in OpenMP CONGRESO: IWOMP 2010 – 6th International Workshop on OpenMP, Tsukuba, Japan. June 14-16, 2010.

§ AUTORES: Yoav Etsion, Alex Ramirez, Rosa M. Badia, Eduard Ayguade, Jesus Labarta, Mateo Valero TITULO: Task Superscalar: Using Processors as Functional Units CONGRESO: HotPar’10 – 2nd USENIX Workshop on Hot Topics in Parallelism, Berkeley (CA), USA. June 14-15, 2010.

§ AUTORES: Roger Ferrer, Alex Duran, Xavier Martorell and Eduard Ayguadé TÍTULO: Harmonizing Serial Optimizations with OpenMP CONGRESO: 15th Workshop on Compilers for Parallel Computing (CPC-2010). Vienna (Austria). July 7-9, 2010.

§ AUTORES: Paul Carpenter, Alex Ramirez and Eduard Ayguadé TÍTULO: StarSsCheck: A Tool to Find Errors in Task-based Parallel Programs CONGRESO: Euro-Par 2010, Ischia (Italy). August 31st – September 3rd, 2010.

§ AUTORES: Muhammad Shafiq, Miquel Pericàs, Nacho Navarro and Eduard Ayguadé TITULO: FEM: A Step Towards a Common Memory Layout for FPGA-based Accelerators CONGRESO: 20th International Conference on Field Programmable Logic and Applications (FPL-2010). Milano (Italy), August 31-September 2nd, 2010.

§ AUTORES: Alessandro Cilardo, Luigi Esposito, Antonio Veniero, Antonino Mazzeo, Vicenç Beltran and Eduard Ayguadé TITULO: A CellBE-based HPC Application for the Analysis of Vulnerabilities in Cryptographic Hash Functions CONGRESO: 12th IEEE International Conference on High Performance and Communications (HPCC’10), Melbourne (Australia). September 1-3, 2010.

§ AUTORES: Daniel Jiménez, Raúl Sánchez, Carlos Álvarez, Julián Morillo, Daniel Cabrera, Xavier Martorell and Eduard Ayguadé TÍTULO: GPFPGA: entorno para la generación automática de códigos HDL portables entre FPGAs CONGRESO: X Jornadas de Computación Reconfigurable y Aplicaciones (JCRA-2010), Valencia (Spain), September 7-10, 2010.

§ AUTORES: Jordà Polo, David Carrera, Yolanda Becerra, Vicenç Beltran, Jordi Torres and Eduard Ayguadé TITULO: Performance Management of Accelerated MapReduce Workloads in Heterogeneous Clusters CONGRESO: 39th International Conference on Parallel Processing (ICPP-2010), San Diego (USA). September 13-16, 2010.

§ AUTORES: Roger Ferrer, Judit Planas, Pieter Bellens, Alejandro Duran, Marc Gonzalez, Xavier Martorell, Rosa M. Badia, Eduard Ayguadé and Jesus Labarta TITULO: Optimizing the Exploitation of Multicore Processors and GPUs with OpenMP and OpenCL CONGRESO: 23rd International Workshop on Languages and Compilers for Parallel Computing (LCPC2010), Houston, TX (USA), October 7-9, 2010. Also in Languages and Compilers for Parallel Computing, Lecture Notes in Computer Science, Vol. 6548, pp 215-229. 2011. DOI: 10.1007/978-3-642-19595-2_15.

§ AUTORES: Ramon Bertran, Yolanda Becerra, David Carrera, Vicenç Beltran, Marc Gonzalez, Xavier Martorell, Jordi Torres and Eduard Ayguadé TITULO: Accurate Energy Accounting for Shared Virtualized Environments using PMC-based Power Modeling Techniques CONGRESO: 11th ACM/IEEE International Conference on Grid Computing (Grid 2010), Brussels (Belgium), October 25-29, 2010.

§ AUTORES: Javier Bueno, Xavier Martorell, Juan José Costa, Toni Cortés, Eduard Ayguadé, Guansong Zhang, Christopher Barton and Raul Silvera TITULO: Reducing data access latency in SDSM systems using runtime optimizations CONGRESO: 20th Annual International Centre for Advanced Studies Research Conference (CASCON 2010), Toronto (Canada), November 1-4, 2010.

§ AUTORES: Nicolas Poggi, David Carrera, Ricard Gavaldà, Jordi Torres and Eduard Ayguadé TITULO: Workload and Resource Characterization of an Online Travel and Booking Site CONGRESO: 2010 IEEE International Symposium on Workload Characterization (IISWC-2010). Atlanta, Georgia (USA), December 2–4th, 2010.

§ AUTORES: Yoav Etsion, Felipe Cabarcas, Alejandro Rico, Alex Ramirez, Rosa M. Badia, Eduard Ayguadé, Jesus Labarta and Mateo Valero TITULO: Task Superscalar: An Out-of-Order Task Pipeline CONGRESO: 43rd International Symposium on Microarchitecture (MICRO-43). Atlanta, Georgia (USA), December 4–8th, 2010.

§ AUTORES: Juan Jose Costa, Toni Cortes, Xavier Martorell, Javier Bueno and Eduard Ayguadé TITULO: Transient Congestion Avoidance in Software DSM Systems CONGRESO: 11th International Conference on Parallel and Distributed Computing, Applications and Technologies (PDCAT). Wuhan (China), December 8–11th, 2010.

§ AUTORES: Tassadaq Hussain, Miquel Pericas and Eduard Ayguade TITULO: Reconfigurable Memory Controller with Programmable Pattern Support CONGRESO: 5th HiPEAC Workshop on Reconfigurable Computing (WRC 2011), pp. 55-65. Heraklion, Crete, January 2011.

§ AUTORES: Muhammad Shafiq, Miquel Pericas and Eduard Ayguade TITULO: A Template System for the Efficient Compilation of Domain Abstractions onto Reconfigurable Computers CONGRESO: 5th HiPEAC Workshop on Reconfigurable Computing (WRC 2011), pp. 65-74. Heraklion, Crete, January 2011.

§ AUTORES: Vladimir Gajinov, Milos Milovanovic, Osman Unsal, Adrian Cristal, Eduard Ayguade and Mateo Valero TITULO: Integrating Dataflow Abstractions into Transactional Memory CONGRESO: First Workshop on Systems for Future Multi-Core Architectures (SFMA'11), in conjunction with EuroSys 2011. Pp. 1-7. Salzburg, Austria. April 2011.

§ AUTORES: Muhammad Shafiq, Miquel Pericàs, Nacho Navarro and Eduard Ayguadé TÍTULO: TARCAD: A Template Architecture for Reconfigurable Accelerator Designs CONGRESO: 9th IEEE Symposium on Application Specific Processors (SASP), pp. 8-15. San Diego, California, June 5-6, 2011. DOI: 10.1109/SASP.2011.5941071.

§ AUTORES: Lluc Alvarez, Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro and Eduard Ayguadé TITULO: Design space exploration for aggressive core replication schemes in CMPs CONGRESO: 20th International ACM Symposium on High-performance Parallel and Distributed Computing (HPDC 2011), pp. 269-270. San Jose, California, June 8-11, 2011. DOI: 10.1145/1996130.1996169.

§ AUTORES: Javier Bueno, Alejandro Duran, Xavier Martorell, Eduard Ayguadé, Rosa M. Badia and Jesús Labarta TITULO: Poster: Programming Clusters of GPUs with OMPSs CONGRESO: International Conference on Supercomputing (ICS-2011), pp. 378-378, Tucson, Arizona, USA, June 2011. DOI: 10.1145/1995896.19955961.

§ AUTORES: Nicolas Poggi, David Carrera, Ricard Gavaldà and Eduard Ayguadé TITULO: Non-intrusive Estimation of QoS Degradation Impact on E-commerce User Satisfaction CONGRESO: The 10th IEEE International Symposium on Network Computing and Applications (NCA-2011), pp. 179-186. Cambridge, MA USA, August 25-27, 2011. DOI: 10.1109/NCA.2011.31.

§ AUTORES: Javier Bueno, Luis Martinell, Alejandro Duran, Montse Farreras, Xavier Martorell, Rosa M. Badia, Eduard Ayguadé, and Jesús Labarta TITULO: Productive Cluster Programming with OmpSs CONGRESO: 17th International Conference on Parallel Processing (Euro-Par 2011), pp. 555-566. Bordeaux, France, August 29-September 2, 2011. DOI: 10.1007/978-3-642-23400-2_52.

§ AUTORES: Jordà Polo, Claris Castillo, David Carrera, Yolanda Becerra, Ian Whalley, Malgorzata Steinder, Jordi Torres and Eduard Ayguadé TITULO: Resource-aware Adaptive Scheduling for MapReduce Clusters CONGRESO: ACM/IFIP/USENIX 12th International Middleware Conference, pp. 187-207. Lisboa, Portugal, December 2011. DOI: 10.1007/978-3-642-25821-3_10.

§ AUTHORS: Tassadaq Hussain, Miquel Pericas, Nacho Navarro and Eduard Ayguadé

TITULO: Implementation of a Reverse Time Migration Kernel Using the HCE High Level Synthesis Tool CONGRESO: The 2011 International Conference on Field-Programmable Technology (FPT'11). New Delhi, India. pp. 1-8. December 2011. DOI: 10.1109/FPT.2011.6132717.

§ AUTHORS: Tassadaq Hussain, Muhammad Shafiq, Miquel Pericàs, Nacho Nacho and Eduard

Ayguadé TITULO: PPMC: A Programmable Pattern based Memory Controller CONGRESO: The 8th International IEEE/ACM Symposium on Applied Reconfigurable Computing (ARC 2012), Hong Kong (China). Lecture Notes in Computer Science Vol. 7199, pp. 89-101. March 2012. DOI: 10.1007/978-3-642-28365-9_8.

§ AUTHORS: Nikola Vujic, Lluc Alvarez, Marc Gonzalez, Xavier Martorell and Eduard Ayguadé TITULO: DMA-circular: An Enhanced High Level Programmable DMA Controller for Optimized Management of On-chip Local Memories CONGRESO: ACM International Conference on Computing Frontiers, pp. 113-122. Cagliary (Italy), May 15-17, 2012. DOI: 10.1145/22112908.2212925.

§ AUTHORS: Muhammad Shafiq, Miquel Pericàs, Nacho Navarro and Eduard Ayguadé TITULO: BSArc: Blacksmith Streaming Architecture for HPC Accelerators CONGRESO: ACM International Conference on Computing Frontiers, pp. 23-32. Cagliary (Italy), May 15-17, 2012. DOI: 10.1145/22112908.2212914.

§ AUTHORS: Javier Bueno, Judit Planas, Alejandro Duran, Rosa M. Badia, Xavier Martorell, Eduard Ayguadé, Jesús Labarta TITULO: Productive Programming of GPU Clusters with OmpSs CONGRESO: 26th IEEE International Parallel & Distributed Processing Symposium (IPDPS-2012), pp. 557-568. Shanghai, China, May 21-25, 2012. DOI: 10.1109/IPDPS.2012.58.

§ AUTORES: Branimir Dickov, Miquel Pericàs, Guillaume Houzeaux, Nacho Navarro and Eduard Ayguadé TITULO: Assessing the impact of network compression on Molecular Dynamics and Finite Element Methods CONGRESO: 14th International Conference on High-Performance Computing and Communications (HPCC-2012), pp. 588-597. Liverpool, UK, June 25-27, 2012. DOI: 10.1109/HPCC.2012.85.

§ AUTORES: Ramon Bertran, Marc Gonzalez, Xavier Martorell, Nacho Navarro and Eduard Ayguadé TITULO: POTRA: a framework for building power models for next generation multicore architectures CONGRESO: Joint International Conference on Measurement and Modeling of Computer Systems. June 2012. In ACM SIGMETRICS Performance Evaluation Review, vol. 40, no. 1, pp. 427-428. DOI 10.1145/2318857.2254827.

§ AUTORES: Tassadaq Hussain, Miquel Pericàs, Nacho Navarro and Eduard Ayguadé

TITULO: PPMC: Hardware Scheduling and Memory Management Support for Multi Accelerators CONGRESO: 22nd International Conference on Field Programmable Logic and Applications (FPL-2012). Oslo, Norway. pp. 571-574. August 29-31, 2012. Doi: 10.1109/FPL.2012.6339373.

§ AUTORES: Rahulkumar Gayatri, Rosa. M. Badia, Eduard Ayguadé, Mikel Luján and Ian Watson TITULO: Transactional Access to Shared Memory in StarSs, a Task Based Programming Model CONGRESO: Euro-Par 2012, International European Conference on Parallel and Distributed Computing. Rhodes Island, Greece, August 27-31, 2012. In Lecture Notes in Computer Science Volume 7484, 2012, pp. 514-525. DOI: 10.1007/978-3-642-32820-6_51.

§ AUTORES: Harald Servat, Xavier Teruel, Germán Llort, Alejandro Duran, Judit Giménez, Xavier Martorell, Eduard Ayguadé and Jesús Labarta TITULO: On the Instrumentation of OpenMP and OmpSs Tasking Constructs CONGRESO: 5th Workshop on Productivity and Performance (PROPER 2012) Tools for HPC Application Development. Rhodes Island, Greece, August 27-31, 2012. In Euro-Par 2012: Parallel Processing Workshops. Lecture Notes in Computer Science, vol. 7640, pp. 414-428, 2013. DOI: 10.1007/978-3-642-36949-0_47.

§ AUTORES: Jordi Garcia, Michel Somé, Eduard Ayguadé, Jose Cabré, Maria José Casany, Manel

Frigola, Nikolas Galanis, Manuel García-Cervigón, Manel Guerrero and Pilar Muñoz TITULO: IT or not to be: The impact of Moodle in the education of developing countries CONGRESO: 1st Moodle Research Conference, pp. 182-185. Heraklion, Crete (Greece), September 14-15, 2012. ISBN: 978-960-98516-2-6.

§ AUTORES: Vladimir Gajinov, Srdjan Stipic, Osman S. Unsal, Tim Harris, Eduard Ayguadé and

Adrian Cristal TITULO: Supporting Stateful Tasks in a Dataflow Graph CONGRESO: 21st International Conference on Parallel Architectures and Compilation Techniques (PACT-2012), pp. 435-436. Minneapolis MN (USA), September 19-23, 2012. DOI: 10.1145/2370816.2370883.

§ AUTORES: Nathaniel Azuelos, Yoav Etsion, Idit Keidar, Ayal Zaks and Eduard Ayguadé

TITULO: Introducing Speculative Optimizations in Task Dataflow with Language Extensions and Runtime Support CONGRESO: 2nd Workshop on Data-Flow Execution Models for Extreme Scale Computing (DFM 2012), In conjunction with 21st International Conference on Parallel Architectures and Compilation Techniques (PACT-2012), pp. 1-4. Minneapolis MN (USA), September 23, 2012.

§ AUTORES: V. Elangovan, R.M. Badia and E. Ayguadé

TITULO: OmpSs-OpenCL Programming Model for Heterogeneous Systems CONGRESO: 25th International Workshop on Languages and Compilers for Parallel Computing (LCPC2012), pp. 96-111. Tokyo (Japan), September 11-13, 2012. DOI: 10.1007/978-3-642-37658-0_7.

§ AUTORES: Vladimir Gajinov, Srdjan Stipic, Osman Unsal, Tim Harris, Eduard Ayguadé, Adrián Cristal TITULO: Integrating Dataflow Abstractions into the Shared Memory Model CONGRESO: 24th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD’2012), pp. 243-251. New York (USA), October 24-26, 2012. DOI: 10.1109/SBAC-PAD.2012.24.

§ AUTORES: Lluc Alvarez, Lluís Vilanova, Marc Gonzàlez, Xavier Martorell, Nacho Navarro and

Eduard Ayguadé TITULO: Hardware/Software Coherence Protocol for the Coexistence of Caches and Local Memories CONGRESO: 2012 International Conference for High Performance Computing, Networking, Storage and Analysis, Supercomputing (SC12), Article No. 89. Salt Lake City, Utah (USA), November 10-16, 2012. DOI: 10.1109/SC.2012.61.

§ AUTORES: Lluís-Miquel Munguía, David A. Bader and Eduard Ayguadé

TITULO: Task-based Parallel Breadth-First Search in Heterogeneous Environments CONGRESO: 2012 IEEE International Conference on High Performance Computing (HiPC), pp. 1-10. Pune (India), December 18-21, 2012. DOI: 10.1109/HiPC.2012.6507474.

§ AUTORES: Vicenç Beltran and Eduard Ayguadé

TITULO: Optimizing Resource Utilization with software-based Temporal Multi-Threading (sTMT) CONGRESO: 2012 IEEE International Conference on High Performance Computing (HiPC), Pune (India), December 18-21, 2012. DOI: 10.1109/HiPC.2012.6507499.

§ AUTORES: Muhammad Shafiq, Miquel Pericas, Nacho Navarro and Eduard Ayguadé

TITULO: Design Space Explorations for Streaming Accelerators using Streaming Architectural Simulator CONGRESO: 10th International Bhurban Conference on Applied Sciences and Technology, IBCAST 2013, pp. 169-178. ISBN: 978-1-4673-4425-8. DOI: 10.1109/IBCAST.2013.6512151. January 15-19, 2013.

§ AUTORES: Judit Planas, Rosa M. Badia, Eduard Ayguadé and Jesús Labarta

TITULO: Self-Adaptive OmpSs Tasks in Heterogeneous Environments CONGRESO: Proceedings of the 27th IEEE International Parallel and Distributed Processing Symposium (IPDPS-2013), pp. 138-149. Boston (MA, USA), May 2013. DOI: 10.1109/IPDPS.2013.53.

§ AUTORES: Cesare Cugnasco, Roger Hernandez, Yolanda Becerra, Jordi Torres and Eduard

Ayguadé TITULO: Aeneas: A Tool to Enable Applications to Effectively Use Non-Relational Databases CONGRESO: 2013 International Conference on Computational Science (ICCS 2013), Barcelona (Spain). Procedia Computer Science, vol. 18, pp. 2561-2564. June 2013. DOI: 10.1016/j.procs.2013.05.441.

§ AUTORES: Javier Bueno, Xavier Martorell, Rosa M. Badia, Eduard Ayguadé and Jesús Labarta

TITULO: Implementing OmpSs Support for Regions of Data in Architectures with Multiple Address Spaces CONGRESO: Proceedings of the International Conference on Supercomputing (ICS-2013), pp. 359 - 368, Eugene, Oregon (USA), June 2013. DOI: 10.1145/2464996.2465017.

§ AUTORES: Jorda Polo, Yolanda Becerra, David Carrera, Jordi Torres, Eduard Ayguadé, Mike

Spreitzer and Malgorzata Steinder TITULO: Enabling Distributed Key-Value Stores with Low Latency-Impact Snapshot Support CONGRESO: 12th Annual IEEE International Symposium on Network Computing and Applications (NCA13), pp. 65-72. Cambridge (MA), August 2013. DOI: 10.1109/NCA.2013.42.

§ AUTORES: Rahulkumar Gayatri, Rosa M. Badia and Eduard Ayguadé TITULO: Loop Level Speculation in a Task Based Programming Model CONGRESO: 2013 IEEE International Conference on High Performance Computing (HiPC), pp.39-48. Bengaluru (Bangalore, India). December 2013. DOI: 10.1109/HiPC.2013.6799132

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Adrian Cristal, Osman Unsal, Eduard Ayguade,

Mateo Valero and Santhosh Kumar Rethinagiri TITULO: APMC: Advanced Pattern based Memory Controller CONGRESO: 22nd ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA 2014), pp. 252. Monterrey CA (USA), February 2014. DOI: 10.1145/2554688.2554732.

§ AUTORES: Edans Sandes, Guillermo Miranda, Alba Melo, Xavier Martorell and Eduard Ayguadé

TITULO: Fine-Grain Parallel Megabase Sequence Comparison with Multiple Heterogeneous GPUs CONGRESO: 19th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPOPP, Orlando, FL, 2014. In ACM SIGPLAN Notices, Vol. 49, No. 8, pp. 383-384. February 2014. Doi: 10.1145/2555243.2555280

§ AUTORES: Branimir Dickov, Miquel Pericàs, Paul M. Carpenter, Nacho Navarro, Eduard Ayguadé

TÍTULO: Software-Managed Power Reduction in Infiniband Links CONGRESO: 43rd International Conference on Parallel Processing (ICPP-2014), pp. 311-320, Minneapolis (USA), September 2014. DOI: 10.1109/ICPP.2014.40

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Osman S. Unsal, Adrian Cristal, Eduard

Ayguadé, and Mateo Valero TITULO: Stand-alone Memory Controller for Graphics System CONGRESO: 10th International Symposium on Applied Reconfigurable Computing (ARC-2014). Vilamoura (Portugal). Also in Lecture Notes in Computer Science, Vol. 8405, pp 108-120. April 2014. DOI: 10.1007/978-3-319-05960-0_10.

§ AUTORES: Jordà Polo, Yolanda Becerra, David Carrera, Jordi Torres, Eduard Ayguadé and

Malgorzata Steinder TITULO: Adaptive MapReduce Scheduling in Shared Environments CONGRESO: 14th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid 2014), pp. 61-70. Chicago IL, USA. May 2014. DOI: 10.1109/CCGrid.2014.65.

§ AUTORES: Edans F. de O. Sandes, Guillermo Miranda, Alba C. M. A. de Melo, Xavier Martorell

and Eduard Ayguadé TITULO: CUDAlign 3.0: Parallel Biological Sequence Comparison in Large GPU Clusters CONGRESO: 14th IEEE/ACM International Symposium on Cluster, Cloud and Grid Computing (CCGrid-2014), pp. 160-169. Chicago (IL), USA, May 2014. DOI: 10.1109/CCGrid.2014.18.

§ AUTORES: Vladimir Gajinov, Igor Eric, Srdjan Stipic, Osman Unsal, Eduard Ayguadé and Adrian

Cristal TITULO: DaSH: A Benchmark for Hybrid Dataflow and Shared Memory Programming Models: With Comparative Evaluation of Three Hybrid Dataflow Models CONGRESO: ACM International Conference on Computing Frontiers (CF’2014), Article No. 4. Cagliari, Italy. May 2014. Doi: 10.1145/2597917.2597942.

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Osman S. Unsal, Adrian Cristal, Eduard Ayguadé

and Mateo Valero TITULO: PVMC: Programmable Vector Memory Controller CONGRESO: 25th IEEE International Conference on Application-Specific Systems, Architectures and Processors (ASAP-2014), pp. 240-247. Zurich, Switzerland. June 2014. DOI: 10.1109/ASAP.2014.6868668.

§ AUTORES: Vladimir Subotic, Eduard Ayguadé, Jesus Labarta and Mateo Valero TITLE: Automatic Exploration of Potential Parallelism in Sequential Applications CONGRESO: 29th International Supercomputing Conference, ISC 2014. Also in Lecture Notes in Computer Science, Springer Verlag, vol. 8488, pp. 156-171. June 2014. DOI: 10.1007/978-3-319-07518-1-10.

§ AUTORES: Vinoth Elangovan, Rosa M. Badia and Eduard Ayguadé

TITLE: Scalability and parallel execution of OmpSs-OpenCL tasks on heterogeneous CPU-GPU environment CONGRESO: 29th International Supercomputing Conference, ISC 2014. Also in Lecture Notes in Computer Science, Springer Verlag, vol. 8488, pp. 141-155. June 2014. Doi: 10.1007/978-3-319-07518-1_9.

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguade

and Mateo Valero TITULO: Advanced Pattern based Memory Controller for FPGA based HPC Applications CONGRESO: International Conference on High Performance Computing & Simulation (HPCS 2014), Bologna (Italy), pp. 287 – 294. July 2014. Doi: 10.1109/HPCSim.2014.6903697.

§ AUTORES: Alejandro Fernández, Vicenç Beltran, Xavier Martorell, Rosa M. Badia, Eduard Ayguadé and Jesus Labarta TITULO: Task-Based Programming with OmpSs and Its Application CONGRESO: Workshop on Software for Exascale Computing (SPPEXA), in conjunction with 20th International Conference Euro-Par Parallel Processing, Porto (Portugal), August 2014. Also published in Euro-Par 2014 Workshop, Part II, Lecture Notes in Computer Science vol. 8806, pp. 602--613. 2014. DOI: 10.1007/978-3-319-14313-2_51.

§ AUTORES: Nicolas Poggi, David Carrera, Eduard Ayguadé and Jordi Torres TITULO: Profit-Aware Cloud Resource Provisioner for Ecommerce (short paper) CONGRESO: 16th International Conference on Cluster Computing (IEEE Cluster 2014), Madrid (Spain). pp. 274-275. September 2014. Doi: 10.1109/CLUSTER.2014.6968746.

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Adrián Cristal, Osman Unsal, Eduard Ayguadé and Mateo Valero TITULO: MAPC: Memory Access Pattern based Controller CONGRESO: 24th International Conference on Field Programmable Logic and Applications (FPL-2014), pp. 1-4. Munich (Germany). September 2014. Doi: 10.1109/FPL.2014.6927397.

§ AUTORES: Michael Wong, Eduard Ayguadé, Justin Gottschlich, Victor Luchangco, Bronis R. de Supinski and Barna Bihari TÍTULO: Towards Transactional Memory for OpenMP CONGRESO: 10th International Workshop on OpenMP (IWOMP 2014). Using and Improving OpenMP for Devices, Tasks, and More. Lecture Notes in Computer Science, vol. 8766, pp. 130-145. Salvador, Brazil. September 2014. Doi: 10.1007/978-3-319-11454-5_10.

§ AUTORES: Guray Ozen, Eduard Ayguadé and Jesús Labarta TÍTULO: On the Roles of the Programmer, the Compiler and the Runtime System When Programming Accelerators in OpenMP CONGRESO: 10th International Workshop on OpenMP (IWOMP 2014). Using and Improving OpenMP for Devices, Tasks, and More. Lecture Notes in Computer Science, vol. 8766, pp. 215-229. Salvador, Brazil. September 2014. Doi: 10.1007/978-3-319-11454-5_16.

§ AUTORES: Jan Ciesko, Sergi Mateo, Xavier Teruel, Vicenç Beltran, Xavier Martorell, Rosa M. Badia, Eduard Ayguadé and Jesús Labarta TÍTULO: Task-Parallel Reductions in OpenMP and OmpSs CONGRESO: 10th International Workshop on OpenMP (IWOMP 2014). Using and Improving OpenMP for Devices, Tasks, and More. Lecture Notes in Computer Science, vol. 8766, pp. 1-15. Salvador, Brazil. September 2014. Doi: 10.1007/978-3-319-11454-5_1.

§ AUTORES: Nicolas Poggi, David Carrera, Aaron Call, Rob Reinauer, Nikola Vujic, Daron Green, José Blakeley, Sergio Mendoza, Yolanda Becerra, Jordi Torres, Eduard Ayguadé, and Jesús Labarta TITULO: ALOJA: a Systematic Study of Hadoop Deployment Variables to Enable Automated Characterization of Cost-Effectiveness CONGRESO: 2014 IEEE International Conference on Big Data (IEEE BigData 2014), pp. 905-913. Washington DC (USA). October 2014. Doi: 10.1109/BigData.2014.7004322.

§ AUTORES: Daniel Cea, Jordi Nin, Ruben Tous, Jordi Torres and Eduard Ayguadé TÍTULO: Towards the Cloudification of the Social Networks Analytics CONGRESO: The 11th International Conference on Modeling Decisions for Artificial Intelligence (MDAI-2014). Also in Lecture Notes in Computer Science, Vol. 8825, pp. 192-203. Tokyo (Japan), October 2014. DOI: 10.1007/978-3-319-12054-6_17.

§ AUTORES: Vladimir Gajinov, Igor Eric, Sasa Stojanovic, Veljko Milutinović, Osman Unsal, Eduard Ayguadé and Adrian Cristal TÍTULO: A Case Study of Hybrid Dataflow and Shared-memory Programming Models: Dependency-based Parallel Game Engine CONGRESO: 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), pp. 1-8. Paris (France). October 2014. DOI: 10.1109/SBAC-PAD.2014.21.

§ AUTORES: Branimir Dickov, Miquel Pericàs, Paul Carpenter, Nacho Navarro and Eduard Ayguadé TÍTULO: Analyzing performance improvements and energy savings in Infiniband Architecture using network compression CONGRESO: 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), pp. 73-80. Paris (France). October 2014. DOI: 10.1109/SBAC-PAD.2014.27.

§ AUTORES: Florentino Sainz, Sergi Mateo, Vicenç Beltran, José L. Bosque, Xavier Martorell and Eduard Ayguadé TÍTULO: Leveraging OmpSs to exploit hardware accelerators CONGRESO: 2014 IEEE 26th International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD), pp. 112-119. Paris (France). October 2014. DOI: 10.1109/SBAC-PAD.2014.26.

§ AUTORES: Alejandro Fernández, Vicenç Beltran, Sergi Mateo, Tomasz Patejko and Eduard Ayguadé TÍTULO: A data flow language to develop high performance computing DSLs CONGRESO: Proceedings of the Fourth International Workshop on Domain-Specific Languages and High-Level Frameworks for High Performance Computing, pp. 11-20. New Orleans (USA). November 2014. DOI: 10.1109/WOLFHPC.2014.6

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé and Mateo Valero TÍTULO: AMMC: Advance Multi-core Memory Controller CONGRESO: 2014 International Conference on Field-Programmable Technology (FPT-2014), short paper, pp. 292-295. Shanghai, China. December 2014. 10.1109/FPT.2014.7082802.

§ AUTORES: Tassadaq Hussain, Nehir Sonmez, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguade and Mateo Valero TÍTULO: PAMS: Pattern Aware Memory System for Embedded Systems CONGRESO: 2014 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2014), pp. 1-7. Cancún, México. December 2014. DOI: 10.1109/ReConFig.2014.7032544.

§ AUTORES: Rahul Gayatri, Rosa M. Badia and Eduard Ayguadé TÍTULO: Analysis of the overheads incurred due to speculation in a task based programming model CONGRESO: Eight Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG-2015). Held in conjunction with the 10th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC). Amsterdam, The Netherlands, January 20, 2015.

§ AUTORES: Vinoth Krishnan Elangovan, Rosa M. Badia, Eduard Ayguadé TÍTULO: Auto-Tuning OmpSs-OpenCL Kernels Across GPU Machines CONGRESO: 6th Workshop on Parallel Programming and Run-Time Management Techniques for Many-core Architectures (PARMA-DITAM). Held in conjunction with the 10th International Conference on High-Performance and Embedded Architectures and Compilers (HiPEAC). Pp. 31-36. Amsterdam, The Netherlands, January 2015. DOI: 10.1145/2701310.2701316.

§ AUTORES: Roger Hernandez, Cesare Cugnasco, Yolanda Becerra, Jordi Torres and Eduard

Ayguadé TÍTULO: Experiences of Using Cassandra for Molecular Dynamics Simulations CONGRESO: 23rd Euromicro International Conference on Parallel, Distributed and Network-Based Processing (PDP 2015), pp. 288-295. March 2015. DOI: 10.1109/PDP.2015.43.

§ AUTORES: Hugo Pérez, Benjamín Hernández, Isaac Rudomin and Eduard Ayguadé TÍTULO: Scaling Crowd Simulations in a GPU Accelerated Cluster CONGRESO: 6th International Conference ISUM, Mexico City (Mexico), March 2015. Revised selected papers in High Performance Computer Applications, Communications in Computer and Information Science, vol. 595, pp. 461-472, 2016. DOI: 10.1007/978-3-319-32243-8.

§ AUTORES: Ruben Tous, Jordi Torres and Eduard Ayguadé

TÍTULO: Multimedia Big Data Computing for In-depth Event Analysis CONGRESO: First IEEE International Conference on Multimedia Big Data (BigMM 2015), pp- 144-147. Beijing, China. April 2015. DOI: 10.1109/BigMM.2015.39.

§ AUTORES: Kallia Chronaki, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta and

Mateo Valero TÍTULO: Criticality-Aware Dynamic Task Scheduling for Heterogeneous Architectures CONGRESO: 29th International Conference on Supercomputing (ICS’15), pp. 329-338, Newport Beach CA (USA), June 2015. DOI: 10.1145/2751205.2751235.

§ AUTORES: Lluc Alvarez, Lluis Vilanova, Marc Gonzalez, Xavier Martorell, Nacho Navarro, Eduard Ayguadé and Mateo Valero TÍTULO: Coherence Protocol for Transparent Management of Scratchpad Memories in Shared Memory Manycore Architectures CONGRESO: 42nd International Symposium on Computer Architecture (ISCA 2015). In ACM SIGARCH Computer Architecture News, Vol. 43, No. 3, pp. 720-732. Portland (OR), USA. June 2015. DOI: 10.1145/2749469.2750411.

§ AUTORES: Eduard Ayguadé, Rosa M. Badia, Daniel Jiménez, Josep Ramón Herrero, Jesús Labarta, Vladimir Subotic and Gladys Utrera TÍTULO: Tareador: A Tool to Unveil Parallelization Strategies at Undergraduate Level CONGRESO: Workshop on Computer Architecture Education (WCAE'15), held in conjunction with the 42nd International Symposium on Computer Architecture (ISCA 2015). Portland (OR), USA. June 2015. DOI: 10.1145/2795122.2795123. ISBN 978-1-4503-3717-5, 2015.

§ AUTORES: Judit Planas, Rosa M. Badia, Eduard Ayguadé and Jesús Labarta

TÍTULO: AMA: Asynchronous Management of Accelerators for Task-based Programming Models CONGRESO: International Conference on Computational Science (ICCS 2015). Reykjavík, Iceland. Procedia Computer Science, vol. 51, pp. 130-139, June 2015. DOI: 10.1016/j.procs.2015.05.212.

§ AUTORES: Roger Hernandez, Yolanda Becerra, Jordi Torres and Eduard Ayguadé TÍTULO: Automatic Query Driven Data Modelling in Cassandra CONGRESO: International Conference on Computational Science (ICCS 2015). Reykjavík, Iceland. Procedia Computer Science, vol. 51, pp. 2822–2826, June 2015. DOI: 10.1016/j.procs.2015.05.441.

§ AUTORES: Paolo Burgio, Carlos Alvarez, Eduard Ayguadé, Antonio Filgueras, Daniel Jiménez-González, Xavier Martorell, Nacho Navarro, and Roberto Giorgi TÍTULO: The AXIOM H2020 project. Simulating next-generation Cyber-physical computing platforms CONGRESO: Workshop on Challenges and New Approaches for Dependable and Cyber-Physical System Engineering (De-CPS 2015), in conjunction with 20th Int. Conference on Reliable Software Technologies (Ada-Europe 2015), Madrid (Spain), June 2015. In Ada User Journal, vol. 37, no. 1, pp. 59 - 63. March 2016.

§ AUTORES: Dimitris Theodoropoulos, Dionisios N. Pnevmatikatos, Carlos Álvarez, Eduard Ayguadé, Javier Bueno, Antonio Filgueras, Daniel Jiménez-González, Xavier Martorell, Nacho Navarro, Carlos Segura, Carles Fernández, David Oro, Javier Rodríguez Saeta, Paolo Gai, Antonio Rizzo, Roberto Giorgi TÍTULO: The AXIOM project (Agile, eXtensible, fast I/O Module) CONGRESO: 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS 2015). Pp. 262-269. July 2015. DOI: 10.1109/SAMOS.2015.7363684.

§ AUTORES: Marc Casas, Miquel Moretó, Lluc Alvarez, Emilio Castillo, Dimitrios Chasapis, Timothy

Hayes, Luc Jaulmes, Oscar Palomar, Osman S. Unsal, Adrián Cristal, Eduard Ayguadé, Jesús Labarta, Mateo Valero. TÍTULO: Runtime-Aware Architectures CONGRESO: 21st International Conference on Parallel and Distributed Computing. EuroPar 2015: Parallel Processing. Lecture Notes in Computer Science, vol. 9233, pp 16-27. Vienna, Austria. August 2015. DOI: 10.1007/978-3-662-48096-0_2.

§ AUTORES: Ahsan Awan, Mats Brorsson, Vladimir Vlassov and Eduard Ayguadé

TÍTULO: Performance Characterization of In-Memory Data Analytics on a Modern Cloud Server CONGRESO: 2015 IEEE Fifth International Conference on Big Data and Cloud Computing (BDCloud), pp. 1-8, Dalian (China), August 2015. DOI: 10.1109/BDCloud.2015.37. Best paper award.

§ AUTORES: Ahsan Javed Awan, Mats Brorsson, Vladimir Vlassov and Eduard Ayguadé

TÍTULO: How Data Volume Affects Spark Based Data Analytics on a Scale-up Server CONGRESO: 6th Workshop on Big Data Benchmarks, Performance Optimization, and Emerging Hardware (BPOE 2015), Kohala, HI, USA. September 2015. Lecture Notes in Computer Science vol. 9495, pp. 81-92, September 2016. DOI: 10.1007/978-3-319-29006-5_7.

§ AUTORES: Carlos Álvarez, Eduard Ayguadé, Javier Bueno, Antonio Filgueras, Daniel Jiménez-González, Xavier Martorell, Nacho Navarro, Dimitris Theodoropoulos, Dionisios N. Pnevmatikatos, Davide Catani, Claudio Scordino, Paolo Gai, Carlos Segura, Carles Fernández, David Oro, Javier Rodríguez Saeta, Pierluigi Passera, Alberto Pomella, Antonio Rizzo, Roberto Giorgi TÍTULO: The AXIOM Software Layers CONGRESO: 2015 Euromicro Conference on Digital System Design (DSD 2015), pp. 117-124. August 2015. DOI: 10.1109/DSD.2015.52.

§ AUTORES: Milan Radulovic, Darko Zivanovic, Daniel Ruiz, Bronis R. de Supinski, Sally A.

McKee, Petar Radojkovic and Eduard Ayguadé TÍTULO: Another Trip to the Wall: How Much Will Stacked DRAM Benefit HPC? CONGRESO: 2015 International Symposium on Memory Systems (MEMSYS 2015), pp. 31-36. Washington DC (USA). October 2015. DOI:10.1145/2818950.2818955.

§ AUTORES: Jan Ciesko, Sergi Mateo, Xavier Teruel, Xavier Martorell, Eduard Ayguadé, Jesús

Labarta, Alex Duran, Bronis R. de Supinski, Stephen Olivier, Kelvin Li, Alexandre E. Eichenberger TÍTULO: Towards Task-Parallel Reductions in OpenMP CONGRESO: 11th International Workshop on OpenMP (IWOMP 2015), Lecture Notes in Computer Science Vol. 9342, pp 189-201. Aachen, Germany. October 2015. DOI: 10.1007/978-3-319-24595-9_14.

§ AUTORES: Raul Vidal, Marc Casas, Miquel Moretó, Dimitrios Chasapis, Roger Ferrer, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Mateo Valero TÍTULO: Evaluating the Impact of OpenMP 4.0 Extensions on Relevant Parallel Workloads. CONGRESO: 11th International Workshop on OpenMP (IWOMP 2015), Lecture Notes in Computer Science Vol. 9342, pp 60-72. Aachen, Germany. October 2015. DOI: 10.1007/978-3-319-24595-9_5.

§ AUTORES: Dario Garcia-Gasulla, Ulises Cortés, Eduard Ayguadé, Jesús Labarta

TÍTULO: Evaluating Link Prediction on Large Graphs CONGRESO: 18th International Conference of the Catalan Association for Artificial Intelligence (CCIA 2015), Frontiers in Artificial Intelligence and Applications, vol. 277, pp. 90-99, Valencia (Spain). October 2015. ISBN: 978-1-61499-577-7. DOI: 10.3233/978-1-61499-578-4-90.

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Adrián Cristal, Eduard Ayguadé, Amna Haider

TÍTULO: ViPS: Visual processing system for medical imaging CONGRESO: 8th International Conference on Biomedical Engineering and Informatics (BMEI), pp. 40-45, October 2015. DOI: 10.1109/BMEI.2015.7401470.

§ AUTORES: Rubén Tous, Anastasios Gounaris, Carlos Tripiana, Jordi Torres, Sergi Girona,

Eduard Ayguadé, Jesús Labarta, Yolanda Becerra, David Carrera, Mateo Valero TÍTULO: Spark deployment and performance evaluation on the MareNostrum supercomputer CONGRESO: 2015 IEEE International Conference on Big Data (Big Data 2015), pp. 299-306. Santa Clara, CA, USA, October 2015. DOI: 10.1109/BigData.2015.7363768.

§ AUTORES: Lluc Alvarez, Miquel Moretó, Marc Casas, Emilio Castillo, Xavier Martorell, Jesús

Labarta, Eduard Ayguadé, Mateo Valero TÍTULO: Runtime-Guided Management of Scratchpad Memories in Multicore Architectures CONGRESO: 24th International Conference on Parallel Architectures and Compilation Techniques (PACT 2015), pp. 379-391, San Francisco CA (USA), October 2015. DOI: 10.1109/PACT.2015.26.

§ AUTORES: Luc Jaulmes, Marc Casas, Miquel Moretó, Eduard Ayguadé, Jesús Labarta, Mateo Valero TÍTULO: Exploiting asynchrony from exact forward recovery for DUE in iterative solvers CONGRESO: 2015 International Conference for High Performance Computing, Networking, Storage and Analysis (SC-15). Article No. 53:1-12. Austin, Texas (USA). November 2015. DOI:10.1145/2807591.2807599.

§ AUTORES: Guray Ozen, Eduard Ayguadé and Jesús Labarta TÍTULO: Exploring dynamic parallelism in OpenMP CONGRESO: Second Workshop on Accelerator Programming using Directives (WACCPD '15), in conjunction with SC-15, article No. 5. Austin, Texas (USA). DOI:10.1145/2832105.2832113.

§ AUTORES: Judit Planas, Rosa M. Badia, Eduard Ayguadé, Jesús Labarta

TÍTULO: SSMART: smart scheduling of multi-architecture tasks on heterogeneous systems CONGRESO: Second Workshop on Accelerator Programming using Directives (WACCPD '15), in conjunction with SC-15, article No. 1. Austin, Texas (USA). DOI: 10.1145/2832105.2832109.

§ AUTORES: Branimir Dickov, Paul M. Carpenter, Miquel Pericàs, Eduard Ayguadé TÍTULO: Self-Tuned Software-Managed Energy Reduction in InfiniBand Links CONGRESO: 21st International Conference on Parallel and Distributed Systems (ICPADS 2015), pp. 649-657. Melbourne, Australia. December 2015. DOI: 10.1109/ICPADS.2015.87.

§ AUTORES: Cesare Cugnasco, Yolanda Becerra, Jordi Torres and Eduard Ayguadé TÍTULO: D8-tree: a de-normalized approach for multidimensional data analysis on key-value databases CONGRESO: 17th International Conference on Distributed Computing and Networking (ICDCN 2016). Pp. 18:1-18:10. Singapore. January 2016. DOI: 10.1145/2833312.2833314.

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Adrian Cristal, Eduard Ayguadé, Faisal Kamran,

Shakaib Arsalan Gursal and Amna Haider TITULO: MVPA: An FPGA based Multi-Vector Processor Architecture CONGRESO: 13th International Bhurban Conference on Applied Sciences and Technology (IBCAST 2016), pp. 213-218. Islamabad (Pakistan), January 2016. DOI: 10.1109/IBCAST.2016.7429879.

§ AUTORES: Tassadaq Hussain, Oscar Palomar, Adrian Cristal, Eduard Ayguadé and Amna Haider TITULO: Access pattern based multi-layer bus virtualization controller CONGRESO: 13th International Bhurban Conference on Applied Sciences and Technology (IBCAST 2016), pp. 173-178. Islamabad (Pakistan), January 2016. DOI: 10.1109/IBCAST.2016.7429873.

§ AUTORES: Xubin Tan, Jaume Bosch, Daniel Jimenez-Gonzalez, Carlos Alvarez-Martinez, Eduard Ayguadé and Mateo Valero TÍTULO: Performance Analysis of a Hardware Accelerator of Dependency Management for Task-based Dataflow Programming models CONGRESO: 2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2016), pp. 225-234. Uppsala (Sweeden), April 2016. DOI: 10.1109/ISPASS.2016.7482097.

§ AUTORES: Thomas Grass, Alejandro Rico, Marc Casas, Miquel Moreto and Eduard Ayguadé, TÍTULO: TaskPoint: Sampled Simulation of Task- Based Programs CONGRESO: 2016 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2016), pp. 296-306. Uppsala (Sweeden), April 2016. DOI: 10.1109/ISPASS.2016.7482104.

§ AUTORES: Emilio Castillo, Miquel Moreto, Marc Casas, Lluc Alvarez, Enrique Vallejo, Kallia Chronaki, Rosa Badia, Jose Luis Bosque, Ramon Beivide, Eduard Ayguade, Jesus Labarta and Mateo Valero TÍTULO: CATA: Criticality Aware Task Acceleration for Multicore Processors CONGRESO: IEEE 30th International Parallel and Distributed Processing Symposium (IPDPS 2016), pp. 413 - 422, Chicago, USA, May 2016. DOI: 10.1109/IPDPS.2016.49.

§ AUTORES: Dimitrios Chasapis, Marc Casas, Miquel Moreto, Martin Schulz, Eduard Ayguadé, Jesús Labarta and Mateo Valero TÍTULO: Runtime-guided Mitigation of Manufacturing Variability in Power-Constrained Multi-Socket NUMA Nodes CONGRESO: 30th International Conference on Supercomputing (ICS’16), article no. 5:1-12, Istambul (Turkey), June 2016. DOI: 10.1145/2925426.2926279.

§ AUTORES: Roberto Giorgi, Somnath Mazumdar, Stefano Viola, Paolo Gai, Stefano Garzarella, Bruno Morelli, Dionisios Pnevmatikatos, Dimitris Theodoropoulos, Carlos Alvarez, Eduard Ayguadé, Javier Bueno, Antonio Filgueras,Daniel Jimenez-Gonzalez and Xavier Martorell TÍTULO: Modeling Multi-Board Communication in the AXIOM Cyber-Physical System CONGRESO: Workshop on Challenges and New Approaches for Dependable and Cyber-Physical System Engineering (De-CPS 2016), in conjunction with 21st International Conference on Reliable Software Technologies (Ada-Europe 2016), Pisa (Italy), June 2016. In Ada User Journal, vol. 37, no. 4, pp. 228-235. December 2016.

§ AUTORES: Somnath Mazumdar, Eduard Ayguade, Nicola Bettin, Javier Bueno, Sara Ermini, Antonio Filgueras, Daniel Jiminez-Gonzalez, Carlos Alvarez Martinez, Xavier Martorell, Francesco Montefoschi, David Oro, Dionisios Pnevmatikatos, Antonio Rizzo, Dimitris Theodoropoulos and Roberto Giorgi TÍTULO: AXIOM: A Hardware-Software Platform for Cyber Physical Systems CONGRESO: 2016 Euromicro Conference on Digital System Design (DSD 2016), pp. pp. 539–546. August 2016. DOI: 10.1109/DSD.2016.80.

§ AUTORES: Victor Garcia, Juán Gomez-Luna, Thomas Grass, Antonio Peña, Alejandro Rico and Eduard Ayguadé TÍTULO: Evaluating the Effect of Last-Level Cache Sharing on Integrated GPU-CPU Systems with Heterogeneous Applications CONGRESO: 2016 IEEE International Symposium on Workload Characterization (IISWC-2016), pp. 168-177. Providence, Rhode Island, USA, September 2016. DOI: 10.1109/IISWC.2016.7581277.

§ AUTORES: Paul Caheny, Marc Casas, Miquel Moretó, Hervé Gloaguen, Maxime Saintes, Eduard Ayguadé, Jesús Labarta, Mateo Valero TÍTULO: Reducing Cache Coherence Traffic with Hierarchical Directory Cache and NUMA-Aware Runtime Scheduling CONGRESO: 25th International Conference on Parallel Architectures and Compilation Techniques (PACT-2016), pp. 275-286. Haifa, Israel. September 2016. DOI: 10.1145/2967938.2967962.

§ AUTORES: Guray Ozen, Eduard Ayguade, Jesus Labarta TÍTULO: POSTER: Collective Dynamic Parallelism for Directive Based GPU Programming Languages and Compilers CONGRESO: 25th International Conference on Parallel Architectures and Compilation Techniques (PACT-2016), pp. 423-424. Haifa, Israel. September 2016. DOI: 10.1145/2967938.2974056.

§ AUTORES: Kallia Chronaki, Miquel Moretó, Marc Casas, Alejandro Rico, Rosa M. Badia, Eduard Ayguadé, Jesus Labarta, Mateo Valero TÍTULO: POSTER: Exploiting Asymmetric Multi-Core Processors with Flexible System Sofware CONGRESO: 25th International Conference on Parallel Architectures and Compilation Techniques (PACT-2016), pp. 415-417. Haifa, Israel. September 2016. DOI: 10.1145/2967938.2976038.

§ AUTORES: Darko Zivanovic, Milan Radulovic, German Llort, David Zaragoza, Janko Strassburg, Paul Carpenter, Petar Radojkovic and Eduard Ayguadé TÍTULO: Large-Memory Nodes for Energy Efficient High-Performance Computing CONGRESO: Second International Symposium on Memory Systems (MEMSYS 2016). pp. 3 - 9. October 2016. Best paper award. DOI: 10.1145/2989081.2989083.

§ AUTORES: Dario Garcia-Gasulla, Jonathan Moreno, Raul Ramon-Pollan, Romel Casadiegos, Javier Bejar, Ulises Cortés, Eduard Ayguadé, Jesús Labarta and Toyotaro Suzumura TÍTULO: On the Representativeness of Convolutional Neural Networks Layers CONGRESO: 19th International Conference of the Catalan Association of Artificial Intelligence (CCIA 2016). In Frontiers in Artificial Intelligence and Applications, Vol. 288: Artificial Intelligence Research and Development. Pp. 29-38. October 2016. DOI: 10.3233/978-1-61499-696-5-29.

§ AUTORES: Ahsan Javed Awan, Eduard Ayguadé, Mats Brorsson and Vladimir Vlassov TÍTULO: Micro-architectural Characterization of Apache Spark on Batch and Stream Processing Workloads CONGRESO: The 6th IEEE International Conference on Big Data and Cloud Computing (BDCloud 2016), Atlanta (GA) USA. pp. 59-66. October 2016. DOI: 10.1109/BDCloud-SocialCom-SustainCom.2016.20.

§ AUTORES: Germán Llort, Antonio Filgueras, Daniel Jiménez-González, Harald Servat, Xavier Teruel, Estanislao Mercadal, Carlos Álvarez, Judit Giménez, Xavier Martorell, Eduard Ayguadé, and Jesús Labarta TÍTULO: The secrets of the accelerators unveiled: Tracing heterogeneous executions through OMPT CONGRESO: 12th International Workshop on OpenMP (IWOMP 2016), Nara, Japan, October 2016. Lecture Notes in Computer Science, OpenMP: Memory, Devices, and Tasks, Vol. 9903, pp. 217-236. DOI: 10.1007/978-3-319-45550-1_16.

§ AUTORES: Guray Ozen, Sergi Mateo, James Beyer, Eduard Ayguade, and Jesus Labarta TÍTULO: Multiple Target Task Sharing Support for the OpenMP Accelerator Model CONGRESO: 12th International Workshop on OpenMP (IWOMP 2016), Nara, Japan, October 2016. Lecture Notes in Computer Science, OpenMP: Memory, Devices, and Tasks, Vol. 9903, pp. 268-280. DOI: 10.1007/978-3-319-45550-1_19.

§ AUTORES: Jan Ciesko, Sergi Mateo, Xavier Teruel, Xavier Martorell, Eduard Ayguade, and Jesus Labarta TÍTULO: Supporting Adaptive Privatization Techniques for Irregular Array Reductions in Task-parallel Programming Models CONGRESO: 12th International Workshop on OpenMP (IWOMP 2016), Nara, Japan, October 2016. Lecture Notes in Computer Science, OpenMP: Memory, Devices, and Tasks, Vol. 9903, pp. 336-349. DOI: 10.1007/978-3-319-45550-1_24.

§ AUTORES: Nikola Rajovic, Alejandro Rico, Filippo Mantovani, Daniel Ruiz, Josep Oriol Vilarrubi, Constantino Gomez, Luna Backes, Diego Nieto, Harald Servat, Xavier Martorell, Jesús Labarta, Eduard Ayguadé, Chris Adeniyi-Jones, Said Derradji, Herve Gloaguen, Piero Lanucara, Nico Sanna, Jean-Francois Mehaut, Kevin Pouget, Brice Videau, Eric Boyer, Momme Allalen, Axel Auweter, David Brayford, Daniele Tafani, Dirk Broemmel, Rene Halver, Jan H. Meinke, Ramon Beivide, Mariano Benito, Enrique Vallejo, Mateo Valero and Alex Ramirez TÍTULO: The Mont-Blanc prototype: An Alternative Approach for HPC Systems CONGRESO: The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC16). pp. 38:1-38:12. Salt Lake City (Utah), November 2016. http://dl.acm.org/citation.cfm?id=3014904.3014955.

§ AUTORES: Diego Marron, Jesse Read, Albert Bifet, Talel Abdessalem, Eduard Ayguadé and José R. Herrero TÍTULO: Echo State Hoeffding Tree Learning CONGRESO: The 8th Asian Conference on Machine Learning 2016 (ACML 2016). Hamilton, New Zeland. Journal of Machine Learning Research (JMLR): Workshop and Conference Proceedings, Vol. 63, pp. 382–397. November 2016. ISBN: 1938-7228.

§ AUTORES: Thomas Grass, César Allande, Adrià Armejach, Miquel Moreto, Marc Casas, Alejandro Rico, Eduard Ayguadé, Jesús Labarta and Mateo Valero TÍTULO: MUSA: A Multi-Level Simulation Infrastructure for Next-Generation HPC Machines CONGRESO: The International Conference for High Performance Computing, Networking, Storage, and Analysis (SC16). Pp. 45:1-45:12. Salt Lake City (Utah), November 2016. http://dl.acm.org/citation.cfm?id=3014904.3014965.

§ AUTORES: Ruben Tous, Otto Wust, Mauro Gomez, Jonatan Poveda, Marc Elena, Jordi Torres, Mouna Makni, and Eduard Ayguadé TÍTULO: User-generated Content Curation with Deep Convolutional Neural Networks CONGRESO: Workshop Application of Big Data for Computational Social Science, in conjunction with 2016 IEEE International Conference on Big Data. Pp. 2535-2540. Washington DC, USA. December 2016. DOI: 10.1109/BigData.2016.7840893.

§ AUTORES: Ahsan Javed Awan, Vladimir Vlassov, Mats Brorsson and Eduard Ayguadé TÍTULO: Node Architecture Implications for In-Memory Data Analytics on Scale-in Clusters CONGRESO: The 3rd IEEE/ACM International Conference on Big Data Computing, Applications and Technologies (BDCAT 2016), pp. 237-246. Shanghai, China. December 2016. DOI: 10.1145/3006299.3006319.

§ AUTORES: Xubin Tan, Jaume Bosch, Miquel Vidal, Carlos Álvarez, Daniel Jiménez-Gonzàlez, Eduard Ayguadé and Mateo Valero TÍTULO: General Purpose Task-Dependence Management Hardware for Task-based Dataflow Programming Models CONGRESO: 31st IEEE International Parallel and Distributed Processing Symposium (IPDPS-2017). Pp. 244-253. Orlando (FL, USA). May-June 2017. DOI: 10.1109/IPDPS.2017.48.

§ AUTORES: Josep M. Perez, Vicenç Beltran, Jesus Labarta and Eduard Ayguadé TÍTULO: Improving the integration of task nesting and dependencies in OpenMP CONGRESO: 31st IEEE International Parallel and Distributed Processing Symposium (IPDPS-2017). Pp. 809-818. Orlando (FL, USA). May-June 2017. DOI: 10.1109/IPDPS.2017.69.

§ AUTORES: Jaume Bosch, Xubin Tan, Carlos Álvarez, Daniel Jiménez, Xavier Martorell and Eduard Ayguadé TÍTULO: Characterizing and Improving the Performance of Many-Core Task-Based Parallel Programming Runtimes CONGRESO: 2nd Annual Workshop on Emerging Parallel and Distributed Runtime Systems and Middleware (IPDRM'17). In Proceedings of 31st IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW-2017). Pp. 1285-1292. Orlando (FL, USA). May-June 2017. DOI: 10.1109/IPDPSW.2017.32.

§ AUTORES: Antoni Artigues, Cesare Cugnasco, Yolanda Becerra, Fernando Cucchietti, Guillaume Houzeaux, Mariano Vazquez, Jordi Torres, Eduard Ayguadé and Jesús Labarta TÍTULO: ParaView + Alya + D8tree: Integrating High Performance Computing and High Performance Data Analytics CONGRESO: International Conference on Computational Science (ICCS 2017). Procedia Computer Science, Vol. 108, pp. 465-474. Zurich, Switzerland. June 2017.

§ AUTORES: Marcos Maronas, Sergi Mateo, Vicenc Beltran and Eduard Ayguadé TÍTULO: A Directive-Based Approach to Perform Persistent Checkpoint/Restart CONGRESO: 15th International Conference on High Performance Computing & Simulation (HPCS 2017). Genoa, Italy. July 2017.

§ AUTORES: Victor Garcia Flores, Antonio J. Peña, Eduard Ayguadé TÍTULO: Efficient Data Sharing on Heterogeneous Architectures CONGRESO: 46th International Conference on Parallel Processing (ICPP-2017). Bristol, UK. August 2017.

§ AUTORES: Cesare Cugnasco, Yolanda Becerra, Jordi Torres, Eduard Ayguadé

TÍTULO: Exploiting key-value data stores scalability for HPC CONGRESO: 4th International Workshop on High Performance Computing for Big Data (HPC4BD). In conjunction with 46th International Conference on Parallel Processing (ICPP-2017). Bristol, UK. August 2017.

§ AUTORES: Dario Garcia-Gasulla, Armand Vilalta, Ferran Parés, Jonatan Moreno, Eduard

Ayguadé, Jesus Labarta, Ulises Cortés and Toyotaro Suzumura TÍTULO: Building Graph Representations of Deep Vector Embeddings CONGRESO: 2nd Workshop on Semantic Deep Learning (SemDeep-2). In conjunction with the 12th International Conference on Computational Semantics (IWCS-2017). Montpellier, France. September 2017

§ AUTORES: Armand Vilalta, Dario Garcia-Gasulla, Ferran Parés, Eduard Ayguadé, Jesus Labarta, Ulises Cortés and Toyotaro Suzumura TÍTULO: Full-Network Embedding in a Multimodal Embedding Pipeline CONGRESO: 2nd Workshop on Semantic Deep Learning (SemDeep-2). In conjunction with the 12th International Conference on Computational Semantics (IWCS-2017). Montpellier, France. September 2017

§ AUTORES: Antoni Navarro, Josep M. Perez, Eduard Ayguadé, Sergi Mateo and Vicenç Beltran TÍTULO: Adaptive and Architecture-Independent Task Granularity for Recursive Applications CONGRESO: 13th International Workshop on OpenMP (IWOMP-2017). Stony Brook, NY, USA. September 2017.

§ AUTORES: Ahsan Javed Awan, Mats Brorsson, Vladimir Vlassov and Eduard Ayguade

TÍTULO: Identifying the potential of Near Data Computing for Apache Spark CONGRESO: Third International Symposium on Memory Systems (MEMSYS 2017). Washington DC, USA. October 2017.

§ AUTORES: Ivan Tanasic, Isaac Gelado, Marc Jorda, Eduard Ayguadé and Nacho Navarro

TÍTULO: Efficient Exception Handling Support for GPUs CONGRESO: 50th International Symposium on Microarchitecture (MICRO-50). Boston, USA. October 2017.

§ AUTORES: Borja Perez, Esteban Stafford, Jose Luis Bosque, Ramon Beivide, Sergi Mateo,

Xavier Teruel, Xavier Martorell and Eduard Ayguadé TÍTULO: Extending OmpSs for OpenCL Kernel Co-Execution in Heterogeneous Systems CONGRESO: International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2017). Campinas, Brasil. October 2017.

Tesis Doctorales dirigidas § TITULO: Extracció Automática de Paral.lelisme en Bucles Seqüencials Numèrics amb

Recurrencies DOCTORANDO: Jordi Torres i Viñals UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 1993

§ TITULO: Optimització del Rendiment del Sistema de Memòria en Multiprocessadors Vectorials DOCTORANDO: Montse Peiron Guàrdia (Co-dirección con Mateo Valero) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 1995

§ TITULO: Reducing the Impact of Register Pressure on Software Pipelining DOCTORANDO: Josep Llosa Espuny (Co-dirección con Mateo Valero) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 1996

§ TITULO: Distribución Automática de Datos en MPP DOCTORANDO: Jordi Garcia Alminyana (Co-dirección con Jesús Labarta) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 1997

§ TITULO: Organization and Compiler Management of Register Files

DOCTORANDO: Javier Zalamea León (Co-dirección con Josep Llosa) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2002

§ TITULO: Memory Instruction Bypassing

DOCTORANDO: Daniel Ortega Fernandez (Co-dirección con Mateo Valero) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2003

§ TITULO: Multilevel Parallelism Exploitation in Shared-memory Multiprocessor Systems

DOCTORANDO: Marc Gonzalez Tallada (Co-dirección con Xavier Martorell) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2003

§ TITULO: Performance Improvement of Multithreaded Java Applications Execution on

Multiprocessor Systems DOCTORANDO: Jordi Guitart (Co-dirección con Jordi Torres) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2005

§ TITULO: Adaptive Execution Environments for Application Servers

DOCTORANDO: David Carrera Perez (Co-dirección con Jordi Torres) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2008

§ TITULO: Improving Web Server Efficiency on Commodity Hardware DOCTORANDO: Vicenç Beltran Querol (Co-dirección con Jordi Torres) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2008

§ TITULO: Self-tuned Parallel Runtimes: a Case of Study for OpenMP

DOCTORANDO: Alejandro Duran Gonzalez (Co-dirección con Julita Corbalan) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2008

§ TITULO: Running Stream-like Programs on Heterogeneous Multi-core Systems

DOCTORANDO: Paul Carpenter (Co-dirección con Alejandro Ramírez) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2011

§ TITULO: Software Caching Techniques and Hardware Optimizations for On-Chip Local Memories

DOCTORANDO: Nikola Vujic (Co-dirección con Marc Gonzàlez) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2012

§ TITULO: Architectural Explorations for Streaming Accelerators with Customized Memory Layouts

DOCTORANDO: Muhammad Shafiq (Co-dirección con Miquel Pericàs and José Ignacio Navarro) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2012

§ TITULO: Evaluating techniques for parallelization tuning in MPI, OmpSs and MPI/OmpSs

DOCTORANDO: Vladimir Subotic (Co-dirección con Jesús Labarta y Mateo Valero) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2013

§ TITULO: Atomic Dataflow Model DOCTORANDO: Vladimir Gajinov (Co-dirección con Adrián Cristal y Osman Unsal) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2014

§ TITULO: A Novel Access Pattern-based Multi-core Memory Architecture DOCTORANDO: Tassadaq Hussain (Co-dirección con Oscar Palomar) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2014

§ TITULO: Increasing Parallelism through Speculation in a Task-based Programming Model

DOCTORANDO: Rahulkumar Gayatri (Co-dirección con Rosa M. Badia) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2015

§ TITULO: OmpSs-OpenCL Programming Model for Heterogeneous Systems DOCTORANDO: Vinoth Krishnan Elangovan (Co-dirección con Rosa M. Badia) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2015

§ TÍTULO: Programming Models and Scheduling Techniques for Heterogeneous Architectures DOCTORANDO: Judit Planas Carbonell (Co-dirección con Rosa M. Badia) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2015

§ TÍTULO: MPI Layer Techniques to Improve Network Energy Efficiency

DOCTORADO: Branimir Dickov (Co-dirección con Paul Carpenter y Miquel Pericàs) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2015

§ TÍTULO: Towards Multiprogrammed GPUs DOCTORADO: Ivan Tanasic (Co-dirección con José Ignacio Navarro y Isaac Gelado) UNIVERSIDAD: Universitat Politècnica de Catalunya FACULTAD/ESCUELA: Departament d’Arquitectura de Computadors AÑO: 2017

Participación en comités y representaciones internacionales Título del Comité: OpenMP Architecture Review Board. Language Committee Entidad de la que depende: OpenMP ARB Tema: Definición modelo de programación OpenMP Fecha: Desde 2001 Título del Comité: cOMPunity, Inc. (The Community of OpenMP Users, Researchers, Tool Developers and Providers) Entidad de la que depende: cOMPunity, Inc. Tema: Miembro del Board of Directors Fecha: Desde 2004

Experiencia en organización de actividades de I+D Organización de congresos, seminarios, jornadas, etc., científicos-tecnológicos

§ TIPO DE PARTICIPACION: Comité Organizador

CONGRESO: 1as Jornadas de Paralelismo LUGAR/FECHA: Sitges, Barcelona (10/1990)

§ TIPO DE PARTICIPACION: Comité Organizador, Comité de Programa y Presidencia de Sesion CONGRESO: 2nd International Workshop on Massive Parallelism: Hardware, Software and Applications LUGAR/FECHA: Capri, Italy (10/1994)

§ TIPO DE PARTICIPACION: Comité Organizador (Local Arrangements and Registration Chair) y Presidencia de Sesion CONGRESO: 9th ACM International Conference on Supercomputing (ICS’95) LUGAR DE CELABRACION: Barcelona, Spain (7/95) AÑO: 1995

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: XV International Conference of the Chilean Computer Science Society (SCCC’95) LUGAR DE CELABRACION: Arica, Chile (11/95) AÑO: 1995

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: 8th IEEE Symposium on Parallel and Distributed Processing (SPDP’96) LUGAR DE CELABRACION: New Orleans, USA (10/96) AÑO: 1996

§ TIPO DE PARTICIPACION: Chair del Steering Committee y Comite Organizador

CONGRESO: 3rd Workshop on Automatic Data Layout and Performance Prediction (AP’97) LUGAR DE CELABRACION: Barcelona, Spain (1/97) AÑO: 1997

§ TIPO DE PARTICIPACION: Comité Organizador (Local Arrangements and Registration Chair) CONGRESO: 25th International Symposium on Computer Architecture (ISCA’98) LUGAR DE CELABRACION: Barcelona, Spain (6/98) AÑO: 1998

§ TIPO DE PARTICIPACION: Comité de Programa y Comité Organizador (Publicity Chair)

CONGRESO: 13th International Conference on Supercomputing (ICS'99) LUGAR DE CELABRACION: Rhodes, Greece (6/99) AÑO: 1999

§ TIPO DE PARTICIPACION: Presidencia de Sesión

CONGRESO: 29th Annual International Conference on Parallel Processing (ICPP’99) LUGAR DE CELABRACION: Aizu, Japan (9/99) AÑO: 1999

§ TIPO DE PARTICIPACION: Comité Organizador (Publicity Chair)

CONGRESO: 14th International Conference on Supercomputing (ICS'00) LUGAR DE CELABRACION: Santa Fe, New Mexico (5/2000) AÑO: 2000

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: 30th Annual International Conference on Parallel Processing (ICPP’00) LUGAR DE CELABRACION: Toronto, Canada (8/2000) AÑO: 2000


CONGRESO: 4th International Symposium on High-Performance Computing (ISHPC2K) LUGAR DE CELABRACION: Tokyo, Japan (10/2000) AÑO: 2000

§ TIPO DE PARTICIPACION: Comité Organizador (Program Chair)

CONGRESO: Workshop on OpenMP: Experiences and Implementations (WOMPEI part of ISHPC2K) LUGAR DE CELABRACION: Tokyo, Japan (10/2000) AÑO: 2000

§ TIPO DE PARTICIPACION: Comité de Programa y Comité Organizador (Publicity Chair)

CONGRESO: 7th International Conference on High-Performance Computing (HiPC’00) LUGAR DE CELABRACION: Bangalore, India (12/2000) AÑO: 2000

§ TIPO DE PARTICIPACION: Comité de Programa, Presidencia de Keynote y Participación en

Panel Session. CONGRESO: 2nd European Workshop on OpenMP (EWOMP’00) LUGAR DE CELABRACION: Univ. of Edimburgh, Scotland - UK (9/2000) AÑO: 2000

§ TIPO DE PARTICIPACION: Comité de Programa

CONGRESO: Compilers and Operating Systems for Low Power (PACT’00) LUGAR DE CELABRACION: Philadelphia (PA), (10/2000) AÑO: 2000

§ TIPO DE PARTICIPACION: Comité Organizador (Publicity Chair)

CONGRESO: 15th International Conference on Supercomputing (ICS'01) LUGAR DE CELABRACION: Sorrento, Italy (5/2000) AÑO: 2001

§ TIPO DE PARTICIPACION: Program Vice-chair

CONGRESO: EUROPAR’01 (Instruction-level Parallelism and Architecture Track) LUGAR DE CELABRACION: Manchester, UK (8/2001) AÑO: 2001

§ TIPO DE PARTICIPACION: Comité Organizador (Program Committee Web Master Chair) y

Presidencia de Sesión CONGRESO: 30th Annual International Conference on Parallel Processing (ICPP’01) LUGAR DE CELABRACION: Valencia, Spain (9/2001) AÑO: 2001

§ TIPO DE PARTICIPACION: Comité Organizador (Local Arrangements Co-chair y Conference

Web Master) CONGRESO: 10 th Parallel Architectures and Compilation Techniques (PACT’01) LUGAR DE CELABRACION: Barcelona, Spain (9/2001) AÑO: 2001

§ TIPO DE PARTICIPACION: General Chair

CONGRESO: 3rd European Workshop on OpenMP (EWOMP’01) LUGAR DE CELABRACION: Barcelona, Spain (9/2001) AÑO: 2001

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: Workshop on Compilers and Operating Systems for Low Power (COLP’01) LUGAR DE CELABRACION: Barcelona, Spain (9/2001) AÑO: 2001

§ TIPO DE PARTICIPACION: Program Chair

CONGRESO: 2nd Workshop on OpenMP: Experiences and Implementations (WOMPEI’02 part of ISHPC-02) LUGAR DE CELABRACION: Kyoto, Japan (5/2002) AÑO: 2002

§ TIPO DE PARTICIPACION: Comité Organizador (Publicity Co-chair) y Comité de Programa

CONGRESO: 16th International Conference on Supercomputing (ICS’02) LUGAR DE CELABRACION: NY, USA (6/2002) AÑO: 2002

§ TIPO DE PARTICIPACION: Comité Organizador (Publicity Co-chair) y Comité de Programa

CONGRESO: 31st Annual International Conference on Parallel Processing (ICPP’02) LUGAR DE CELABRACION: Vancouver, Canada (8/2002) AÑO: 2002

§ TIPO DE PARTICIPACION: Comité Organizador (Program Vice-chair)

CONGRESO: EUROPAR’02 (Compilers for High-Performance / Compilation and Parallelization Techniques - Track) LUGAR DE CELABRACION: Paderborn, Germany (8/2002) AÑO: 2002


CONGRESO: 11 th Parallel Architectures and Compilation Techniques (PACT’02) LUGAR DE CELABRACION: Virginia, USA (9/2002) AÑO: 2002


CONGRESO: Second Workshop on Caching, Coherence, and Consistency (WC3’02), part of PACT’02 LUGAR DE CELABRACION: Virginia, USA (9/2002) AÑO: 2002

§ TIPO DE PARTICIPACION: Organizador y Chair de Panel Session

CONGRESO: Fourth European Workshop on OpenMP (EWOMP 2002). LUGAR DE CELEBRACION: Rome, Italy (18-20/9/2002) AÑO: 2002.


CONGRESO: 2003 International Parallel and Distributed Processing Symposium (IPDPS). LUGAR DE CELEBRACION: Nice, France (22-26/4/2003) AÑO: 2003


CONGRESO: 8th International Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS’2003), in conjunction with International Parallel and Distributed Processing Symposium (IPDPS-2003). LUGAR DE CELEBRACION: Nice, France (22/4/2003) AÑO: 2003

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: WOMPAT 2003: Workshop on OpenMP Applications and Tools. LUGAR DE CELEBRACION: Toronto, Canada (26-27/6/2003) AÑO: 2003


CONGRESO: First International Workshop on Heterogeneous and Adaptive Computing - "Challenges of Large Applications in Distributed Environments" (CLADE 2003), in conjunction with 12th IEEE International Symposium on High Performance Distributed Computing (HPDC-12). LUGAR DE CELEBRACION: Seattle, Washington, USA (21/6/2003) AÑO: 2003


CONGRESO: Fifth European Workshop on OpenMP (EWOMP 2003). LUGAR DE CELEBRACION: Aachen, Germany (22-26/9/2003) AÑO: 2003

§ TIPO DE PARTICIPACION: Program Vice-chair del track “Compilers and Languages”

CONGRESO: 32nd Annual International Conference on Parallel Processing (ICPP’03) LUGAR DE CELABRACION: Kaohsiung, Taiwan (6-9/10/2003) AÑO: 2003

§ TIPO DE PARTICIPACION: General Co-Chair

CONGRESO: 3rd Workshop on OpenMP: Experiences and Implementations (WOMPEI’03 part of ISHPC-V) LUGAR DE CELABRACION: Tokyo, Japan (20-22/10/2003) AÑO: 2003


CONGRESO: 9th International Workshop on High-Level Parallel Programming Models and Supportive Environments (HIPS’2004), in conjunction with International Parallel and Distributed Processing Symposium (IPDPS-2004). LUGAR DE CELEBRACION: Santa Fe, USA (26/4/2004) AÑO: 2004


CONGRESO: WOMPAT 2004: Workshop on OpenMP Applications and Tools. LUGAR DE CELEBRACION: Houston, USA. (6/2004) AÑO: 2004


CONGRESO: Second International Workshop on Heterogeneous and Adaptive Computing - "Challenges of Large Applications in Distributed Environments" (CLADE 2004), in conjunction with 13th IEEE International Symposium on High Performance Distributed Computing (HPDC-12). LUGAR DE CELEBRACION: Honolulu, Hawai (7/6/2004) AÑO: 2004

§ TIPO DE PARTICIPACION: Comité Organizador (Publicity co-chair) y Comité de Programa

CONGRESO: 33rd Annual International Conference on Parallel Processing (ICPP’04) LUGAR DE CELABRACION: Montreal, Canada (15-18/8/2004) AÑO: 2004


CONGRESO: 13 rd Parallel Architectures and Compilation Techniques (PACT’04) LUGAR DE CELABRACION: Antibes Juan-les-Pins, France (29/9-3/10/2004) AÑO: 2004

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: 15 th International Conference on Application-specific Systems, Architectures and Processors (ASAP’04) LUGAR DE CELABRACION: Galveston TX, USA (27-29/9/2004) AÑO: 2004


CONGRESO: EWOMP 2004: European Workshop on OpenMP. LUGAR DE CELEBRACION: Stockholm, Sweden (18-22/10/2004) AÑO: 2004


CONGRESO: 3rd Workshop on OpenMP: Experiences and Implementations (WOMPEI’05) LUGAR DE CELABRACION: Tsukuba, Japan (20-21/1/2005) AÑO: 2005

§ TIPO DE PARTICIPACION: Program Vice-Chair del track “Compilers and Languages”

CONGRESO: 34 th Annual International Conference on Parallel Processing (ICPP’05) LUGAR DE CELABRACION: Oslo, Norway (14-17/6/2005) AÑO: 2005


CONGRESO: 1st International Workshop on OpenMP (IWOMP-2005) LUGAR DE CELABRACION: Oregon, USA (1-4/6/2005) AÑO: 2005


CONGRESO: 10th IEEE Symposium on Computers and Communications (ISCC’05) LUGAR DE CELABRACION: Cartagena, Spain (27-30/6/2005) AÑO: 2005

§ TIPO DE PARTICIPACION: Publicity co-Chair

CONGRESO: 14 th Parallel Architectures and Compilation Techniques (PACT’05) LUGAR DE CELABRACION: Saint Louis, Missouri (17-21/9/2005) AÑO: 2005


CONGRESO: The 2005 International Conference on High-Performance Computing and Communications (HPCC-2005) LUGAR DE CELABRACION: Sorrento, Naples (Italy) (21-24/9/2005) AÑO: 2005

§ TIPO DE PARTICIPACION: General/Program co-Chair

CONGRESO: 18th International Workshop on Languages and Compilers for Parallel Computing. (LCPC-2005) LUGAR DE CELABRACION: New Orleans, Louisiana (20-22/10/2005) AÑO: 2005


CONGRESO: 10th Asia-Pacific Computer Systems Architecture Conference (ACSAC05) LUGAR DE CELABRACION: Singapore (24-16/10/2005) AÑO: 2005


CONGRESO: 3rd Int. Symposium on Parallel and Distributed Processing and Applications (ISPA’05) LUGAR DE CELABRACION: Nanjing , China , (2-5/11/2005) AÑO: 2005

§ TIPO DE PARTICIPACION: Local Arrangements Chair y Comité de Programa CONGRESO: 38th International Symposium on Microarchitecture (MICRO-38) LUGAR DE CELABRACION: Barcelona, Spain (12-16/11/2005) AÑO: 2005

§ TIPO DE PARTICIPACION: Local Arrangements Chair y Comité de Programa

CONGRESO: 2005 International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2005) LUGAR DE CELABRACION: Barcelona, Spain (17-18/11/2005) AÑO: 2005


CONGRESO: 14th Euromicro Conference on Parallel, Distributed and Network-based Processing (PDP2006) LUGAR DE CELABRACION: Montbeliard-Sochaux, France (15-17/2/2006) AÑO: 2006


CONGRESO: 20th IEEE International Parallel & Distributed Processing Symposium (IPDPS 2006) LUGAR DE CELABRACION: Rhodes, Greece (25-29/4/2006) AÑO: 2006


CONGRESO: 2nd International Workshop on OpenMP (IWOMP-2006) LUGAR DE CELABRACION: Reims, France (12-15/6/2006) AÑO: 2006


CONGRESO: The 20th ACM International Conference on Supercomputing (ICS 2006) LUGAR DE CELABRACION: Queensland, Australia (28/6 – 1/7/2006) AÑO: 2006

§ TIPO DE PARTICIPACION: Issue Global Chair

CONGRESO: Issue 7: Parallel Computer Architecture and ILP. Euro-Par 2006 European Conference on Parallel Computing LUGAR DE CELABRACION: Dresden, Germany (29/8 – 1/9/2006) AÑO: 2006


CONGRESO: The 2006 International Conference on High Performance Computing and Communications (HPCC 2006) LUGAR DE CELABRACION: Munich, Germany (13-15/9/2006) AÑO: 2006


CONGRESO: Workshop on Programming Models for Ubiquitous Parallelism (in conjunction with PACT’06) LUGAR DE CELABRACION: Seattle, Washington (16/9/2006) AÑO: 2006

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: CASCON 2006: Dublin Symposium, In association with the 16th Annual International Conference on Computer Science and Software Engineering LUGAR DE CELABRACION: Dublin, Ireland (16-17/10/2006) AÑO: 2006


CONGRESO: 19th International Workshop on Languages and Compilers for Parallel Computing (LCPC 2006) LUGAR DE CELABRACION: New Orleans, Louisiana (USA) (2-4/11/2006) AÑO: 2006


CONGRESO: 13th IEEE International Conference on High Performance Computing (HiPC 2006) LUGAR DE CELABRACION: Bangalore, India (18-21/12/2006) AÑO: 2006


CONGRESO: 15th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2007) LUGAR DE CELABRACION: Naples, Italy (7-9/2/2007) AÑO: 2007


CONGRESO: ACM SIGPLAN Symposium on Porinciples and Practice of Parallel Programming (PPoPP’07) LUGAR DE CELABRACION: San Jose (CA), USA (14-17/3/2007) AÑO: 2007

§ TIPO DE PARTICIPACION: Publications Co-Chair y Comité de Programa

CONGRESO: 3rd International Workshop on OpenMP (IWOMP-2007) LUGAR DE CELABRACION: Beiging, China (3-7/6/2007) AÑO: 2007

§ TIPO DE PARTICIPACION: Program Co-chair

CONGRESO: 21st ACM International Conference on Supercomputing (ICS’07) LUGAR DE CELABRACION: Seattle area, USA (7/2007) AÑO: 2007


CONGRESO: 20th International Workshop on Languages and Compilers for Parallel Computing (LCPC 2007) LUGAR DE CELABRACION: University of Illinois at Urbana-Champaign, Chicago (USA) (11-13/10/2007) AÑO: 2007


CONGRESO: MULTIPROG-2008 – First Workshop on Programmability Issues for Multi-Core Computers. Held in conjunction with the 3rd International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC) LUGAR DE CELABRACION: Goteborg, Sweden (1/2008) AÑO: 2008


CONGRESO: CC 2008 – International Conference on Compiler Construction LUGAR DE CELABRACION: Budapest. Hungary (4/2008) AÑO: 2008

§ TIPO DE PARTICIPACION: Publications Co-Chair y Comité de Programa CONGRESO: 4th International Workshop on OpenMP (IWOMP-2008) LUGAR DE CELABRACION: Purdue University, West Lafayette, IN (USA) (12-14/5/2008) AÑO: 2008

§ TIPO DE PARTICIPACION: Workshops and Tutorials Chair

CONGRESO: 22nd ACM International Conference on Supercomputing (ICS’08) LUGAR DE CELABRACION: Island of Kos, Greece (7-12/6/2008) AÑO: 2008

§ TIPO DE PARTICIPACION: Organizing Committee

CONGRESO: BMW-2008 – 1st Barcelona Multicore Workshop LUGAR DE CELABRACION: Barcelona, Spain (5-6/6/2008) AÑO: 2008

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: 21st International Workshop on Languages and Compilers for Parallel Computing (LCPC 2008) LUGAR DE CELABRACION: Edmonton, Alberta (Canada) (31/7-2/8/2008) AÑO: 2008

§ TIPO DE PARTICIPACION: Comité de Programa (Compilers and Languages Track)

CONGRESO: ICPP 2008 – International Conference on Parallel Processing LUGAR DE CELABRACION: Portland (OR), USA (8-12/9/2008) AÑO: 2008


CONGRESO: MULTIPROG-2009 –Second Workshop on Programmability Issues for Multi-Core Computers. Held in conjunction with the 4th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2009) LUGAR DE CELABRACION: Paphos, Cyprus, (25-28/1/2009) AÑO: 2009

§ TIPO DE PARTICIPACION: Comité de Programa CONGRESO: HiPEAC 2009 – The 4th International Conference on High Performance and Embedded Architectures and LUGAR DE CELABRACION: Paphos, Cyprus, (25-28/1/2009) AÑO: 2009


CONGRESO: 5th International Workshop on OpenMP (IWOMP-2009) LUGAR DE CELABRACION: Technische Universität Dresden (Germany) (3-5/6/2009) AÑO: 2009

§ TIPO DE PARTICIPACION: Program Committee and Web/Submissions Chair

CONGRESO: 23rd ACM International Conference on Supercomputing (ICS’09) LUGAR DE CELABRACION: Yorktown Heights, NY, USA (8-12/6/2009) AÑO: 2009

§ TIPO DE PARTICIPACION: “Multicore and Manycore Programming” Topic Vice-chair

CONGRESO: EuroPar 2009 LUGAR DE CELABRACION: Delft (The Netherlands) (25-28/8/2009) AÑO: 2009

§ TIPO DE PARTICIPACION: Program Committee CONGRESO: Workshop on Parallel Programming on Accelerator Clusters (PPAC), held in conjunction with IEEE Cluster 2009 LUGAR DE CELABRACION: New Orleans, LA (USA) (31/8/2009) AÑO: 2009


CONGRESO: 22nd International Workshop on Languages and Compilers for Parallel Computing (LCPC 2009) LUGAR DE CELABRACION: University of Delaware, Newark, Delaware (USA) (8-10/10/2009) AÑO: 2009


CONGRESO: International Conference on Parallel and Distributed Systems (ICPADS'09) LUGAR DE CELABRACION: Shenzhen, China (9-11/12/2009) AÑO: 2009

§ TIPO DE PARTICIPACION: Comité Organizador CONGRESO: MULTIPROG-2010 – Third Workshop on Programmability Issues for Multi-Core Computers. Held in conjunction with the 5th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2010) LUGAR DE CELABRACION: Pisa, Italy, (24/1/2010) AÑO: 2010


CONGRESO: 6th International Workshop on OpenMP (IWOMP-2010) LUGAR DE CELABRACION: U. of Tsukuba, (14-16/6/2010) AÑO: 2010

§ TIPO DE PARTICIPACION: Program Committee and Web/Submissions Chair

CONGRESO: 24th ACM International Conference on Supercomputing (ICS’10) LUGAR DE CELABRACION: Tsukuba, Japan (1-4/6/2010) AÑO: 2010

§ TIPO DE PARTICIPACION: Program Committee

CONGRESO: Workshop on Parallel Programming and Applications on Accelerator Clusters (PPAAC), held in conjunction with IEEE Cluster 2010 LUGAR DE CELABRACION: Heraklion (Crete), Greece (20/9/2010) AÑO: 2010

§ TIPO DE PARTICIPACION: Scientific Committee and Local Organizer

CONGRESO: BMW-2010 – 2nd Barcelona Multicore Workshop LUGAR DE CELABRACION: Barcelona, Spain (21-22/10/2010) AÑO: 2010


CONGRESO: HiPC 2010 – High Performance Computing Conference LUGAR DE CELABRACION: Goa, India (19-22/12/2010) AÑO: 2010

§ TIPO DE PARTICIPACION: Workshops and Tutorials Co-chair CONGRESO: HiPEAC 2011 – 6th International Conference on High-Performance Embedded Architectures and Compilers LUGAR DE CELABRACION: Heraklion (Crete), Greece (22-26/1/2011) AÑO: 2011

§ TIPO DE PARTICIPACION: Comité Organizador CONGRESO: MULTIPROG-2011 – Fourth Workshop on Programmability Issues for Multi-Core Computers. Held in conjunction with the 6th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2011) LUGAR DE CELABRACION: Heraklion (Crete), Greece (23/1/2011) AÑO: 2011


CONGRESO: 7th International Workshop on OpenMP (IWOMP-2011) LUGAR DE CELABRACION: Chigaco (USA) (13-15/6/2011) AÑO: 2011

§ TIPO DE PARTICIPACION: Topic Vice-chair

CONGRESO: Euro-Par 2011. Topic 11: Multicore and Manycore Programming LUGAR DE CELABRACION: Bordeaux (France) (29/8/2011-2/9/2011) AÑO: 2011


CONGRESO: Workshop on Parallel Programming on Accelerator Clusters (PPAC), held in conjunction with IEEE Cluster 2011 LUGAR DE CELABRACION: Austin, Texas (USA) (26/9/2011) AÑO: 2011


CONGRESO: ICPADS 2011: 17th IEEE International Conference on Parallel and Distributed Systems, "Multicore Computing and Parallel/Distributed Architecture" track LUGAR DE CELABRACION: Tainan, Taiwan (7-9/12/2011) AÑO: 2011


CONGRESO: HiPC 2011: 18th International Conference on High Performance Computing LUGAR DE CELABRACION: Bangalore, India (19-22/12/2011) AÑO: 2011


CONGRESO: MULTIPROG-2012 – Fifth Workshop on Programmability Issues for Multi-Core Computers. Held in conjunction with the 7th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2012) LUGAR DE CELABRACION: Paris, France, (23/1/2012) AÑO: 2012

§ TIPO DE: “Multicore and Manycore Programming” Topic Vice-chair

CONGRESO: EuroPar 2012 – International European Conference on Parallel and Distributed Computing LUGAR DE CELABRACION: Rhodes Island, Greece (27-31/8/ 2012) AÑO: 2012


CONGRESO: IWOMP-2012 – 8th International Workshop on OpenMP LUGAR DE CELABRACION: Rome, Italy (11-13/6/2012) AÑO: 2012

§ TIPO DE PARTICIPACION: Program committee

CONGRESO: ICS 2012 - International Conference on Supercomputing LUGAR DE CELABRACION: Venice, Italy (25-29/6/2012) AÑO: 2012

§ TIPO DE PARTICIPACION: Comité Organizador CONGRESO: MULTIPROG-2013 –Sixth Workshop on Programmability Issues for Multi-Core Computers. Held in conjunction with the 8th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2013) LUGAR DE CELABRACION: Berlin, Germany, (21/1/2013) AÑO: 2013


CONGRESO: IPDPS’13 – 27th IEEE International Parallel & Distributed Processing Symposium LUGAR DE CELABRACION: Boston, Massachusetts USA. 20-24/5/2013 AÑO: 2013


CONGRESO: MULTIPROG-2014 – Seventh Workshop on Programmability Issues for Multi-Core Computers. Held in conjunction with the 9th International Conference on High-Performance Embedded Architectures and Compilers (HiPEAC 2014) LUGAR DE CELABRACION: Vienna (Austria), Greece (22/1/2014) AÑO: 2014

§ TIPO DE PARTICIPACION: Extended Review Committee CONGRESO: 28th International Conference on Supercomputing (ICS-2014) LUGAR DE CELABRACION: Munich, Germany. 10-13/6/2014 AÑO: 2014

§ TIPO DE PARTICIPACION: Doctoral Dissertation Colloquium Co-Chairs CONGRESO: The International Conference on High Performance Computing & Simulation (HPCS 2014) LUGAR DE CELABRACION: Bolonia, Italy. 21-25/7/2014 AÑO: 2014

§ TIPO DE PARTICIPACION: Program Committee CONGRESO: 10th International Workshop on OpenMP (IWOMP-2014) LUGAR DE CELABRACION: Salvador Bahia, Brazil, 28-30/7/2014 AÑO: 2014


CONGRESO: 11th International Workshop on OpenMP (IWOMP-2015) LUGAR DE CELABRACION: Aachen, Germany (1-2/10/2014) AÑO: 2015

§ TIPO DE: Comité de Programa del Topic “High Performance Architectures and Compilers” CONGRESO: EuroPar 2016 – International European Conference on Parallel and Distributed Computing LUGAR DE CELABRACION: Grenoble, France (24-26/8/ 2016) AÑO: 2016

§ TIPO DE PARTICIPACION: Comité de Programa (Programming Models & Languages Track)

CONGRESO: ICPP 2016 – International Conference on Parallel Processing LUGAR DE CELABRACION: Philadelphia, PA (16-19/8/2016) AÑO: 2016


CONGRESO: The International Symposium on Memory Systems (MEMSYS EU and US - 2017) LUGAR DE CELABRACION: Frankfurt, Germany (21-23/6/2017). Washington DC, USA (2-5/10/2017) AÑO: 2017

§ TIPO DE PARTICIPACION: Program Committee CONGRESO: 13nd International Workshop on OpenMP (IWOMP-2017) LUGAR DE CELABRACION: Stony Brook, NY, USA (21-22/9/2017) AÑO: 2017

§ TIPO DE PARTICIPACION: Special session organizer (Doctoral Dissertation Colloquium) CONGRESO: 15th International Conference on High Performance Computing & Simulation (HPCS 2017) LUGAR DE CELABRACION: Genoa, Italy. (17-21/7/2017) AÑO: 2017

§ TIPO DE PARTICIPACION: Conference Track Chair (Software Track) CONGRESO: International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2017) LUGAR DE CELABRACION: Campinas, Brazil (17-20/10/2017) AÑO: 2017

Experiencia de gestión de I+D Gestión de programas, planes y acciones de I+D

Título: Director asociado Departamento de Computer Sciences. Barcelona Supercomputing Center (BSC) Tipo de actividad: Gestion I+D en el departamento de ciencias de la computación Fecha: Desde abril de 2005

Trabajos Final de Carrera o Grado y Tesis de Máster dirigidos § TITULO: Tarificador telefònic de trucades

ESTUDIANTE: Maria Teresa Pages Claus TITULACIÓN: Enginyeria en Informàtica (1991) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: April 2001

§ TITULO: Tècniques d'execució d'aplicacions paral·leles en la IBM SP ESTUDIANTE: Xavier Perez Serret TITULACIÓN: Enginyeria en Informàtica (1991) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: May 2002

§ TITULO: Compilador i runtime per a l'execució distribuïda i concurrent de codi Java ESTUDIANTE: Sergio Baila Martínez TITULACIÓN: Enginyeria en Informàtica (1991) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: July 2002

§ TITULO: Extending and Profiling Software Transactional Memory in Haskell ESTUDIANTE: Nehir Sonmez TITULACIÓN: Màster en Arquitectura de Computadors, Xarxes i Sistemes (2006) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: September 2008

§ TITULO: The software caching techniques for The Cell BE Arquitecture ESTUDIANTE: Nikola Vujic TITULACIÓN: Màster en Arquitectura de Computadors, Xarxes i Sistemes (2006) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: February 2009

§ TITULO: Parallelizing Complex Serial Application Using Software Transactional Memory ESTUDIANTE: Vladimir Gajinov TITULACIÓN: Màster en Arquitectura de Computadors, Xarxes i Sistemes (2006) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: September 2009

§ TITULO: A Programming Model for Hierarchical Platforms ESTUDIANTE: Judit Planas Carbonell TITULACIÓN: Màster en Arquitectura de Computadors, Xarxes i Sistemes (2006) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: February 2010

§ TITULO: Evaluación de un algoritmo de compresión de datos en arquitectura Cell ESTUDIANTE: Alberto García Fernández TITULACIÓN: Enginyeria de Telecomunicació (2003) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Escola Superior d'Enginyers de Telecomunicació de Barcelona (ETSETB) MES/AÑO: May 2010

§ TITULO: Incorporación de micro-threads al entorno MARS del Cell/B.E. ESTUDIANTE: José David Perez Garcia TITULACIÓN: Enginyeria en Informàtica (2003) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: February 2011

§ TITULO: Decision Support DBMS Acceleration Using Vector Processors ESTUDIANTE: Timothy Hayes TITULACIÓN: Màster en Tecnologies de la Informació UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: September 2011

§ TITULO: Gasnet library evaluation on Barrelfish and Intel SCC ESTUDIANTE: Zeus Gómez Marmolejo TITULACIÓN: Màster en Arquitectura de Computadors, Xarxes i Sistemes UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: July 2012

§ TITULO: Domain Specific Languages for High Performance Computing ESTUDIANTE: Alejandro Fernández Suárez TITULACIÓN: Grau en Enginyeria en Informàtica (Computació) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: June 2013

§ TITULO: Analysis, Developments and Optimizations on the NMMB/BSC Model ESTUDIANTE: Kim Serradell Maronda TITULACIÓN: Màster en Tecnologies de la Informació UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: March 2014

§ TITULO: Code Generation for the OpenMP 4.0 Accelerator Model onto OmpSs ESTUDIANTE: Guray Ozen TITULACIÓN: Master in Innovation and Research in Informatics UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: September 2014

§ TITULO: Extending OmpSs to support dynamic programming ESTUDIANTE: Marcos Maroñas Bravo TITULACIÓN: Grau en Enginyeria en Informàtica (Enginyeria de Computadors) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: January 2015

§ TITULO: Runtime per task offloading en l'arquitectura Adapteva Parallella ESTUDIANTE: Marcos del Amo Jiménez TITULACIÓN: Grau en Enginyeria en Informàtica (Enginyeria de Computadors) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: May 2015

§ TITULO: Una nueva implementación de Tareador basada en LLVM ESTUDIANTE: Alejandro Velasco Jiménez TITULACIÓN: Enginyeria en Informàtica (2003) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: June 2015

§ TITULO: SAIPH: A language for solving PDEs in HPC systems ESTUDIANTE: Alejandro Fernández Suarez TITULACIÓN: Master in Innovation and Research in Informatics UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: July 2015

§ TITULO: A DSL for Trace Analysis ESTUDIANTE: Beatriz Aguilar Gallo TITULACIÓN: Master in Innovation and Research in Informatics UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: October 2015

§ TITULO: Simulador d'aplicacions OpenMP basat en Dimemas ESTUDIANTE: Daniel Agoiz Badia TITULACIÓN: Grau en Enginyeria en Informàtica (Enginyeria de Computadors) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: January 2016

§ TITULO: Skaere, A Framework for Building Application-aware Runtime Systems ESTUDIANTE: Arturo San Emeterio Campos TITULACIÓN: Master in Innovation and Research in Informatics UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: February 2016

§ TITULO: Performance Characterization of In-memory Data Analytics on a Scale-up Server ESTUDIANTE: Ahsan Javed Awan TITULACIÓN: Licenciate Thesis in Information and Communication Technology UNIVERSIDAD: KTH Royal Institute of Technology FACULTAD/ESCUELA: School of Information and Communication Technology MES/AÑO: May 2016

§ TITULO: Porting the OmpSs programming model to the Argobots runtime system ESTUDIANTE: Kevin Sala Penadès TITULACIÓN: Grau en Enginyeria en Informàtica (Enginyeria de Computadors) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: June 2016

§ TITULO: Evaluation of Low-power Architectures in a Scientific Computing Environment ESTUDIANTE: Constantino Gomez Crespo TITULACIÓN: Master in Innovation and Research in Informatics UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: July 2016

§ TITULO: Extending OmpSs programming model with task reductions: A compiler and runtime approach ESTUDIANTE: Ferrán Pallarès Roca TITULACIÓN: Grau en Enginyeria en Informàtica (Enginyeria de Computadors) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: January 2017

§ TITULO: Extending the Nanos6 Runtime with a Lightweight Profiling Infrastructure ESTUDIANTE: Antoni Navarro Muñoz TITULACIÓN: Grau en Enginyeria en Informàtica (Enginyeria de Computadors) UNIVERSIDAD: Universitat Politècnica de Catalunya (UPC) FACULTAD/ESCUELA: Facultat d'Informàtica de Barcelons (FIB) MES/AÑO: January 2017

Otros méritos o aclaraciones que se desee hacer constar (utilice únicamente el espacio equivalente a una página).

§ Beca de Telefónica a jornada completa durante el curso académico 1985-86 para la realización

del Proyecto Fin de Carrera "Diseño e Implementación de un Sistema Multiprocesador con Buses Multiplexados".

§ Tesis doctoral: Paralelización de Recurrencias en Programas Secuenciales Numéricos.

Universitat Politècnica de Catalunya. ISBN: 84-689-1738-9. Versión electrónica: http://www.tdx.cesca.es/TDX-0207105-094858.

§ Premio Extraordinario de Doctorado “Doctor en Informática 1989”, otorgado por la Universitat Politècnica de Catalunya (23/9/92).

§ Responsable de las peticiones de ayuda para la organización del congreso ICS’95: “Programa

Sectorial de Promoción del Conocimiento” (Ministerio de Educación y Ciencia) por un valor de 900.000 Ptas, “Accions Mobilitzadores” (CIRIT-1994) por un valor de 200.000 Ptas y “Accions Mobilitzadores” (CIRIT-1995) por un valor de 550.000 Ptas.

§ Responsable de las peticiones de ayuda para la organización del congreso ISCA’98: “Acciones

Especiales TIC” (Ministerio de Educación y Ciencia, 1998) por un valor de 1.500.000 Ptas y “Accions Mobilitzadores 1998ARCS” (CIRIT-1998) por un valor de 300.000 Ptas.

§ Responsable de las peticiones de ayuda para la organización del congreso PACT’2001 y

EWOMP’2001: “Acciones Especiales TIC” (Ministerio de Educación y Cultura, TIC2000-2884-E) por un valor de 1.400.000 Ptas. y “Ajuts per a l’Organització de Congresos i Reunions de la UPC, 2000-CO0024) per un valor de 300.000 Ptas.

§ Referee habitual de articulos en revistas internacionales (IEEE Transactions on Computers, IEEE

Transactions on Parallel and Distributed Processing, IEEE Micro, Journal of Parallel and Distributed Computing, Journal of Programming Languages, Scientific Programming, Parallel Processing Letters, Concurrency and Computation: Practise and Experience, International Journal of Parallel Programming, etc.).

§ Member of the Editorial Board. International Journal of Computational Science and Engineering.

InderScience Publishers. Since 2005. § Member of the Editorial Board. International Journal of Parallel Programming. Springer. Since

2006. § Referee de ponencias en congresos internacionales (ACM Int. Symposium on Computer

Architecture ISCA, IEEE/ACM International Symposium on Microarchitecture MICRO, ACM Int. Conference on Supercomputing ICS, IEEE High-Performance Computer Architecture HPCA, IEEE Symposium on Parallel and Distributed Processing SPDP, International Workshop on Massive Parallelism, CONPAR, PARLE, EURO-PAR, International Conference on Parallel Processing ICPP, IEEE International Parallel and Distributed Processing Sysmposium IPDPS, etc.).

§ Responsable de Formación del C4 (Centre de Computació i Comunicacions de Catalunya), desde

su creación en enero de 1996 hasta diciembre 1997. § Responsable de Tercer Ciclo y Programa de Doctorado del Departament d’Arquitectura de

Computadors de la Universitat Politècnica de Catalunya, desde octubre de 1997 hasta septiembre de 1999 y desde febrero de 2003 hasta abril del 2005.

§ Subdirector del Departament d’Arquitectura de Computadors de la Universitat Politècnica de

Catalunya, desde mayo de 2005 hasta junio de 2006.

§ Miembro de la Comisión de Tercer Ciclo de la Universitat Politècnica de Catalunya, desde septiembre de 2000 hasta septiembre de 2004.

§ Dirección de más de 12 Proyectos Fin de Carrera (PFC) en las titulaciones de Ingeniería de

Telecomunicaciones de Barcelona (ETSETB) e Ingeniería en Informática de Barcelona (FIB). § (Co)Director de las tesis doctorales que actualmente están realizando: Vladimir Gajinov y Judit

Planas. § Merecedor de un IBM Faculty Partnership Award para los años 2001, 2003 y 2004, con un

importe de $40.000 cada uno. § Miembro del Board of Directors de cOMPunity, Inc. (The Community of OpenMP Users,

Researchers, Tool Developers and Providers), desde Noviembre 2001. Representante de cOMPunity en el Futures committee del OpenMP ARB (Architecture Review Board), desde Septiembre 2001.

§ Miembro del Board of Managers y Project Manager and Researcher del CEPBA-IBM Research

Institute (Barcelona), desde noviembre de 2000 hasta diciembre 2004. § Miembro del SUSP (Scientific Users' Selection Panel) del programa de mobilidad (Transnational

Access) del proyecto HPC-Europa (Pan-European Research Infrastructure on High Performance Computing), desde 2004.

§ Director asociado del Departamento de Computer Sciences del Barcelona Supercomputing

Center (BSC), desde abril del 2005. § Ponencias en el HPC Educators Program del International Conference for High-performance

Computing, Networking, Storage and Analysis (SC): Exploring Parallelization Strategies at Undergraduate Level, Denver, CO (USA). November 2013, (http://pm.bsc.es/SC13_HPCEducators) y Unveiling Parallelization Strategies at the Undergraduate Level, Salt Lake City (USA). November 2012 (http://pm.bsc.es/SC12_training_session).

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