Under the guidance of:Dr. MANISH GOSWAMIMicroelectronics Division,IIIT Allahabad

Presented By:Shobhit SinghM.Tech (MI)(IMI2012007)

DESIGN AND POST LAYOUT VERIFICATION OF CURRENT CONVEYOR

(CC-II) AND ITS APPLICATION IN UNIVERSAL FILTER

OUTLINE Introduction Advantage of CC-II over operational amplifier Component implementation of proposed work Implementation and Analysis of CC-II Layout RC Extraction Parasitic Report References

INTRODUCTION Analog Filter is an important building block, widely

used for continuous time signal processing.

The current mode technique is well suited for low voltage design.

Advantages of current mode technique such as larger dynamic range, higher bandwidth, greater linearity, simpler circuitry and lower power consumption.

ADVANTAGE OF CURRENT CONVEYOR OVER OPERATIONAL AMPLIFIER

It overcomes the limitation of constant gain bandwidth product.

It uses less active component as compare to op-amp, therefore the circuit has low power dissipation.

It is suitable for high frequency application.

Current is not restricted by the power supply voltages so that wider signal dynamic ranges may be possible at low power supply voltages.

CURRENT CONVEYOR (CC-II) Current conveyor is basically a current mode

circuits.

Ref[1] :Giuseppe Ferri and Nicola C. Guerrini , “LOW-VOLTAGE LOW-POWER CMOS CURRENT CONVEYORS”

There are mainly two topology that are used for designing of current conveyor (CC-II):

1-Using Current mirror It has wider bandwidth, but it is not suitable for LV

application(power supply-1.5v) * It is not suitable for LP application.*

2-Using Differential Pair It is suitable for LP and LV application.*

* Giuseppe Ferri and Nicola C. Guerrini ,”LOW-VOLTAGE LOW-POWER CMOS CURRENT CONVEYORS “

COMPONENT IMPLEMENTATION OF PROPOSED ARCHITECTUREProposed work is divided into following block

Implementation of current conveyor (CC-II) Implementation of dual output current

conveyor (DOCC-II) Implementation of universal filter using CC-II

IMPLEMENTATION OF CURRENT CONVEYOR (CC-II)

DC ANALYSIS (BETWEEN VX AND VY)

DC ANALYSIS (BETWEEN IZ AND IX)

AC RESPONSE OF VOLTAGE TRANSFER FUNCTION

Fig.AC Response of z- variation with capacitance C0.

SELECTION OF CAPACITANCE VALUE

Fig.AC Response of z+ variation with capacitance C1.

LAYOUT

Fig. Layout of current conveyor (CC-II)

RC EXTRACTION

Fig. RC Extraction of CC-II.

PARASITIC ESTIMATES

PARASITIC REPORT

IMPLEMENTATION OF UNIVERSAL FILTER

CONFIGURATION FOR OBTAINING FILTER TRANSFER FUNCTION

S. No. Input to be applied on terminal

Grounded terminals

Type of filter

1 v1 v2, v3 LPF2 v2 v1, v3 HPF3 v3 v1, v2 BPF4 v1,v2 v3 BRF/Notch5 v1, v2, v3 - APF

TRANSFER FUNCTIONS OF PROPOSED UNIVERSAL FILTER

From the above table, the denominator is same for all transfer function and it is shown in eq. 1

(1)

Standard equation of second order transfer function is

(2)

From the eq.2 cut-ff frequency and quality factor of the filter.

C0 = 680 pF C1= 220pF R0=R2= 200 Ω R1= 120 Ω

PARAMETERS ACHIEVEDω0 = 2.057 MHz Q = 1.055

DESIGN SPECIFICATION

GAIN RESPONSE OF HIGH PASS FILTER

ADVANTAGES OF THE PROPOSED ARCHITECTURE Improved cut off frequency of Universal Filter. Can be transferred to chip The proposed architecture implemented using

only two DOCCII. Tunability of the relevant filter parameters. Power dissipation is less since the active

component is less in CC-II based circuit.

REFERENCES

[1] G. Ferri and N. Guerrini, Low voltage low power CMOS current conveyors, Kluwer Academic Publisher,Boston,2003.

[2] E.Tlelo-Cuautle, et al. “Design of Current Conveyors and Their Applications in Universal Filters”, IEEE Conference on CCE, pp. 1-6, Oct. 2011.

[3] Guerra-Gomez, E.Tlelo-Cuautle and L.G.Fraga, “Richardson extrapolation-based sensitivity analysis in the multi-objective optimization of analog circuits”, ELSEVIER journal. on Applied Mathematics and Computation, 222 pp 167-176 4, 2013.

[4] E.Tlelo-Cuautle, et al., “Symbolic analysis of (MO)(I)CCI(II)(III)-based analog circuits” IET J. Circuits, Devices & Systems, vol.38, pp 649-659, 2010.

[5] R.Trejo-Guerra et al., “Integrated circuit generating 3- and 5-scroll attractors”, ELSEVIER journal, on Commun Nonlinear Sci Numer Simulat, vol. 17, pp. 4328-4335, 2012.

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