cse - shiraz university1 computer architecture computer science & engineering department shiraz...

CSE - Shiraz University 1

Computer Architecture

Computer Science & Engineering Department

Shiraz University


Boolean Algebra

• Boolean Variables– A = 0, 1

• Boolean Functions– F(A, B) = ?

• F(0,0) = 1• F(0,1) = 1• F(1,0) = 0• F(1,1) = 1

• F(A,B,C,D, …)


Boolean Operators (Special Functions)

– NOT• NOT(0) = 1• NOT(1) = 0

– AND• AND(0,0) = 0 AND 0 = 0• AND(0,1) = 0 AND 1 = 0• AND(1,0) = 1 AND 0 = 0• AND(1,1) = 1 AND 1 = 1


Boolean Operators (Special Functions)

– OR• OR(0,0) = 0 OR 0 = 0• OR(0,1) = 0 OR 1 = 0• OR(1,0) = 1 OR 0 = 0• OR(1,1) = 1 OR 1 = 1

– XOR• XOR(0,0) = 0 XOR 0 = 0• XOR(0,1) = 0 XOR 1 = 0• XOR(1,0) = 1 XOR 0 = 0• XOR(1,1) = 1 XOR 1 = 1


Boolean Algebra

• F(A, B) = ?– F(0,0) = 1– F(0,1) = 1– F(1,0) = 0– F(1,1) = 1

• F(A,B) = (~ B) or (A and B)


Logic Gates

A

BA AND BA NOT A

AA

BBA XOR BA OR B


Example

A

BC

F(A,B,C) = (~A and B) or C

F(A,B,C) = (~A and (B or C)) or ~C

A

B

C


Representing Logical Values

+

_5v

1

0

• 0 ~ 0 v

• 1 ~ +5v


Gates In Circuit

+

_5v

0v+5v

0v+5v

0v+5v


Logic Circuits

A

B

C

D

E

F

f (A,B,C,D,E,F)


Logic Circuits

A

B

C

D

E

F

f1 (A,B,C,D,E,F)

f2 (A,B,C,D,E,F)

f3 (A,B,C,D,E,F)


Example

4 bit Adder

A B

A + B

0 1 0 11 1 0 0

1 0 0 0 1


Example

4 bit Adder / Subtractor

A B

A + B

S10

A - B


4 to 1

MUX

S0

D0

D2

D1

D3

S1

4 bit

2 to 1

MUX

S

Multiplexer

2 to 1

MUX

S

D0

D1


ALU

simple Arithmetic Logic UnitA

Carry out

Carry in

S0

S1

S2

B

Y

S2 S1 S0 Y

0 0 0 A

0 0 1 B

0 1 0 A + B

0 1 1 A - B

S2 S1 S0 Y

1 0 0 -A

1 0 1 ~ A

1 1 0 A and B

1 1 1 A or B


Step by Step Operations

• Adding N numbers (N is Variable)

• Multiplication (of big numbers)

• Division

• Algorithms


Memory

Unit

Sequential Circuits


Latches

Delay Latch

D

C

QQ = D

Hold

Data


Flip-Flops

Delay Latch

D

C

Q

Q D

Clock

Where the data has been stored ?


Step by Step Operations

D

C

Q D

C

Q D

C

QD

C

Q

Clock

1

Speed ?


Registers

D

C

Q D

C

Q D

C

Q D

C

D

C

Q D

C

Q D

C

Q D

C

Clock

Parallel Input

Parallel Output

Load


Registers

8 bit register

Clock

Parallel Input

Parallel Output

Loadclearinc

8

8


Registers

Clock

Parallel Input

Parallel Output

Load

shift

Serial Input

Serial Output

1 0 1 1 0 0 1 0

left/right

Serial Input

Serial Output


4 bit Adder

44

4Cout

R1LD

CLK

CLD

CLK

R2LD

CLK

clock

CLKR3

LD

load

R3 R2 + R1

C Carry


Counter/Timer

Clock

Parallel Output

Load0 0 0 0 0 0 0 0

Increment01


ALU

Example

ACarry in

S0

S1

S2

B

Y

S2 S1 S0 Y

0 0 0 A

0 0 1 B

0 1 0 A + B

0 1 1 A - B

S2 S1 S0 Y

1 0 0 -A

1 0 1 ~ A

1 1 0 A and B

1 1 1 A or B

44

4

Carry out

Sign

overflow

zero


Example

S2 S1 S0 Y

0 0 0 A

0 0 1 B

0 1 0 A + B

0 1 1 A – B

1 0 0 -A

1 0 1 ~ A

1 1 0 A and B

1 1 1 A or B

ALU

A Carry in

S2

S1

S0

B

Y

88

8

Carry out

Sign

overflow

zero

010

0

CFSFOFZF

BLLD

ADD AL, BL

ALLD

1

001

100

101

110

MOV AL, BLNEG ALNOT ALAND AL, BL

Flag Register

1LD


Memory Unit

0

1

2

3

4

5

6

7

1 0 1 0 0 1

1 1 0 0 1 0

1 1 1 0 1 0

1 1 1 1 1 1

1 0 1 0 0 1

0 0 0 0 0 0

0 1 1 0 1 0

1 1 0 0 0 1

0

1

2

3

4

5

6

7

8 x 6 Memory


Read Only Memory

Address

0

1

2

3

4

5

6

7

1 0 1 0 0 1

1 1 0 0 1 0

1 1 1 0 1 0

1 1 1 1 1 1

1 0 1 0 0 1

0 0 0 0 0 0

0 1 1 0 1 0

1 1 0 0 0 1

0

1

2

3

4

5

6

7

A0

A1

A2

D0D5 D4 D3 D2 D1

D0 = F(A0, A1, A2)

0

1

1

00 1 1 0 1

8 x 6 ROM


Random Access Memory

0

1

2

3

4

5

6

7

3

Address

6Output

6Input

Clock

Read

Write

8 8 xx 6 RAM 6 RAM

6Input/Output


General Purpose ComputersGeneral Purpose Computers

• Programming

• Basic Instructions


Computer Instructions

16 bit Instruction

Operation Code

(opcode)


Processor

(CPU)1k x 16

Memory

16 bit Instruction

10

Address

16

Data

10

Address

16

Data

opcode address

RW

RW

10

Address Bus

16

Data Bus

RW

Control Bus


ADD 201opcode address

STO 202opcode address

LD 200opcode address

1k x 16

Memory

105:

106:

107:

001001 0011001000opcode address



Accumulator (16)

Program Counter (10) (Instruction Counter, Instruction Pointer)

35

1k x 16

Memory

R W

10

Address Bus

Address Register (10)LD

LD 200opcode address

LD

Program Counter (10)inc

Data Bus

16

Instruction Register (16)LD

Data Register (16)LD

Accumulator (16)LD

ALUS2

S1

S0

AB

10

IR(0-9)

SMUX0 1

Control Bus

Timer

Reset

Clock

Control

Unit

105: ADD 201opcode address

106: STO 202opcode address

107:


Von-Newman Architecture

• Data and Instructions are stored in a common memory

• Processor– Loop:

1. Fetch Instruction from memory2. Decode Instruction3. Execute Instruction

– [Fetch Operands from memory]– Execute– [Store results in memory]


Types of Machine Instruction

• Computation (Arithmetic, Logic, Shift) – ADD, SUB, MUL, AND, OR, XOR, SHL, SHR

• Data transfer– LOAD, STORE, MOVE, EXCAHNGE, POP, PUSH

• Program Control– JUMP, conditional JUMP (JZ, JS, …)– COMPARE, TEST– CALL, RETURN


• Binary Codes

• Inserting An instruction– 100: – 101: – 102:

• Memory Locations

Disadvantages of Programming In Disadvantages of Programming In Machine LanguageMachine Language

LD 200

SUB 201

JNS 101

ADD 1017

SUB 1018

LD 200


Assembly Language

• Symbolic• Labels & Variables• Overloading

• Assembler• Each Processor Has an Assembly

Language


High-level Programming Languages

• Types (integer, boolean, string, structures, arrays, etc)

• Expressions

• Control Instructions (if-else, while, …)

• Procedures, Argument passing, …


Compilers/Interpreters

• Compiler: A program that converts a High-level program code to Machine-Code:– Mapping Variables, Structures and Procedures to

Memory Addresses– Writing Codes for Loops, Conditions, Procedure Calls,

Argument Passing, etc– Writing Codes for Expression evaluation– Syntax Checking, Type Checking, Errors and Warnings– …

• Interpreter: A program that Reads Instructions of a High-level programming language and Executes them one by one


Try it yourself !Try it yourself !

• Write a program in ‘C’ and Compile it to Write a program in ‘C’ and Compile it to Assembly language:Assembly language:

>>>>>> gcc –S test.c gcc –S test.c• Read and Modify Assembly Code:Read and Modify Assembly Code:

>>>>>> mcedit test.s mcedit test.s• Convert Assembly code to Machine Code Convert Assembly code to Machine Code

(Executable file) and run it:(Executable file) and run it:

>>>>>> gcc test.s gcc test.s>>>>>> ./a.out ./a.out


Interrupt• Write A Screen Saver Program that displays an

animation, Shows clock, and terminates with a key-press or mouse-click:

12:5312:53


Interrupt

• Loop:– Fetch Instruction– Decode– Execute– If an Interrupt Occurs

• Save Current Value of Registers • Jump to Interrupt Service Routine (ISR) [PC address of ISR]

• Hardware Implementation of ‘if’ (i.e. takes no time to check occurring of Interrupt)

• Address of ISR can be determined by content of a register, Interrupt Vector or it can be fixed.


Types of Interrupt

1. External Interrupt• I/O devices, Timers, Alarms, etc

2. Internal Interrupt (Trap)• Overflow, Division by zero, Invalid

Instruction, Stack Overflow, …

3. Software Interrupt• Calling an ISR, Calling System Procedures

(system calls)


Dynamic Memory Allocationint k;

main() {k = fact(7);

}

int fact(int n) {int m;if (n == 0)

return 1;m = fact(n – 1);

return m * n;}


Stackk

LD 100

JZ 202

DEC

:

mReturn Address

n: 6m

Return Addressn: 7xxx

Stack Pointer (SP)

int k;

int fact(int n) {

int m;

if (n == 0)

return 1;

m = fact(n – 1);

return m * n;

}

k = fact(7);

:

Stack

Code

Data

Memory


Limitations of StackLimitations of Stackchar *upper_case(char *s) {

char r[100]; // allocating 100 bytes in stack

int i;

for (i = 0; s[i] != 0; i++) {

if (s[i] >= ‘a’ && s[i] <= ‘z’)

r[i] = s[i] – ‘a’ + ‘A’; // Converting to upper-case letter

else

r[i] = s[i];

}

return r;

}

main() {

char *s1 = “Salaam!!”;

char *s2 = upper_case(s1);

printf(“%s, %s\n”, s1, s2); // Unexpected result!

}


HeapHeapchar *upper_case(char *s) {

char r[100]; // allocating 100 bytes in stack

char *r = (char *) malloc(100); // allocating 100 bytes in heap

int i;

for (i = 0; s[i] != 0; i++) {

if (s[i] >= ‘a’ && s[i] <= ‘z’)

r[i] = s[i] – ‘a’ + ‘A’;

else

r[i] = s[i];

}

return r;

}

main() {



printf(“%s, %s\n”, s1, s2); // prints : Salaam!, SALAAM!

free(s2); // return 100 free bytes to heap

}

50

Heap k

LD 100

JZ 202

DEC

:

s s2s1

:

Stack

Code

Data

Memory

char *upper_case(char *s) {

char *r = (char *) malloc(100);

int i;

for (i = 0; s[i] != 0; i++) {

if (s[i]>=‘a’ && s[i]<=‘z’)

r[i] = s[i]–‘a’+‘A’;

else

r[i] = s[i];

}

return r;

}

main() {



printf(“%s, %s\n”, s1, s2);

free(s2);

}

i r : 1200

ret-address

ret-addressmain

upper-case

:

Heap

1200 :


Wait Signal

Processor

(CPU)1k x 16

Memory

10

16

10

Address Bus

16

Data Bus

RW

Control Bus

RWWait

delay

Clock

100MHz clock

100ns propagation delay(10ns for each micro-operation)


Processor

(CPU)1k x 16

Memory

RWWait

delay

Clock

100MHz clock

(10ns)

64 x 16 Cache

(100ns) propagation delay

(8ns) propagation

delay

Cache Memory

Data+Address+Control Bus


Cache Memory

• Associative Mapping

• Direct Mapping


Virtual Memory

:

:

Virtual Memory

1M x 16

Physical Memory

32k x 16

Address Mapping


??

????


Simple ALUS2 S1 S0 Y

0 0 0 A

0 0 1 B

0 1 0 A + B

0 1 1 A – B

1 0 0 -A

1 0 1 ~ A

1 1 0 A and B

1 1 1 A or B

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