CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

CS472 - Computer Architecture Lecture 2

D. Kevin McGrath

April 3, 2013

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Day 3 Overview

• Addition and subtraction

• Multiplication

• Division

• Floating-point

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Arithmetic for computers

• Data representation

• Operations on integers• Addition and subtraction• Multiplication• Division• Dealing with overflow

• Floating-point numbers• Representation• Operations• Overflow/underflow• Accuracy and precision

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Outline

1 Data Representation

2 Addition and Subtraction

3 Multiplication

4 Division

5 Floating-Point

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Data representation

• Data represented by bits and bytes

• Can be anything• Characters (ASCII)• Machine instruction• Number• Audio file• Picture

• Positional representation of numbers

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Outline

1 Data Representation

2 Addition and Subtraction

3 Multiplication

4 Division

5 Floating-Point

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Integer addition

• Example: 7 + 6

(0) (0) (1) (1) (0) (Carries)

. . . 0 0 0 1 1 1

. . . 0 0 0 1 1 0

. . . (0) 0 (0) 0 (0) 1 (1) 1 (1) 0 (1) 1

• Overflow if result out of range• Adding positive and negative

• no overflow possible

• Adding 2 positive numbers

• overflow if sign bit is 1

• Adding 2 negative numbers

• overflow if sign bit is 0

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Details and 2’s complement

• Range: distance from smallest to largest value

• Precision: measure of how well we can represent it.Dependent upon number of bits.

• Accuracy: difference between representation and canonicalvalue

• Representations:• Sign and magnitude

• Uses sign bit, shifts range down by half

• Positive if sign bit 0, negative if sign bit 1

• 2’s complement

• Defined for a value N as 2N− N

• Allows subtraction by addition of complement

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

•

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Integer Subtraction

• Example: 7 − 6 = 7 + (−6)+7: 0000 0000 . . . 0000 0111-6: 1111 1111 . . . 1111 1010

+1: 0000 0000 . . . 0000 0001

• Overflow if result out of range• Subtracting 2 positive or 2 negative values

• no overflow possible

• Subtracting positive value from negative value

• overflow if sign bit is 0

• Subtracting negative value from positive value• overflow if sign bit is 1

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Dealing with overflow

• Some languages ignore overflow, such as C

• Other languages (which you will likely never use – Ada,Fortran) require an exception be raised

• On overflow, invoke exception handler

• Will discuss this at later date

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Outline

1 Data Representation

2 Addition and Subtraction

3 Multiplication

4 Division

5 Floating-Point

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Binary Multiplication

• Can be implemented as shift + add (see figure 2.3 intextbook)

• Same algorithm learned in grade school

• High-speed multiplication implemented in most hardware• Look-up tables• Special purpose logic gates• Op-amps

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Outline

1 Data Representation

2 Addition and Subtraction

3 Multiplication

4 Division

5 Floating-Point

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Binary Division

• Same algorithm learned in grade school for decimal values

• Can be either restoring or non-restoring – see pp 68-71 intextbook

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Outline

1 Data Representation

2 Addition and Subtraction

3 Multiplication

4 Division

5 Floating-Point

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Floating-point

• Representation for non-integral numbers• Useful for very large or very small numbers

• Like scientific notation• −2.34 × 1056 normalized

• +0.002× 10−4

• +987.02× 109 not normalized

• In binary• ±1.xxxxxxx2 × 2yyyy

• Types float and double in C

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Floating-point standard

• Defined by IEEE Std. 754-1985

• Developed in response to divergence of representations• Portability issues for scientific code

• Almost universal in adoption

• Two representations• Single-precision (32-bit)• Double-precision (64-bit)

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

IEEE Floating-point format

single: 8 bits single: 23 bitsdouble: 11 bits double 52 bits

S Exponent Fraction

x = (−1)S × (1 + Fraction) × 2Exponent−Bias

• S: sign bit (0 ⇒ non-negative, 1 ⇒ negative)

• Normalize significand: 1.0 ≤ |significand | < 2.0• Always has a leading pre-binary-point 1 bit, so no need to

represent it explicitly• Significand is fraction with the “1.” restored

• Exponent: excess representation: actual exponent + Bias• Ensures exponent is unsigned• Single-precision bias: 127• Double-precision bias: 1023

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Single-precision range

• Exponents 00000000 and 11111111 reserved

• Smallest value:• Exponent: 00000001 ⇒ 1 − 127 = −126• Fraction: 000. . . 00 ⇒ significand = 1.0• ±1.0 × 2−126 ≈ ±1.2 × 10−38

• Largest value:• Exponent: 11111110 ⇒ 254 − 127 = +127• Fraction: 111. . . 11 ⇒ significand ≈ 2.0• ±2.0 × 2+127 ≈ ±3.4 × 10+38

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Double-precision range

• Exponents 000. . . 00 and 111. . . 11 reserved

• Smallest value:• Exponent: 00000000001 ⇒ 1 − 1023 = −1022• Fraction: 000. . . 00 ⇒ significand = 1.0• ±1.0 × 2−1022 ≈ ±2.2 × 10−308

• Largest value:• Exponent: 11111111110 ⇒ 2046− 1023 = +1023• Fraction: 111. . . 11 ⇒ significand ≈ 2.0• ±2.0 × 2+1023 ≈ ±1.8 × 10+308

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Floating-point precision

• Relative precision• All fraction bits are significant• Single-precision: ≈ 2−23

• Equivalent to 23 × log10 2 ≈ 23 × 0.3 ≈ 6 decimal digits

• Double-precision: ≈ 2−52

• Equivalent to 52 × log10 2 ≈ 52 × 0.3 ≈ 16 decimal digits

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Floating-point example

• Represent −0.75• −0.75 = (−1)1 × 1.12 × 2−1

• S = 1• Fraction = 1000 . . .002

• Exponent:

• Single: −1 + 127 = 126 = 011111102

• Double: −1 + 1023 = 1022 = 011111111102

• Single: 1011111101000 . . .00• Double: 1011111111101000 . . .00

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Floating-point example

• What number is represented by the single-precision float1100000010100 . . . 00

-5.0

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Floating-point example

• What number is represented by the single-precision float1100000010100 . . . 00

-5.0

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Denormal numbers

• Exponent = 000 . . . 00 ⇒ hidden bit is 0

x = (−1)S × (0 + Fraction) × 2−Bias

• Smaller than normal numbers• Allows for gradual underflow, with diminishing precision

• Denormal with fraction = 000 . . . 0x = (−1)S × (0 + 0) × 2−Bias = ±0

Two representations of 0!

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Infinities and NaNs

• Exponent = 111 . . . 1, fraction = 000 . . . 0• ±∞• Can be used in subsequent calculations, avoiding need for

overflow check

• Exponent = 111 . . . 1, fraction 6= 000 . . . 0• Not a number (NaN)• Indicates illegal or undefined result• Can be used in subsequent calculations• Propogate through all subsequent operations – result will

be NaN

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

Accurate arithmetic

• IEEE 754 specifies additional rounding control• Extra bits of precision• Choice of rounding modes• Allows programmer to fine-tune numerical behavior

• Not all FPUs implement all options• Most programming languages and FP libraries just use

defaults

• Trade-off between hardware complexity, performance, andmarket requirements

CS472 -

Computer

Architecture

Lecture 2

D. Kevin

McGrath

Data

Representation

Addition and

Subtraction

Multiplication

Division

Floating-Point

IEEE 754 features

• 4 rounding modes available• Round to nearest value – favors even numbers if

equidistant• Round towards 0• Round towards +∞• Round towards −∞

• Four comparisons defined:• equal to• less than• greater than• unordered – used with NaNs

• Five exceptions• Invalid operation• Division by zero• Overflow• Underflow• Inexact