# cpe 252: computer organization1 lo’ai tawalbeh lecture #2 standard combinational modules:...

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cpe 252: Computer Organization 1 Lo’ai Tawalbeh Lecture #2 Standard combinational modules: decoders, encoders and Multiplexers 1/3/2005

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cpe 252: Computer Organization 1

Lo’ai Tawalbeh

Lecture #2

Standard combinational modules: decoders, encoders and

Multiplexers1/3/2005

cpe 252: Computer Organization 2

Decoders• General decoder structure

• Typically n inputs, 2n outputs– 2-to-4, 3-to-8, 4-to-16, etc.

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Binary 2-to-4 decoder

Note: “x” = (don’t care) cases.

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Decoder Use – Operation Decoding•Microprocessor instruction decoding

other fields

opcode field

instruction

4-input binarydecoderEn

1

0 1 2 ………. 15

jump

decoded instructions

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2-to-4-decoder logic diagram

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3-input Binary DecoderE x2 x1 x0 x y7 y6 y5 y4 y3 y2 y1 y0

1 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 0 0 0 0 1 0 1 0 1 0 2 0 0 0 0 0 1 0 0 1 0 1 1 3 0 0 0 0 1 0 0 0 1 1 0 0 4 0 0 0 1 0 0 0 0 1 1 0 1 5 0 0 1 0 0 0 0 0 1 1 1 0 6 0 1 0 0 0 0 0 0 1 1 1 1 7 1 0 0 0 0 0 0 0 0 - - - - 0 0 0 0 0 0 0 0

Inputs: x = (x2, x1, x0), with xi in {0,1} and E in {0,1}

Outputs: y = (y7,y6,y5,…,y1,y0) with yi in {0,1}

Function: yi = E. mi(x), i = 0,1,…,7

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Implementing functions using a Binary Decoder and OR Gates

x2 x1 x0 z2 z1 z0

0 0 0 0 1 0 0 0 1 1 0 00 1 0 0 0 10 1 1 0 1 01 0 0 0 0 11 0 1 1 0 11 1 0 0 1 01 1 1 1 0 0

Function

210

01234567

Bin

ary

D

eco

de

r

E

1

x2

x1

x0

z2

z1

z0

Remember that any function can be represented as a sum of minterms

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Binary Encoders

• Only one input Ij has value 1 at any given time

• Output Y corresponds to the binary code of j when Ij = 1

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8-to-3 Binary Encoders

Y0 = I1 + I3 + I5 + I7 (odd input indices)

Y1 = I2 + I3 + I6 + I7

Y2 = I4 + I5 + I6 + I7 (indices > 3)

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Multiplexers

MUX

1 0

0

1

2

3

selection inputs

datainputs

1

0

1

0 0

1

0

1

0 1

1

0

1

1 0

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4-input Multiplexer

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Typical Multiplexer useselection between multiple paths to a functional unit

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Multiplexers as universal modules

• Universal module: using only this module you are able to implement ANY logic function.

• NAND and NOR gates for example are universal gates.

• Question: how do you assign inputs for the multiplexer in order to implement a given function?

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ExerciseImplement the following function using:

a) 8-input multiplexer.

b) 4-input multiplexer.

F=x,y,z(1,2,6,7)

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Lo’ai Tawalbeh

Lecture #2

Signed and Unsigned Numbers

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4-bit Unsigned Numbers

Range of values for n-bit vector is: 0 ≤ x ≤ (2^n-1)

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Representation of Signed Integers and Basic Operations

• Two common representations– Sign and Magnitude (SM)– True and Complement (TC)

• In both cases there is a mapping from signed values to positive values.

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Sign and Magnitude

• x represented by a pair (s,m) where– s is the sign: 0 for positive and 1 for negative

– m is the magnitude

– example: (-23)10 = -(10111) = (1,10111)

• Range of values for n-bit vector (n-1 bits for m)– - (2n-1 – 1) ≤ x ≤ (2n-1 – 1)

• Two representations for zero

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2’s complement

• No separation between sign and magnitude

• Signed integer x represented by positive integer xR such that:

Example: n=4, 2^4=16. To represent x = -7; xR = 9

• Range of values for n-bit vector ( 2’s comlement)– - (2n-1 ) ≤ x ≤ (2n-1 – 1)

otherwisex

xwhenxx nR 2

0

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4-bit Two’s Complement Numbers

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Change of Sign

1. complement each bit of x

Example: n = 4 x = (0011)2= 3

x’ = 1100

+ 1

1101 representation of -3

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