Computer Hardware and System Software Concepts Hardware and System Software Concepts ... Main components in a computer system – Hardware – Software ... Infosys Technologies Ltd ER/CORP/CRS/OS09/003

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<ul><li><p>1</p><p>Computer Hardware and System Software ConceptsIntroduction to Computer Architecture</p><p>Welcome to this course on Computer Hardware and System Software Concepts</p></li><li><p>2</p><p>2Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Course Objective</p><p>To introduce fundamentals of Computer Architecture </p><p>To introduce the concepts of System Software. </p><p>To introduce the concepts of Operating Systems. </p><p>To introduce the concepts of Computer Networks. </p><p>By the end of the course, you will have</p><p> Knowledge of Computer Architecture</p><p> Knowledge about different kinds of System Software viz., Compilers, Assemblers, Interpreters etc</p><p> Knowledge about Operating System as a resource manager managing resources like memory, processors, peripherals and information</p><p> Knowledge about Computer Networks</p><p>NOTE:</p><p>This course does not cover</p><p> Technologies used to fabricate CPU, memory etc.</p><p> Design and implementation of compilers, linkers, loaders etc.</p><p> No particular OS whether at the command level or internals</p><p> No particular protocol such as TCP/IP</p><p> No day to day software Internet, Netscape etc.</p></li><li><p>3</p><p>3Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>References</p><p>Andrew S. Tanenbaum: Structured Computer Organization , PHI, 3rd edition, </p><p>1991.</p><p>Silberschatz and Galvin: Operating System Concepts , 4th edition, Addison-</p><p>Wesley Pub, 1995. </p><p>Andrew S. Tanenbaum: Computer Networks, PHI, 1991.</p><p>Alfred V.Aho, Ravi Sethi, Jeffrey D.Ullman: Compilers -Principles, Techniques </p><p>and Tools, Narosa Publishing House, 1986. </p></li><li><p>4</p><p>4Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Session Plan</p><p>Day 1</p><p> Create a background</p><p> Main components of computer architecture </p><p> Different addressing modes </p><p>Day 2</p><p> Introduce System Software</p><p> Introduce Operating Systems/Memory Management</p><p>Day 1Create a background</p><p>Just to warm up everybody, and avoid an abrupt start, we are going to set up a background. Here we will be discussing very trivial/obvious questions and answers.</p><p>Main components of computer architecture To discuss about the following </p><p>CPUMain MemoryInput/Output DevicesBus</p><p>Different Addressing modesTo discuss about the following</p><p>Implied AddressingImmediate AddressingDirect AddressingRelative AddressingIndexed AddressingIndirect Addressing</p><p>Day2Introduce System Software </p><p>To discuss about the following AssemblersLoadersLinkersCompilers</p><p>To introduce Operating Systems/Memory ManagementTo discuss about the followingOperating SystemFunctions of Operating SystemMemory Management Memory Management Schemes</p></li><li><p>5</p><p>5Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Session Plan</p><p>Day 3</p><p> Introduce Process Management</p><p> Introduce File Management</p><p>Day 4</p><p> Introduce Device Management</p><p> Introduce Computer Networks</p><p>Day 3</p><p>To introduce Device Management</p><p>To discuss about the following</p><p>I/O Channels, interrupts and interrupt handling</p><p>Structure of an I/O System</p><p>Allocation Policy</p><p>To introduce Computer Networks</p><p>Computer Networks what and why</p><p>Network Topology</p><p>The OSI model: layered approach</p><p>Communication methods: Circuit, Packet and Message Switching</p><p>Important Routing Devices</p><p>Day 4</p><p>To introduce Device Management</p><p>Introduction</p><p>I/O channels, interrupts and interrupt handling</p><p>Structure of an I/O system</p><p>Allocation Policy</p><p>Case Study: MS-DOS vs Unix</p></li><li><p>6</p><p>6Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Background</p><p>What is a Computer?</p><p>What is a Program?</p><p>Main components in a computer system</p><p> Hardware</p><p> Software</p><p> Firmware</p><p>A Computer is a machine which solves problems for people written as programs.</p><p>A Program is a sequence of statements/steps stating how to perform a task. For each step an arithmetic and logical operation is done. For each operation a different set of control signals is needed i.e. an instruction. An instruction can be machine language instructions or assembly language instructions or even high level language instructions. </p><p>A hardware is something that is tangible. For e.g. CPU, Memory, I/O devices, Bus etc.A software is a collection of programs. Trigger the question to identify the differences between software, program, function/procedure etc.Software is mainly of two types system software and application software. Programs such as compilers, linkers, loaders, assemblers are known as system software. Application software provides a solution to user application by making use of system software. E.g. banking software, payroll software.</p><p>A firmware is software embedded in hardware during manufacture. E.g. home appliances etc</p></li><li><p>7</p><p>7Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Computer Architecture</p><p>is concerned with the structure and behavior of the computer as seen by the </p><p>user/programmer. It includes attributes such as</p><p> Instruction Formats</p><p> Addressing Modes</p><p> Instruction Sets</p><p> I/O Mechanisms</p><p>Talk about the difference between computer architecture and organization.</p><p>Computer Organization is how features are implemented, typically hidden from the programmer. E.g. control signals, interfaces, memory technology etc. It is basically concerned with the way the hardware components operate and the way they are connected together to form the computer system.</p><p>An instruction consists of an opcode always, along with some additional information such as where the operands come from and where the final results go to etc. Thus, there can be zero, one, two or three addresses present. </p><p>Different machines have different instruction formats.</p><p>Addressing basically refers to the way in which the operands are specified in an instruction. There are different ways in which the bits of an address field can be interpreted to find the operand. Addressing modes refer to these different ways.</p></li><li><p>8</p><p>8Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Computer Architecture</p><p>We are going to study the computer architecture. </p><p>We are not going to open the system and show where the CPU is located where the main memory is fixed and how the I/O devices are connected. </p><p>Rather, we will study what are the components of a computer, what are their characteristics and functions. </p></li><li><p>9</p><p>9Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Main components of a computer system</p><p>Central Processing Unit (CPU)</p><p>Main Memory</p><p>Input / Output devices</p><p>Bus</p></li><li><p>10</p><p>10Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>CPU (Processor)</p><p>What is it?</p><p>Brain of the computer</p><p>Function </p><p> Fetch instructions from memory</p><p> Examine</p><p> Execute</p><p>CPU is the part of the computer that performs the bulk of the data processing operations. Its main function is to execute programs stored in the main memory by fetching the instructions, examining them and executing them.</p></li><li><p>11</p><p>11Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Examples of CPU (Processor)</p><p>Intel Processors </p><p>8088</p><p>80286</p><p>80386</p><p>80486</p><p>Pentium</p><p>Motorola Processors68000</p><p>68020</p><p>68030</p></li><li><p>12</p><p>12Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Parts of CPU</p><p>Control Unit ( CU )</p><p>Arithmetic and Logical Unit (ALU)</p><p>Registers</p></li><li><p>13</p><p>13Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Control Unit</p><p>Fetches an instruction from memory</p><p>Interprets the type of the instruction</p><p>The control unit fetches program instructions from main memory, decodes these instructions and sends control signals to other units of a computer system. The execution of a machine instruction consists of a sequence of steps by accessing the main memory as and when necessary to read data.</p></li><li><p>14</p><p>14Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Arithmetic and logic unit</p><p>Performs operations such as </p><p> subtraction, addition, (arithmetic)</p><p> comparison (logical)</p><p>The ALU performs the required micro operations for executing the instructions. It performs both arithmetic and logic operations. </p></li><li><p>15</p><p>15Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Registers</p><p>Very high speed memory units in the CPU</p><p>Examples</p><p> Program Counter (PC)</p><p> Instruction Register (IR)</p><p> Memory Address Register (MAR)</p><p> Memory Buffer Register (MBR)</p><p> Accumulator (A)</p><p>The registers store intermediate data used during the execution of the instructions.</p><p>We know that memory locations are needed for storing pointers, counters, return addresses, temporary results, partial products etc. But having to refer to memory locations for applications is time consuming as memory access is very time consuming. It is more convenient and more efficient to store these intermediate values in registers inside the processor. When a large no. of registers are included in the CPU, it is efficient to connect them through a common bus system. </p><p>Program Counter (PC) Points to the address of the next instruction to be executed</p><p>Instruction Register (IR) Holds the instruction currently being executed</p><p>Memory Address Register (MAR) Holds the address for either the instruction or the data required for the instruction</p><p>Memory Buffer Register (MBR) Holds the contents of the location that has been read or that is to be written in</p><p>Accumulator (A) A Processor register which serves as both the input and output for lots of operations. It basically stores the intermediate results of most of the operations.</p></li><li><p>16</p><p>16Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Von Neumann architecture - characteristics</p><p>Von Neumann architecture</p><p>A B</p><p>A L U </p><p>A + B </p><p>Registers</p><p>Input local registers in ALU</p><p>Output local registers in ALU</p><p>This architecture was first suggested by Von Neumann. It consists of a data path, registers and the ALU. The registers feed into two ALU registers labeled A and B. These registers hold the ALU input while the ALU is computing. The ALU itself performs addition, subtraction and other simple operations on its inputs. The result is stored in the output local register. The output register can be stored back into one of the registers. </p></li><li><p>17</p><p>17Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Von Neumann architecture - characteristics</p><p>One processor</p><p>Use of stored programs</p><p>Sequential processing of instructions</p><p>Single Instruction, Single Data stream (SISD) mode</p></li><li><p>18</p><p>18Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Fetch-decode-execute cycle</p><p>memoryaddressregister(MAR)</p><p>memorybuffer</p><p>register(MBR)</p><p>memoryunit</p><p>instruction register (IR)</p><p>instruction decoder</p><p>circuits for generatingcontrol signals</p><p>clock</p><p>prpgram counter (PC)</p><p>A</p><p>B</p><p>D</p><p>E</p><p>R</p><p>control unit</p><p> Block diagram with essential interconnections</p><p>PC contains address of next instructionto be executed which is moved to MAR</p><p>A block diagram of the CPU with all the interconnections are shown in the diagram above. The sequence of steps for executing an instruction follow a cycle known as fetch-decode-execute cycle.</p></li><li><p>19</p><p>19Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Fetch-decode-execute cycle</p><p>Fetch Phase</p><p>Decode Phase</p><p>Execute Phase</p><p>The fetch-decode-execute cycle are explained in the next slides.</p></li><li><p>20</p><p>20Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Fetch phase</p><p>Contents of PC are transferred to MAR</p><p>Main memory is accessed and current instruction is fetched into MBR</p><p>Instruction is transferred from MBR to IR</p><p> The contents of the PC are transferred to MAR. The main memory is accessed and the current instruction is fetched into MBR. The operation code is transferred from MBR to IR where it is decoded. </p></li><li><p>21</p><p>21Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Decode phase</p><p>Opcode of the instruction is decoded</p><p>Contents of PC are incremented by 1(in case of 1 byte instruction or equal to </p><p>the no. of bytes of the instruction currently being executed.)</p><p>Execution phase follows ( specific to the given instruction )</p><p>The opcode of the instruction is decoded by the decoder</p><p>At the same time, the PC is incremented by 1 to prepare it for fetching the next instruction. </p></li><li><p>22</p><p>22Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Execute phase</p><p>Execute the instruction </p><p>Store the results in the proper place (go to the fetch phase to begin executing </p><p>the next instruction)</p><p>The instruction is executed and the results are stored in the required register and the control goes back to the fetch cycle again.</p></li><li><p>23</p><p>23Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Instruction categories</p><p>Arithmetic Instructions</p><p>Logical instructions</p><p>Program Control instructions</p><p>I/O instructions</p><p>Data Transfer instructions</p><p>Arithmetic instructions operate on numerical data. For e.g. addition, subtraction etc.</p><p>Logical instructions perform boolean operations. For e.g. etc.</p><p>Program Control instructions are those instructions which change the sequence of execution. For e.g. jump, procedure call and return etc.</p><p>I/O instructions are those instructions which are responsible for transfer of information between CPU or memory to and from I/O devices.</p><p>Data Transfer instructions perform operations involving register and memory viz.,</p><p>Register-Memory/Memory-Register: allows memory words to be fetched into registers where they can be used as ALU inputs for subsequent instructions and vice-versa to store the register contents into the main memory.</p><p>Register Register: fetches two operands from the registers, brings them to the ALU input registers and performs some operation on them.</p><p>Memory - Memory: This happens in two stages. A memory to register data transfer and register to memory data transfer. This mode of data transfer fetches its operands from memory into the ALU input registers, performs the operations and writes the data back into the memory.</p></li><li><p>24</p><p>24Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Measures of CPU performance</p><p>MIPS</p><p>Clock Speed</p><p>FLOPS</p><p>MIPS (Millions Instructions Per Second) is a measure of the speed of the processor. The time taken for executing different instructions is not the same. Hence, a mix of different instructions are taken to find out how many instructions on an average a computer can execute in a second.</p><p>Clock Speed is another metric used to measure performance. A particular instruction always takes an exact number of clock pulses to complete. But the number of clock pulses differ across different instructions. The clock speed is measured in MHz which gives an indication of how fast a program runs.</p><p>FLOPS( Floating Point Operations Per Second) is a measure of the speed of the Floating Point Unit (FPU) which is a co-processor unit. It is similar to MIPS except that the former is for non-floating operations where as this is for floating point operations.</p></li><li><p>25</p><p>25Copyright 2004, Infosys Technologies Ltd </p><p>ER/CORP/CRS/OS09/003</p><p>Version No: 2.0</p><p>Memory</p><p>Place to store programs and data</p><p>Categories</p><p> Primary Memory</p><p> Secondary Memory</p><p> Internal Memory</p><p>Primary Memory:</p><p>Implemented in high speed devices located outside CPU</p><p>Costly and volatile</p><p>Hold...</p></li></ul>


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