Code No: R059210202 Set No. 1 II B.Tech I Semester ... B.Tech I Semester Supplementary Examinations, February 2007 ... II B.Tech I Semester Supplementary Examinations, February ... with relevant triggering circuit

Post on 07-Apr-2018

214 views

Category:

Documents

TRANSCRIPT

• Code No: R059210202 Set No. 1

II B.Tech I Semester Supplementary Examinations, February 2007PULSE & DIGITAL CIRCUITS

( Common to Electrical & Electronic Engineering, Electronics &Communication Engineering, Electronics & Instrumentation Engineering

and Electronics & Telematics)Time: 3 hours Max Marks: 80

Answer any FIVE QuestionsAll Questions carry equal marks

1. (a) Verify V2= (V/2)(e2x1)/(e2x+1) = (V/2) tanhx for a symmetrical square

wave applied to a low pass RC circuit.

(b) Derive the expression for percentage tilt(P) of a square wave output of RChigh pass circuit. [8+8]

2. (a) Determine Vo

for the network shown in figure 1 for the given waveform. As-sume ideal Diodes.

Figure 1:

(b) Draw the basic circuit diagram of positive peak clamper circuit and explainits operation. [8+8]

3. Write Short notes on:

(a) Diode switching times

(b) Switching characteristics of transistors

(c) FET as a switch. [4+8+4]

4. (a) Draw the circuit diagram of a Schmitt trigger circuit and explain its operation.Derive the Expressions for its UTP and LTP.

(b) Explain how an Schmitt trigger circuit acts as a comparator. [12+4]

5. (a) Draw and clearly indicate the restoration time and flyback time on the typicalwaveform of a time base voltage.

(b) Derive the relation between the slope, transmission and displacement errors

1 of 2

• Code No: R059210202 Set No. 1

(c) Explain how UJT is used for sweep circuit? [6+4+6]

6. (a) Draw the circuit diagram of an astable multivibrator to obtain frequency di-vision by 6. Explain its working with waveforms.

(b) Explain the terms phase delay and phase jitter. [8+8]

7. (a) Explain the effect of circuit capacitances on the operation of a bi-directionaldiode gate.

(b) In the circuit of figure 2 consider that RL=RC=100K ohms and that R2=2 Kohms, Rf=50 ohms for Vs=25V, compute A, Vnmin, and Vcmin. [8+8]

Figure 2:

8. (a) What are the basic logic gates which perform almost all the operations inDigital communication systems.

(b) Give some applications of logic gates.

(c) Define a positive and negative logic systems.

(d) Draw a pulse train representing a 11010111 in a synchronous positive logicdigital system. [4+4+4+4]

2 of 2

• Code No: R059210202 Set No. 2

II B.Tech I Semester Supplementary Examinations, February 2007PULSE & DIGITAL CIRCUITS

( Common to Electrical & Electronic Engineering, Electronics &Communication Engineering, Electronics & Instrumentation Engineering

and Electronics & Telematics)Time: 3 hours Max Marks: 80

Answer any FIVE QuestionsAll Questions carry equal marks

1. (a) Derive the conditions necessary for good integrator:

(b) A square wave whose peak to peak amplitude is 1V extends0.5V with respectto ground. The duration of the positive section is 0.1 Sec. and of the negativesection is 0.2 Sec. If this wave form is impressed on RC high pass circuitswhose time constant is 0.2 Sec. what are the steady state maximum andminimum values of the output waveform? [6+10]

2. (a) A symmetrical 10 kHz square wave whose peak -to-peak excursion are 10Vwith respect to ground is impressed upon the diode clamping circuit shown infigure 1. The Diodes has Rf = 100 , Rr = and V = 0. Sketch the steadystate output waveform Indicating clearly the voltage levels.

Figure 1:

(b) Explain positive peak voltage limiters above and below reference level. [8+8]

3. (a) Explain the terms pertaining to transistor switching characteristics.

i. Rise time.

ii. Delay time.

iii. Turn-on time.

iv. Storage time.

v. Fall time.

vi. Turn-off time.

(b) Give the expression for risetime and falltime in terms of transistor parametersand operating currents. [6+10]

4. (a) Design a collector coupled transistor monostable multivibrator to produce atime delay of 100 sec. Use transistors have hFE of 250. Use 12v sources,VCE(sat) = 0.3v, VBE(sat) = 0.7v and VBEcutoff = 0v

1 of 2

• Code No: R059210202 Set No. 2

(b) Show that the astable multivibrator works as voltage controlled oscillator.[10+6]

5. (a) What is a Linear time base generator? Give its Applications

(b) Write the differences between the voltage and current time base generators?

(c) Why the time base generators are called sweep circuits? [6+6+4]

6. (a) What is relaxation oscillator? Name some negative resistance devices used asrelaxation oscillators and give its applications.

(b) With the help of a circuit diagram and waveforms, explain the frequencydivision by an astable multivibrator? [8+8]

7. (a) Draw the equivalent circuit and derive the gain and control voltages of bi-directional two diode sampling gate and also give its disadvantages.

(b) Draw the Block diagram of sampling scope and explain each block in brief.[8+8]

8. (a) What are the basic logic gates which perform almost all the operations inDigital communication systems.

(b) Give some applications of logic gates.

(c) Define a positive and negative logic systems.

(d) Draw a pulse train representing a 11010111 in a synchronous positive logicdigital system. [4+4+4+4]

2 of 2

• Code No: R059210202 Set No. 3

II B.Tech I Semester Supplementary Examinations, February 2007PULSE & DIGITAL CIRCUITS

( Common to Electrical & Electronic Engineering, Electronics &Communication Engineering, Electronics & Instrumentation Engineering

and Electronics & Telematics)Time: 3 hours Max Marks: 80

Answer any FIVE QuestionsAll Questions carry equal marks

1. (a) Prove that an RC circuit behaves as a reasonably good integrator if RC > 15T,Where T is the period of an input Em sin t

.

(b) What is the ratio of the rise time of the three sections in cascade to the risetime of Single section of low pass RC circuit. [8+8]

2. (a) Design a biased positive voltage clamping figure 1 the input is a symmetricalsquare wave of 10v at 1Khz. The tilt on the output wave form should notexceed 1% signal source resistance is 500 ohms. Output voltage desired is2.7v.

Figure 1:

(b) Explain synchronized clamping circuit. [8+8]

3. Write Short notes on:

(a) Diode switching times

(b) Switching characteristics of transistors

(c) FET as a switch. [4+8+4]

4. (a) Draw the circuit of a self-biased binary using NPN transistors and explain itsworking.

(b) Design an astable multivibrator to generate 5kHz square wave with a dutycycle of 40% and if amplitude 12V. Use NPN transistor having hFE = 100,VBesat = 0.7V, VCEsat = 0.2, ICmax = 100mA. Show the waveforms seen atboth the collector and bases. [8+8]

1 of 2

• Code No: R059210202 Set No. 3

5. (a) Draw and clearly indicate the restoration time and flyback time on the typicalwaveform of a time base voltage.

(b) Derive the relation between the slope, transmission and displacement errors

(c) Explain how UJT is used for sweep circuit? [6+4+6]

6. (a) What do you mean by a relaxation circuit? Give a few examples of relaxationcircuits.

(b) With the help of neat waveforms, explain sine wave frequency division with asweep circuit. [8+8]

7. (a) Explain the basic principles of sampling gates using series switch and also givethe applications of sampling gates.

(b) Explain the effect of control voltage on gate output of unidirectional samplinggate using diode with some example. [8+8]

8. (a) What are the basic logic gates which perform almost all the operations inDigital communication systems.

(b) Give some applications of logic gates.

(c) Define a positive and negative logic systems.

(d) Draw a pulse train representing a 11010111 in a synchronous positive logicdigital system. [4+4+4+4]

2 of 2

• Code No: R059210202 Set No. 4

II B.Tech I Semester Supplementary Examinations, February 2007PULSE & DIGITAL CIRCUITS

( Common to Electrical & Electronic Engineering, Electronics &Communication Engineering, Electronics & Instrumentation Engineering

and Electronics & Telematics)Time: 3 hours Max Marks: 80

Answer any FIVE QuestionsAll Questions carry equal marks

1. (a) A pulse of amplitude 5 V and duration 20 sec is applied to High pass RScircuit having R= 10 k and C = 1000 pf. Calculate the output V0 (t) Sketchthe output waveform. Calculate the tilt and undershoot.

(b) What is meant by an attenuator and explain the application of an attenuatorin a CRO probe. [10+6]

2. (a) T=1000 secV= 10 VDuty cycle = 0.2

i. Sketch waveform with voltage levels at steady state figure 1

ii. Forward and reverse direction tilt

iii. Af / Ar

Figure 1:

(b) Write a short note on non- linear wave shaping. [12+4]

3. (a) Explain the terms pertaining to transistor switching characteristics.

i. Rise time.

ii. Delay time.

iii. Turn-on time.

iv. Storage time.

v. Fall time.

vi. Turn-off time.

1 of 3

• Code No: R059210202 Set No. 4

(b) Give the expression for risetime and falltime in terms of transistor parametersand operating currents. [6+10]

4. (a) Explain the operation of bistable multivibrator with relevant triggering circuitand waveforms.

(b) Explain the reason for occurrence of over shoot at the base of normally ONtransistor of one shot. Derive an expression for overshoot. [8+8]

5. (a) What is a Linear time base generator? Give its Applications

(b) Write the differences between the voltage and current time base generators?

(c) Why the time base generators are called sweep circuits? [6+6+4]

6. (a) What do you mean by synchronization ?

(b) What is the condition to be met for pulse synchronization?

(c) Compare sine wave synchronization with pulse synchronization? [4+6+6]

7. (a) Explain the effect of circuit capacitances on the operation of a bi-directionaldiode gate.

(b) In the circuit of figure 2 consider that RL=RC=100K ohms and that R2=2 Kohms, Rf=50 ohms for Vs=25V, compute A, Vnmin, and Vcmin. [8+8]

Figure 2:

8. (a) What are the basic logic gates which perform almost all the operations inDigital communication systems.

(b) Give some applications of logic gates.

(c) Define a positive and negative logic systems.

2 of 3

• Code No: R059210202 Set No. 4

(d) Draw a pulse train representing a 11010111 in a synchronous positive logicdigital system. [4+4+4+4]

3 of 3