cmis 310 homework 7

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Buy here: http://theperfecthomework.com/cmis-310-homework-7/ 1. What is the difference between multiprogramming and multi-threading? 2. a) Why should assembly language be avoided for general application development? b) Under what circumstances would you argue in favor of using assembly language for developing an assembly language program? c) What are the advantages of using a compiled language over an interpreted one? d) Under what circumstances would you choose to use an interpreted language? 3. a) A RISC processor has 298 total registers. Each register window has 32 registers of which 10 contain global variables and 12 contain local variables. How many register windows are available for use? _______ How many registers would be available for us by input variables? _______ How many registers would be available for use by output variables? _______ Show your work 4. Consider a CPU that implements two parallel fetch-execute pipelines for superscalar processing. Show the performance improvement over scalar pipeline processing and no-pipeline processing, assuming the instruction cycle below: a one clock cycle fetch a one clock cycle decode a three clock cycle execute and a 50 instruction sequence: a) No pipelining would require _____ clock cycles: b) A scalar pipeline would require ____ clock cycles:

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Page 1: CMIS 310 HOMEWORK 7

Buy here: http://theperfecthomework.com/cmis-310-homework-7/ 1. What is the difference between multiprogramming and multi-threading?

2. a) Why should assembly language be avoided for general application development?

b) Under what circumstances would you argue in favor of using assembly language for

developing an assembly language program?

c) What are the advantages of using a compiled language over an interpreted one?

d) Under what circumstances would you choose to use an interpreted language?

3. a) A RISC processor has 298 total registers. Each register window has 32 registers of

which 10 contain global variables and 12 contain local variables.

How many register windows are available for use? _______

How many registers would be available for us by input variables? _______

How many registers would be available for use by output variables? _______

Show your work

4. Consider a CPU that implements two parallel fetch-execute pipelines for superscalar

processing. Show the performance improvement over scalar pipeline processing and

no-pipeline processing, assuming the instruction cycle below:

● a one clock cycle fetch ● a one clock cycle decode ● a three clock cycle execute

and a 50 instruction sequence:

a) No pipelining would require _____ clock cycles:

b) A scalar pipeline would require ____ clock cycles:

Page 2: CMIS 310 HOMEWORK 7

c) A superscalar pipeline with two parallel units would require ______ clock cycles:

show your work

5. What is the difference between the superscalar and superpipelined approaches?