clock distribution and absolute time calibration in nemo phase 1

Martino Ruppi – KM3NeT 16 – 18 April 2007 - Pylos

Clock distribution and absolute time calibration in NEMO phase 1

Martino Ruppi

INFN di Bari


Outlook

• NEMO phase 1 mini-tower

• Clock Requirements

• Clock Shore Station implementation

• Time data flow

• The console


NEMO phase 1 mini-towerFCM

• Symmetric systems offshore and onshore

• Dense Wavelength Division Multiplexing (DWDM) based on passive Add&Drop

• Synchronous Protocol FCM onshore offshore

• Recovery clock offshore from data flow

OM• Front End (FE) and time-

stamping in OM• Analog signal sampled at

fixed rate (200 MHz)• Data recording triggered

when signal exceeds a remotely-set threshold

• The clock recovered by FCM is sent to OM

• Synchronous Protocol FCM OM

800 Mbps Synchronous

protocol Junction Box

DWDMAdd&Drop

Optical Module(OM & FE)

Synchronousprotocol

Floor Control Module (FCM)

220 m

100 m

40 m


Clock RequirementsTime counting in OMs is based on clock recovered in FCM

Each onshore FCM has to be synchronized by a low-jitter common clock

We need to compare the OM time flow with UTC

Onshore clock has to be extracted from GPS clock and time information

has to be sent to the apparatus

System scaling to KM3 size

The clock produced has to guarantee a very high fan-out


Clock Shore Station

• TDC 25ps sensitive • GPS receiver (+/-30 ns RMS)• GPS Antenna (now on the roof ot the onshore

station)• PC control• Modular PXI Crate FPGA board National Instr.

• Recovery clock from GPS receiver• Clock Fan-out toward FCMs onshore• Data and time recovery by IRIG B format • UTC data flow sent to FCMs onshore in

synchronous protocol• Go-and-Back time measurements with each

pair of onshore/offshore FCM by TDC• Network Time Protocol (NTP) server

synchronization of PCs by ethernet

GPSReceiver

TDC Connecting Board

Ck 10MHzIRIG B

4 X LVDS Ck 4MHz

4 X LVDS Time Data 4Mbit/s

FPGAStopx

Startx

RS232GPS Antenna

SCSI

PC

NTP


Data flow protocol to FCM

• 8b/10b code (reveling error, scrambling 0/1, byte function embedded)

• Time upgraded each 125 s • Data (and Slow-Control) absolute time• Acoustic data absolute time• Room to accomodate more information or commands

sec.

500 bit = 1/8000 seconds

min hous days frames since 01/01/2006start Idle … stopsec since 01/01/2006 Idle IdleIdle Idle

Data absolute time Acoustic absolute timeUTC


The Console (1)

LabView enviroment • FPGA Xilinx programming

• PC interface

• Instrument remote control

• Information storage in DB

• Logging

• Check alarms

• Accessible for control through ethernet


The Console (2)

Off shore time calibration

FPGA monitoringand management

Go and Back time measurementsTDC Management

Satellite signal GPS locking

On shore Time calibration


Conclusions

• The system is currently working in the NEMO Phase 1 control station

• Extension for a full-size 16-floor tower is undergoing (NEMO Phase 2)

• The setup can be easily adapted to serve even a KM3-size apparatus (it only needs more modules for the PXI crate)

clock distribution and absolute time calibration in nemo phase 1

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