chapter2 7edi

8/2/2019 Chapter2 7edi

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2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.Brey: The Intel Microprocessors, 7e

Chapter 2

The Microprocessor and its

ArchitectureBarry B. [email protected]


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Programming Model


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General-Purpose Registers

The top portion of the programming modelcontains the general purpose registers: EAX,EBX, ECX, EDX, EBP, ESI, and EDI.

These registers, although general in nature,each have special purposes and names.

EAX Accumulator (as general as they come)used also as AX, AH, and AL

EBX Base Index often used to addressmemory data (BX, BH, and BL)


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General-Purpose Registers(continued)

ECX count used in shifts and loops (CX, CH,and CL)

EDX data used in multiply and divide (DX, DH,

and DL) EBP base point used to address stack data

(BP)

ESI

source index addresses memory data (SI) EDI destination index addresses memory data

(DI)


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Special-Purpose Registers

The special purpose register each have specifictasks and are ESP, EIP, and EFLAGS

ESP address stack data used in functions

(procedures) and temporary storage (SP) EIP addresses the next instruction in a

program (IP)

EFLAGS

indicates conditions of themicroprocessor (FLAGS)


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EFLAGS


7/15 2006 Pearson Education, Upper Saddle River, NJ 07458. All Rights Reserved.Brey: The Intel Microprocessors, 7e

The Flags

C holds a carry or a borrow

P the parity flag (little use today)

A auxiliary flag used with DAA and DAS

Z zero S sign

O Overflow

D

direction (used with string instructions) I interrupt (interrupt on/off)

T trace flag (trace on/off)



Newer Flag Bits

IOPL I/O privilege level for Windows

NT nested task

RF resume flag

VM virtual mode

AC alignment check

VIF virtual interrupt

VIP virtual interrupt pending

ID = CPUID instruction available



Segment Register

The segment registers are: CS (code), DS(data), ES (extra), SS (stack), FS, and GS.

Segment registers address a section ofmemory in a program. A segment is either64K in length (real mode) or up to 4G inlength (protected mode).

All code (programs) reside in the codesegment.



Real Mode Memory Addressing

Real mode memory is the first 1M of the memorysystem.

All real mode addresses are a combination of a

segment address plus an offset address. The segment address (16-bits) is appended with

a 0H or 00002 to form a 20-bit address. (ormultiplied by 10H)

The effective address is this 20-bit segmentaddress plus a 16-bit offset address.



Defaults

Default 16-bit addresses are programs in CS, stack datain SS, and most other data in a program in DS.

Default 32-bit addresses are programs in CS, stack datain SS and most other data in DS.

Whats the difference? 16-bit addresses use offsetaddresses in BX, SI, DI, BP, or an offset numeric value.32-bit addresses use offset addresses in EAX, EBX,ECX, EDX, EBP, EDI, ESI or a numeric value.

Programs resides in segment CS addressed by IP/EIP

Stack data resides segment SS addressed by SP/ESP



Effective Address Calculations

EA = segment x 10H plus offset

(a) 10023 = 10000 + 0023

(b) ABC34 = AAF00 + 0134(c) 21FF0 = 12000 + FFF0

Example (a) contained 1000 in the segment

register, example (b) contained a AAF0 inthe segment register, and example (c)contained a 1200 in the segment register.


15/15 2006 Pearson Education Upper Saddle River NJ 07458 All Rights ReservedBrey: The Intel Microprocessors 7e

Relocation

Segment and offset addressing allows foreasy and efficient relocation of code anddata.

To relocate code or data only the segmentnumber needs to be changed. Forexample, if an instruction appears at offsetaddress 0002 the segment address doesnot matter because if it changes so doesthe effective address of he instruction.

chapter2 7edi

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