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Copyright 1999-2001, Kip R. Irvine. All rights reserved. Chapter 2: Hardware and Software Architecture Slides to Accompany Assembly Language for Intel-Based Computers, Third Edition

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Page 1: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Chapter 2: Hardware and Software Architecture

Slides to Accompany

Assembly Language for Intel-Based Computers,

Third Edition

Page 2: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Simplified CPU Design

Data Registers

Address Registers

ControlUnit

ArithmeticLogic Unit

StatusFlags

Address Bus

Data Bus

Memory

Page 3: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

CS

SS

DS

ES

Segment

BP

Index

SP

SI

DI

AH

BH

CH

DH DL

CL

BL

AL

General Purpose

Status and Control

Flags

IP

AX

BX

CX

DX

Intel 16-bit Registers

Page 4: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

x

BitPosition

15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0x x O D I T S Z x A x P x Cx

= Overflow = Direction = Interrupt = Trap = undefined

ODITx

= Sign = Zero = Auxiliary Carry = Parity = Carry

SZAPC

Flags Register

Each flag corresponds to a single bit in the Flags register.

Page 5: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

16-Bit Register Set(Intel 8086, 8088, 80286)

• Data Registers– AX,BX,CX,DX,AL,AH,BL,BH,CL,CH,DL,DH

• Segment Registers– CS (code), DS (data), SS (stack), ES (extra data)

more...

Page 6: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

16-Bit Register Set

• Index Registers– BP (base pointer), SP (stack pointer), SI (source

index), DI (destination index)

• Instruction Pointer (IP)

• Flags Register– Status: (overflow, sign, zero, carry, parity,

aux.carry)

– Control: (direction, interrupt, trap)

Page 7: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Instruction Execution Cycle

• Fetch the next instruction– place in queue– update program counter

• Decode the instruction– perform address translation– fetch operands

• Execute the instruction– perform required operation– store the results in memory and/or registers– update status flags attached to CPU

more...

Page 8: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Instruction Execution Cycle

I-1 I-2 I-3 I-4

PC Program (RAM)

I-1Instruction

Queue

op1op2Data

(RAM)

fetch

ALU

registers

store the output

decode

execute

Page 9: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

32-bit Register Set (Intel386, Intel486, Pentium)

CS

SS

DS

ES

Segment

IndexGeneral Purpose

Status and Control

Flags

IP

EAX

EBX

ECX

EDX

EFLAGS

EIP

AX

BX

CX

DX

FS

GS

data

code

stack

31 0BPEBP

SPESP

ESI

EDI

SI

DI

Page 10: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

(Availible RAM fortransient programs)

Interrupt Vector Table

DOS Data Area

Software BIOS

DOS Kernel, Device Drivers, Etc.

Resident part of COMMAND.COM

Transient part of COMMAND.COM

Video Graphics Buffer

MDA Text Buffer

Color Text Buffer

Reserved

ROM BIOS

(end of address space)

00000

00400

9FFFF

A0000

B0000

B8000

C0000

F0000

FFFFF

Address

640K RAM

Map of the First Megabyte of PC Memory

Page 11: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Offset(Segment 0400)

Description

0000 - 00070008 – 000F0010 - 001100120013 – 00140015 – 00160017 – 00180019001A – 001B001C – 001D001E – 003D003E – 00480049004A – 004B004C – 004D004E – 004F0050 – 005F0060006100620063 - 0064006500660067 – 006B006C – 0070

Port addresses, COM1 – COM4Port addresses, LPT1 – LPT4Installed hardware listInitialization flagMemory size, in KbytesMemory in I/O channelKeyboard status flagsAlternate key entry storageKeyboard buffer pointer (head)Keyboard buffer pointer (tail)Keyboard typeahead bufferDiskette data areaCurrent video modeNumber of screen columnsRegen buffer length, in bytesRegen buffer starting offsetCursor positions, video pages 1 - 8Cursor end lineCursor start lineCurrently displayed video page numberActive display base addressCRT mode register (MDA, CGA)Register for CGACassette data areaTimer data area

Map of the BIOS Data Area

Page 12: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Segmented Memory Architecture(real mode)

• A segment addresses 64K of memory

• A segment register contains the starting location of a segment– the absolute location of a segment can be

obtained by appending a hexadecimal zero

• An offset is the distance from the beginning of a segment to a particular instruction or variable

Page 13: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Segmented Memory Architecture

Page 14: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Example Using Index Register

Logical address (segment/of f set)

OA16 0005

EPROM

(unused)

DRAM

(X 16)

DS SI

1 MB

0A165

0A160

00000

Page 15: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Intel Microprocessor Family

• Intel 8080– 8-bit registers, 8-bit external data path– addresses 64K memory

• Intel 8086– 16-bit registers, 16-bit external data path– addresses 1MB memory– supports real mode

• Intel 8088– identical to 8086, except with 8-bit external

data path

Page 16: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Intel Microprocessor Family

• Intel 8087 coprocessor– executes only floating-point instructions

• Intel 80286– addresses 16MB of memory

– supports real mode and protected mode

• Intel 80287 coprocessor– executes only floating-point instructions

Page 17: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Intel Microprocessor Family

• Intel386 (Intel 80386)– 32-bit registers, 32-bit external data path

– addresses 4GB of memory

– supports real mode, protected mode and virtual mode

Page 18: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Intel Microprocessor Family

• Intel486– parallel instruction execution, modeled after

competing RISC processors

– integrated floating-point unit

– internal 8K high-speed cache

Page 19: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Intel Microprocessor Family

• Intel Pentium (Intel586)– early 90MHz model was at least 90% faster

than Intel486

– superscalar architecture (two instruction pipelines)

– 64-bit internal data path

– 16K internal cache (8K data, 8K code)

Page 20: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Intel Microprocessor Family

• Intel Pentium II– 500 MHz clock speeds

– branch prediction logic

– out-of-order instruction execution

– larger internal cache

Page 21: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Types of Memory

• ROM (read-only memory)– used for BIOS (basic input-output system)

– write-once memory

– EPROM can be erased with ultraviolet light

• Static RAM (random access memory)– may be rewritten unlimited number of times

– requires no refresh signal

• Dynamic RAM– must be refreshed constantly

– cheaper than static RAM

Page 22: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Cache Memory

• Holds the most recently used instructions and data– faster access than conventional memory

• Level-1 cache: Inside the CPU

• Level-2 cache: Connected to the CPU– usually 256K to 1MB

Page 23: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Conventional Memory

• SDRAM – Synchronous Dynamic Random-Access Memory

• Slower than CPU registers and cache memory– limited by the bus cycle speed– travels greater distances– requires freuqent refreshes

Page 24: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Video Memory

• VRAM (video RAM)– located on video controller.

– dual-ported, allowing continuous refresh while writing new data

• WRAM (windows graphics RAM)– optimized for video graphics, better than VRAM

• SGRAM (synchronous graphics RAM)– used on video accelerator cards

– suited to 3D applications

Page 25: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Secondary Storage Devices

• Fixed disk (up to 100GB)

• 1.44MB diskette drive

• 600MB CDROM drive

• Removable disks (magnetic or optical)

• Magnetic tape backup (sequential storage)

Page 26: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Fixed Disk Controllers

• IDE (intelligent drive electronics)– usually two connectors on the motherboard

– each cable supports master and slave drive

• EIDE (enhanced IDE)– supports more than two drives, & CDROM

– originally up to 8GB drives

• SCSI (small computer system interface)– intelligent controller for multiple drives

– for high performance drives

Page 27: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Input-Output Ports

• Serial– sends one bit at a time

– used for telephone modems

• Parallel– sends 8, 16, 32, or 64 bits at a time

– unidirectional or bidirectional

• USB (universal serial bus)– intelligent connector, bidirectional

– supports plug-and-play installation of up to 128 devices (with USB hub)

Page 28: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

DEBUG Examples

Experimenting with the Carry, Overflow, Sign, and Zero flags

Page 29: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Essential Status Flags

• Zero– set if the result of the last operation was equal to

zero

• Carry– set if the result of the last unsigned arithmetic

operation generated an invalid value

• Sign– set if the result of the last operation was negative

• Overflow– set if the result of the last signed arithmetic

operation generated an invalid value

Page 30: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

DEBUG Flag Mnemonics

• Carry flag: CY=set, NC=clear

• Overflow flag: OV=set, NV=clear

• Sign flag: NG=set, PL=clear

• Zero flag: ZR=set, NZ=clear

Page 31: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Testing the Carry Flag

0100 mov ax,FFFF0103 add ax,1 ; CY, AX=00000106 sub ax,1 ; CY, AX=FFFF

Adding 1 to FFFF sets the Carry flag because the unsigned sum is too large for the 16-bit register. Subtracting 1 from 0000 also sets the Carry flag because the unsigned result cannot be equal to -1.

Page 32: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Testing the Carry Flag

0100 mov ax,23FF0103 add al,1 ; CY, AX=23000106 sub ax,1 ; NC, AX=22FF

Adding 1 to FF in AL sets the Carry flag because the unsigned sum is too large for the 8-bit register. Subtracting 1 from 2300 clears the Carry flag because the result (22FF) is still a valid unsigned integer.

Page 33: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Testing the Overflow Flag

0100 mov ax,FFFF0103 add ax,1 ; NV, AX=00000106 sub ax,1 ; NV, AX=FFFF

Adding 1 to -1 (FFFF) in AX clears the Overflow flag because the signed sum (0) is perfectly valid. Subtracting 1 from 0 clears the Overflow flag because the result (-1) is a valid signed result.

Page 34: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Testing the Sign Flag

0100 mov ax,7FFF0103 add ax,1 ; NG, AX=80000106 sub ax,1 ; PL, AX=7FFF

Adding 1 to 7FFF in AX sets the Sign flag because the sum in AX is negative (the high bit equals 1). Subtracting 1 from 8000 returns AX to a positive value, so the Sign flag is cleared.

Page 35: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

Testing the Zero Flag

0100 mov ax,FFFF0103 add ax,1 ; ZR, AX=00000106 add ax,1 ; NZ, AX=0001

Adding 1 to FFFF in AX sets the Zero flag because the sum in AX is 0000. Adding 1 to 0000 clears the Zero flag because the sum (0001) is not equal to Zero.

Page 36: Chap 02[1]

Copyright 1999-2001, Kip R. Irvine. All rights reserved.

The End