ch06b functions of combinational logic.pdf

29
FUNCTIONS OF COMBINATIONAL LOGIC (DECODER & MUX EXPANSION) Lecture 8 Digital Design Dr. PO Kimtho Department of Computer Sciences Norton University (NU)

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Page 1: Ch06b Functions of Combinational Logic.pdf

FUNCTIONS OF COMBINATIONAL LOGIC

(DECODER & MUX EXPANSION)

Lecture 8

Digital Design

Dr. PO Kimtho

Department of Computer Sciences

Norton University (NU)

Page 2: Ch06b Functions of Combinational Logic.pdf

Topic Outlines

Encoder

Decoder

Multiplexers (MUX)

Demultiplexers (DEMUX)

Page 3: Ch06b Functions of Combinational Logic.pdf

Topic Outlines

Encoder

Decoder

Multiplexers (MUX)

Demultiplexers (DEMUX)

Page 4: Ch06b Functions of Combinational Logic.pdf

Decoders Expansion

When a certain decoder size is needed, but only smaller

number of sizes is available.

Combine 2 or more decoders in a hierarchy, i.e. cascade the

smaller decoders to form a larger decoder size.

Page 5: Ch06b Functions of Combinational Logic.pdf

Example: A 3-to-8 Decoder Constructed with Two 2-to-4 Decoders

Decoder Expansion

Page 6: Ch06b Functions of Combinational Logic.pdf

Decoder Expansion

The Operation

The MSB input, A2, functions: • As enable, EN, of one decoder

• As its complement, EN to the other decoder

When A2=0, • Top decoder enabled Generates minterms D0 to D3.

• Lower decoder disabled Outputs equal to 0.

When A2=1, • Top decoder disabled Outputs equal to 0.

• Lower decoder enabled Generates minterms D4 to D7.

Page 7: Ch06b Functions of Combinational Logic.pdf

Decoder Expansion

The function of EN input

Very useful and convenient way to interconnect 2 or

more functional blocks

For the purpose of expanding digital functions into:

Similar functions with more inputs and

outputs.

Page 8: Ch06b Functions of Combinational Logic.pdf

Decoder Expansion

For an addition of X, Y, and Z (as Cin), the S and Cout

expression are as follows:

S(X,Y,Z) = m (1, 2, 4, 7)

C(X,Y,Z) = m (3, 5, 6, 7)

So, there are 3 inputs and 8 minterms

Use a 3-to-8 decoder.

Example: Implementing a Binary Adder Using a Decoder

Page 9: Ch06b Functions of Combinational Logic.pdf

Implementing a Binary Adder Using a Decoder - The logic circuit

Decoder Expansion

Page 10: Ch06b Functions of Combinational Logic.pdf

Multiplexers (MUX)

MUX is a device that allows digital information from several sources to be routed onto a single line for transmission

It is made up of several data-input lines and a single output line. It also has data-select inputs which permits digital data on any one of the inputs to be switched to the output line.

MUX is also known as data selectors

Logic symbol for a 4-input multiplexer (4:1 MUX)

n select inputs

1 data output

2n data inputs

Page 11: Ch06b Functions of Combinational Logic.pdf

2:1 MUX

Multiplexers (MUX)

Data selector SELECT input code determines which input is transmitted to output Z.

Page 12: Ch06b Functions of Combinational Logic.pdf

DATA-SELECT INPUTS INPUT

SELECTED S0 S1

0 0 D0

0 1 D1

1 0 D2

1 1 D3

If a binary 0 (S0=0 and S1=0) is applied to the data-select lines, the data on input D0 appear on the data-output line

2 data-select lines means that

any one of the 4 data-input lines

can be selected

4-to-1

MUX

S0

Z D1

D0

S1

D3

D2

D0

D1

D2

D3 S1 S0

Z

4:1 MUX

Multiplexers (MUX)

Page 13: Ch06b Functions of Combinational Logic.pdf

Total expression for the data output is:

013012011010 SSDSSDSSDSSDY

Logic diagram for 4:1 MUX

4:1 MUX

Multiplexers (MUX)

Page 14: Ch06b Functions of Combinational Logic.pdf

Question 3

Construct an 8:1 multiplexer using block diagram.

8 input lines means there must be 3 data select lines.

Multiplexers (MUX)

Page 15: Ch06b Functions of Combinational Logic.pdf

Multiplexers (MUX)

Another design option for 8:1 mux

Using construction of larger multiplexers from smaller ones.

16-to-1 MUX: 74150

Page 16: Ch06b Functions of Combinational Logic.pdf

8-to-1-Line Multiplexer

Page 17: Ch06b Functions of Combinational Logic.pdf

16-to-1-Line Multiplexer

Page 18: Ch06b Functions of Combinational Logic.pdf

Multiplexers (MUX)

A multiplexer is basically a decoder that includes the OR

gate within the block.

To implement a Boolean function of n variables with a

mux having n selection inputs and 2n data inputs, one for

each minterm.

The minterms are generated in a mux by the circuit associated

with the selection inputs.

Individual minterms can be selected by the data inputs.

Implementing a Boolean Function with a MUX

Page 19: Ch06b Functions of Combinational Logic.pdf

Multiplexers (MUX)

Another method (more efficient way)

Implementing a Boolean function of n variables with a mux

having only n-1 selection inputs and 2n-1 data inputs.

Implementing a Boolean Function with a MUX

Page 20: Ch06b Functions of Combinational Logic.pdf

Multiplexers (MUX)

General procedure:

1. Produce Truth Table for Boolean function.

2. The first n-1 variables are applied to the selection inputs of

the mux.

3. The remaining single variable of the function is used for the

data input.

4. For each combination of the selection variables, we

evaluate the output as a function of the last variable, i.e. a

0, 1, the variable or its complement.

5. These values are then applied to the data inputs in the

proper order.

Implementing a Boolean Function with a MUX

Page 21: Ch06b Functions of Combinational Logic.pdf

Example Implement F (X,Y,Z) = m (1, 2, 6, 7) using 4:1 MUX

Multiplexers (MUX)

Page 22: Ch06b Functions of Combinational Logic.pdf

Example Implement F (A, B, C, D) = m (1, 3, 4, 11, 12, 13, 14, 15) using 8:1 MUX

Multiplexers (MUX)

Page 23: Ch06b Functions of Combinational Logic.pdf

MUX Application Example

74157- consists of four

separate 2-input multiplexers

Content-selector Display

Page 24: Ch06b Functions of Combinational Logic.pdf

Demultiplexers (DEMUX)

DEMUX reverse the multiplexing functions

It takes digital information from one line and distributes it to a given number of output lines

DEMUX is also known as data distributor

1-line to 4-line DEMUX

1 data input

n select inputs

2n data outputs

Page 25: Ch06b Functions of Combinational Logic.pdf

Data input is transmitted to only one of the outputs as determined by the select input code.

1-line-to-8-line multiplexer

Page 26: Ch06b Functions of Combinational Logic.pdf

1:4 DEMUX

Demultiplexers (DEMUX)

The expression of every output

Page 27: Ch06b Functions of Combinational Logic.pdf

Question 4:

Construct a 1:4 DEMUX using block diagram. Show the equivalent Truth-Table.

1 - 4

DEMUX

S 0

I 0 Q 1

Q 0

S 1

Q 3

Q 2

1 - 4

DEMUX

S 0

I 0 Q 1

Q 0

S 1

Q 3

Q 2

S0

S1 Q0

Q1

I 0

Q2

Q3

S1 S0 I1 Q3 Q2 Q1 Q0

0 0 1 0 0 0 1

0 1 1 0 0 1 0

1 0 1 0 1 0 0

1 1 1 1 0 0 0

Truth-table

Block diagram

Logic circuit

Demultiplexers (DEMUX)

Page 28: Ch06b Functions of Combinational Logic.pdf

This enables sharing a single communication line among a number of devices.

At any time, only one source and one destination can use the communication line.

Mux-Demux Application: Example

Page 29: Ch06b Functions of Combinational Logic.pdf

Solve this..

Design the following:

16-line-to-4-line encoder using the 8-line-to-3-line

encoder in cascade

A 4:1 MUX using 2:1 MUXes

A 8:1 MUX using 4:1 MUXes

A 1:4 DeMUX using 1:2 DeMUX

A 1:8 DeMUX using 1:4 DeMUX