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ELECTRONICS TELECOM ENTC 419 ENTC 419 Technical Project Management Technical Project Management Electronics and Telecommunications Engineering Technology CAPSTONE DESIGN DOCUMENT

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Page 1: Capstone Design Document.ppt Proceedings/Short Courses/1.1... · • Length and width should be less than 5 inches – Weight – Simple user interface with Prog/diagnostic port

ELECTRONICS TELECOM

ENTC 419ENTC 419

Technical Project ManagementTechnical Project Management

Electronics and Telecommunications

Engineering Technology

CAPSTONE DESIGN DOCUMENT

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Capstone Design Document

• Single point of information for stakeholders• Built over time – iterative process• Updated through revisions• Maintained in notebook – available at all meetings• Elements

– Problem statement– Problem statement– Functional requirements– Conceptual block diagram– Performance requirements– Technology survey assessment– Detailed functional block diagram– Deliverables– Milestones– Gantt Chart– Test Matrix

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Problem Statement

• High-level statement of system need

• Example:

– Locate and display the physical position of a – Locate and display the physical position of a mobile device

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Functional Requirements

– Battery operated and replaceable– Stand-alone, self-contained intelligent unit– attached to anything– Size– Weight– Simple user interface with Prog/diagnostic port– Locates itself anywhere on earth with lat-long with elevation

output– Weather-proof to work in any existing earth-based condition– Store and forward operation– Communicate position via COTS wireless network in pseudo

real-time– Display position information from multiple devices using GIS-

based GUI

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Conceptual Block Diagram

• Depicts requirements in pictorial diagram format

• Supports interaction, discussion and development of performance requirementsdevelopment of performance requirements

• Include all elements of system

• May require multiple diagrams

• Example

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InFoRMS Controller

Power/Status

Signal

Route 1 On Time

HD Radio

Transmitter

InFoRMS

Radio Card

Route 1 On Time

Bus A Message: Route 1 On TimeBus B Message: Route 2 On TimeBus C Message: Route 3 Late

InFoRMA Software

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ELECTRONICS TELECOM

Performance Requirements

• Defines needs for each subsystem to be developed

• Expands on each of the Functional RequirementsRequirements

• Used to transition from Conceptual to Functional block diagram

• Examples

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ELECTRONICS TELECOM

Performance Requirements

– Battery operated• Internal• Replaceable• 24 hours of continuous operation – determines amp-hour rating• External recharge of battery • Voltage = > 3.0Vunregulated input• etc

– Stand-alone, self-contained intelligent unit– Stand-alone, self-contained intelligent unit• Processing power

– 8 or 16-bit processor– programming interface– DI/O – 8 bits– No analog

• Memory– program– storage – 100 messages not non-volatile memory

• Interfaces– User I/F – serial >9.6Kbps– Location Det – serial >9.6Kbps– Wireless Comm – TCP/IP >56Kbps

• Etc

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Performance Requirements

– Attach to wood or metal or cardboard devices that exceed 2x2x2 feet • Remove without destroying• Magnetic or screw mount• Peel-off tape

– Size• Thickness must be less than 2 inches• Length and width should be less than 5 inches

– Weight– Weight– Simple user interface with Prog/diagnostic port– Locates itself anywhere on earth with lat-long output– Weather-proof to work in any existing earth-based condition– Store and forward operation– Communicate position via COTS wireless network in pseudo real-time– Display position information from multiple devices using GIS-based GUI– Cost – Unit 1 fabrication

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Technology Survey Assessment

– Potential solution – minimum of three for each functional requirement

– Pros and cons – related to performance requirements

– Selection – justify– Selection – justify

– Example: Locates itself• GPS

• Inertial Navigation

• StarVision Module

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Detailed Functional Block Diagram

– Depicts chosen technology solutions with• Part numbers

• Interfaces

• Power requirements

• Etc.• Etc.

– Ready to order parts• Requesting samples

– Faster shipping

– Save $$

• Examples

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Input Signal

HD Baseband

ProcessorTexas Instruments DRI250

Analog Front End Texas Instruments

DRI8201

Software Package

HTML/Java ProgramInput – user input

- Device Address- Message Specifications- Message

Output – ASCII Characters via RS232 Serial

RS232

KAMU Hybrid Digital FM

Transmitter

Specified by KAMU90.9 FM Channel

90.9 FM 90.9 FM

LED Marquee

Texas Digital Ethernet

InFoRMS

RS 232

IFTuner

Antenna Tuning C

ontrol Channel

MicroController

Silicon C8051F127easy config utilitySerial capability

InFoRMS Radio Card

Power Supply

Input 12V DC from Automotive BatteryInput 12V DC power block

Regulator

Convert to:Filtered 3.3V DC

Status Panel

Power ButtonReset ButtonLED Status -Power -Link Status

Serial capability

Input – - Serial (for Config)

Output -- Serial- Ethernet

InFoRMSController

Legend

FourTel Designed

Wired Communication

Wireless Communication

Pre-established

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ELECTRONICS TELECOM

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Deliverables

• Something of “Value” to the customer• Interim

– Provided to stakeholders during the project execution

• Final– Provided at the completion of the project

• Description• Description– Detailed

• Timeline– Graphic of due dates for each deliverable and status updated

weekly

• Example:Schematics will be created and submitted for the remote monitor, expansion module,

power inverter, and peripheral interface board. They will be created with the schematic

capture program in Multisim. Schematics will be printed on 8.5 x 11 inch sheets of paper and

may employ subcircuits to achieve this format. Subcircuits will have input and output labels as

well as a meaningful subcircuit title. All symbols created while developing the circuit will be

submitted via the Multisim user database in the softcopy format of the schematic. Additionally,

symbols from OI Analytical’s current library may be used to aid schematic development. This

deliverable will be submitted in both softcopy and hardcopy format. Hardcopy printouts will be

printed in landscape orientation.

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Deliverable Timeline

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Milestones

• An “Event” that indicates significant progress

• Description– Detailed

• Timeline– Graphic of due dates for each milestone and status updated – Graphic of due dates for each milestone and status updated

weekly

• Example:The first milestone is the approval of the completed test plan. The test plan will define

the parameters for passing or failing each piece of hardware and software. It will also set the

structure for collecting test data. Extensive testing will guarantee that the prototype meets all requirements and will ensure the project’s success. This milestone will be completed by

September 7, 2009.DEMONSTRATIONS

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Milestone Timeline

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Gantt Chart

• Graphic representing actual calendar dates for the execution of each task

• Created at the end of the planning process

• Used by TAT members to assess task • Used by TAT members to assess task accomplishment by individual team members

• Example

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Phase Task Name Start Duration

Jan 2008 Feb 2008 Mar 2008 Apr 2008 May 2008

1/13 1/20 1/27 2/3 2/10 2/17 2/24 3/2 3/9 3/16 3/23 3/30 4/6 4/13 4/20 4/27 5/4 5/11

1

2

3

4

12d1/14/2008Research

20d1/18/2008Design and Development

28d1/23/2008Procurement

37d2/4/2008Implementation and fabrication4

5

6

37d2/4/2008Implementation and fabrication

10d4/1/2008Testing

8d4/15/2008User Documentation

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Test Matrix

• Table that relates functional/performance requirements to tests that will be performed

• Each test must satisfy one or more • Each test must satisfy one or more requirements

• All requirements must be tested

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Test Matrix

Comm. SCADA toV SDComm. SCADA toIEB IEBP ow erIn di cati on P osi ti onD etecti on Vi br ati onD etecti on Str ainD etecti on T em per atur eD etecti on

M otor S peedCon tr ol Bl uetooth Comm. Surf aceCar dGen D yn a- Car dGen. D ataP or tabili t y GUI UserIn put

In c l in o m e t e r T e s t s ( 3 ) XA c c e l e r o m e t e r T e s t s ( 3 ) XL o a d C e l l T e s t s ( 2 ) XZ en e r B r e a k d o wn V o l t a g e XOp A m p Cu r r en t t o V o l t a g e X5 V R e g. T e s t s ( 2 ) X3 . 3 V R e g. T e s t s ( 2 ) XCu r r en t T an s m i t t e r T e s t s ( 3 ) XV S D C on t r o l XS C A D A P a c k C on t r o l l in g V S D X XP I C An a l o g In p u t X X XP I C In p u t f r o m C on v e r s i on C i r cu i t X XP I C / S C A D A P a c k C o m m . X XU p d a t e S e t t in g s R e m o t e ly X XS e t U s e r B ou n d r i e s X XS u r f a c e C a r d X XS C A D A r e a d in g S en s o r s ( 2 ) X X X XD o wn h o l e Dy n a- C a r d G en . X X X XD a t a S t o r a g e X