canonical forms and logic miniminization

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1 Canonical Forms and Canonical Forms and Logic Miniminization Logic Miniminization Today: First Hour: Canonical Forms Section 2.2.2 of Katz’s Textbook In-class Activity #1 Second Hour: Incomplete Functions, Introduction to Logic Minimization Section 2.2.4 and 2.2.1 of Katz’s Textbook In-class Activity #2

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Canonical Forms and Logic Miniminization. Today: First Hour : Canonical Forms Section 2.2.2 of Katz’s Textbook In-class Activity #1 Second Hour : Incomplete Functions, Introduction to Logic Minimization Section 2.2.4 and 2.2.1 of Katz’s Textbook In-class Activity #2. - PowerPoint PPT Presentation

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Page 1: Canonical Forms and Logic Miniminization

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Canonical Forms and Canonical Forms and Logic MiniminizationLogic Miniminization

Today:

• First Hour: Canonical Forms– Section 2.2.2 of Katz’s Textbook

– In-class Activity #1

• Second Hour: Incomplete Functions, Introduction to Logic Minimization

– Section 2.2.4 and 2.2.1 of Katz’s Textbook

– In-class Activity #2

Page 2: Canonical Forms and Logic Miniminization

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CanonicalCanonical Forms Forms

• Truth tables uniquely define Boolean functions

• There are two standard (canonicalcanonical) forms for Boolean expressions that derived from the truth table

– Represent the function’s 1s (on-seton-set)called Sum of Products (SOP)Sum of Products (SOP) form

– Represent the function’s 0s (off-setoff-set) called Product of Sums (POS)Product of Sums (POS) form

Page 3: Canonical Forms and Logic Miniminization

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SOP ExpressionsSOP ExpressionsSample truth table

A B C F

0 0 0 0

0 0 1 0

0 1 0 0

0 1 1 11

1 0 0 11

1 0 1 11

1 1 0 11

1 1 1 11

F

11

11

11

0

0

0

0

0

F = A' B C + A B' C' + A B' C + A B C' + A B C

F' = A' B' C' + A' B' C + A' B C'

Page 4: Canonical Forms and Logic Miniminization

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Notion of a Notion of a mintermminterm

• A minterm is 1 for exactly 1 row of the truth table

• A minterm is a product (AND) of all the literals for that row

• A truth table function can be represented in terms of its 1s

• A truth table function can be represented by summing (ORing) its minterms

Page 5: Canonical Forms and Logic Miniminization

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# A B C minterms

0 0 0 0

1 0 0 1

2 0 1 0

3 0 1 1

4 1 0 0

5 1 0 1

6 1 1 0

7 1 1 1

mintermsminterms

Shorthand Shorthand notation notation

for for minterms minterms

of 3 of 3 variablesvariables

A' B' C' = m0

A' B' C = m1

A' B C' = m2

A' B C = m3

A B' C' = m4

A B' C = m5

A B C' = m6

A B C = m7

Page 6: Canonical Forms and Logic Miniminization

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SOP ShorthandSOP ShorthandShorthand notation for SOP expressionsShorthand notation for SOP expressionsShorthand notation for SOP expressionsShorthand notation for SOP expressions

F(A,B,C) = A' B C + A B' C' + A B' C + A B C' + A B C

= m(3,4,5,6,7)

F(A,B,C)' = A' B' C' + A' B' C + A' B C'

= m(0,1,2)

Page 7: Canonical Forms and Logic Miniminization

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F

1

1

1

00

00

00

00

00

A B C F

0 0 0 00

0 0 1 00

0 1 0 00

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

POS ExpressionsPOS ExpressionsSample truth tableSample truth tableSample truth tableSample truth table

F' = (A + B' +C') (A' + B + C)

• (A' + B + C') (A' + B' + C)

• (A' + B' + C')

F = (A + B +C) (A + B + C')

• (A + B' + C)

Page 8: Canonical Forms and Logic Miniminization

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Notion of aNotion of a MaxtermMaxterm

• A Maxterm is 0 for exactly 1 row of the truth table

• A Maxterm is the complement of the corresponding mintermminterm of that row

• A Maxterm is a sum (OROR) of complements of all the row literals

• A truth table function can be represented by its 0s; that is, by a product (ANDANDing) of Maxterms

Page 9: Canonical Forms and Logic Miniminization

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# A B C Maxterms

0 0 0 0

1 0 0 1

2 0 1 0

3 0 1 1

4 1 0 0

5 1 0 1

6 1 1 0

7 1 1 1

MaxtermsMaxterms

Shorthand Shorthand notation notation

for for Maxterms Maxterms

of 3 of 3 variablesvariables

A + B + C = M0

A + B + C' = M1

A + B' + C = M2

A + B' + C' = M3

A' + B + C = M4

A' + B + C' = M5

A' + B' + C = M6

A' + B' + C' = M7

Page 10: Canonical Forms and Logic Miniminization

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POS Shorthand POS Shorthand

A B C F

0 0 0 00

0 0 1 00

0 1 0 00

0 1 1 1

1 0 0 1

1 0 1 1

1 1 0 1

1 1 1 1

F

11

11

11

0

0

0

0

0

Shorthand notation for POS expressionsShorthand notation for POS expressionsShorthand notation for POS expressionsShorthand notation for POS expressions

F(A.B.C) = (A + B +C) • (A + B + C') (A + B' + C)

= M(0,1,2)

F(A,B,C)' = (A + B' +C')• (A' + B + C) (A' + B +C') • (A' + B' + C) (A' + B' + C')

= M(3,4,5,6,7)

Page 11: Canonical Forms and Logic Miniminization

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Canonical ConversionsCanonical Conversions

SOPSOP POSPOS

Complementary relations between Complementary relations between mintermsminterms & & MaxtermsMaxtermsComplementary relations between Complementary relations between mintermsminterms & & MaxtermsMaxterms

F(A,B,C) = m(3,4,5,6,7) = M(0,1,2)

F'(A,B,C) = m(0,1,2) = M(3,4,5,6,7)

Page 12: Canonical Forms and Logic Miniminization

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Do Activity #1 NowDo Activity #1 Now• Reference:

–Section 2.2.2 of Katz’s Textbook

Page 13: Canonical Forms and Logic Miniminization

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Incomplete FunctionsIncomplete Functions

• Don’t cares

– Outputs associated with inputs that can be ignored

– These inputs CANNOT happen in a good design

– Assign logic values to these outputs to simplify circuits

• Example: – Binary Coded Decimal (BCD)

Page 14: Canonical Forms and Logic Miniminization

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BCD NumbersBCD Numbers # A B C D 0 0 0 0 0 1 0 0 0 1 2 0 0 1 0 3 0 0 1 1 4 0 1 0 0 5 0 1 0 1 6 0 1 1 0 7 0 1 1 1 8 1 0 0 0 9 1 0 0 1x A 1 0 1 0x B 1 0 1 1 x C 1 1 0 0x D 1 1 0 1x E 1 1 1 0 x F 1 1 1 1

Not decimal!

Not a valid input!

Cannot happen!

Decimal

numbers

Page 15: Canonical Forms and Logic Miniminization

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Shorthand RepresentationShorthand RepresentationShorthand RepresentationShorthand Representation

Don’t Cares & Canonical FormsDon’t Cares & Canonical Forms

Representation of “D” in BCDRepresentation of “D” in BCD

D(A,B,C,D) = m1 + m3 + m5 + m7 + m9

+ d11 + d13 + d15

= [m(1,3,5,7,9) + d(11,13,15) ]

D(A,B,C,D) = M0 • M2 • M4 • M6 • M8 • D10 • D12 • D14

= [M(0,2,4,6,8) • D(10,12,14) ]

Page 16: Canonical Forms and Logic Miniminization

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Logic Minimization Logic Minimization • Minimization is the process of reducing a

complex logic expression or equation into a simpler form with fewer terms by removing redundancies and terms having no effect on the output.

• This is similar to simplifying and reducing complex algebraic expressions by combining and collecting like terms.

• As in algebraic reduction, rules must be followed that guarantee the value of the expression is not changed by the simplification.

Page 17: Canonical Forms and Logic Miniminization

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Variables & LiteralsVariables & Literals

Variable: each input variable or its complement in an expression

Literal: each appearance of a variable or its complement in an expression

Variable: each input variable or its complement in an expression

Literal: each appearance of a variable or its complement in an expression

Used to measure complexityUsed to measure complexityUsed to measure complexityUsed to measure complexity

Example

Variables = A, B, C

Literals = 3 + 2 + 3 + 2 = 10

Z = A B C + A B + A B C + B CZ = A B C + A B + A B C + B C

Page 18: Canonical Forms and Logic Miniminization

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Rationale for Logic Rationale for Logic MinimizationMinimizationReduce complexity of the gate level implementationReduce complexity of the gate level implementation

• reduce number of literals (gate inputs)

• reduce number of gates

• reduce number of levels of gates

• reduce number of literals (gate inputs)

• reduce number of gates

• reduce number of levels of gates

• fewer inputs implies faster gates in some technologies

• fan-ins (number of gate inputs) are limited in some technologies

• fewer levels of gates implies reduced signal propagation delays

• minimum delay configuration typically requires more gates

• number of gates (or gate packages) influences manufacturing costs

Page 19: Canonical Forms and Logic Miniminization

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TradeoffsTradeoffs

• Time and Space Trade-Offs

•Traditional methods:

•reduce delay at expense of adding gates

•New methods:

•trade off between increased circuit delay and reduced gate count

• Power Savings

Page 20: Canonical Forms and Logic Miniminization

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Two-Level Realization(inverters don't count)

Multi-Level RealizationAdvantage: Reduced Gate

Fan-ins

Complex Gate: XORAdvantage: Fewest Gates

0 1 0 1 0 1

A B C

0

0

Z 1

Z 2

Z 3

0

A 0 0 0 0 1 1 1 1

B 0 0 1 1 0 0 1 1

C 0 1 0 1 0 1 0 1

Z 0 1 0 1 0 1 1 0

Alternative Gate RealizationsAlternative Gate Realizations

Page 21: Canonical Forms and Logic Miniminization

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Minimization ExampleMinimization ExampleApply the laws and theorems to simplify Boolean equationsApply the laws and theorems to simplify Boolean equations

Example: full adder's carry out function

Cout = A' B Cin + A B' Cin + A B Cin' + A B Cin

Simplify by minimizing the number terms

Apply: Laws & Theorems 3 and 9, or 1D, 3, 5 and 8

Simplify by minimizing the number terms

Apply: Laws & Theorems 3 and 9, or 1D, 3, 5 and 8

Page 22: Canonical Forms and Logic Miniminization

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Example: full adder's carry out function

Cout = A' B Cin + A B' Cin + A B Cin' + A B Cin

= A' B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin

= (A' + A) B Cin + A B' Cin + A B Cin' + A B Cin

= (1) B Cin + A B' Cin + A B Cin' + A B Cin

= B Cin + A B' Cin + A B Cin' + A B Cin + A B Cin

= B Cin + A (B' + B) Cin + A B Cin' + A B Cin

= B Cin + A (1) Cin + A B Cin' + A B Cin

= B Cin + A Cin + A B (Cin' + Cin)

= B Cin + A Cin + A B (1)

= B Cin + A Cin + A B

Simplifying EquationsSimplifying Equations

[8]

[5]

[1D]

[3]

[5]

[1D]

Alternative

[9]

[9]

[9]

[3]

[8]

[5]

[1D] [8]

NOTE: Minimization is just an exercise in applying laws of Boolean Algebra

learnt earlier!

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Do Activity #2 NowDo Activity #2 NowDue: End of Class Today

RETAIN THE LAST PAGE (#3)!!

For Next Class:• Bring Randy Katz Textbook

• Required Reading:– Sec 2.2.1 & 2.3 (omit 2.3.6) of Katz

• This reading is necessary for getting points in the Studio Activity!