1

Basic Principle of Boost

The boost is a popular non-isolated power stage topology, sometimes called a step-uppower stage. Power supply designers choose the boost power stage because therequired output is always higher than the input voltage. The input current for a boostpower stage is continuous, or non-pulsating, because the output diode conducts onlyduring a portion of the switching cycle. The output capacitor supplies the entire loadcurrent for the rest of the switching cycle.

Figure 1 shows a simplified schematic of the boost power stage. Inductor L andcapacitor C make up the effective output filter. The capacitor equivalent seriesresistance (ESR), RC, and the inductor dc resistance, RL, are included in the analysis.Resistor R represents the load seen by the power supply output.

Figure 1. Boost Power Stage Schematic

A power stage can operate in continuous or discontinuous inductor current mode. Incontinuous inductor current mode, current flows continuously in the inductor duringthe entire switching cycle in steady-state operation. In discontinuous inductor currentmode, inductor current is zero for a portion of the switching cycle. It starts at zero,reaches peak value, and return to zero during each switching cycle. It is desirable for apower stage to stay in only one mode over its expected operating conditions becausethe power stage frequency response changes significantly between the two modes ofoperation.

2

Boost Steady-State Continuous Conduction Mode (CCM)In continuous conduction mode, the boost power stage assumes two states perswitching cycle. In the on state, Q1 is on and D1 is off. In the off state, Q1 is off andD1 is on. A simple linear circuit can represent each of the two states where theswitches in the circuit are replaced by their equivalent circuit during each state. Figure2 shows the linear circuit diagram for each of the two states.

Figure 2. Boost Power Stage States

The duration of the on state is DTs=TON, where D is the duty cycle set by thecontrol circuit, expressed as a ratio of the switch on time to the time of one completeswitching cycle, Ts . The duration of the off state is TOFF.

3

Figure 3. CCM Boost Power Stage Waveforms

Refer to Figures 1 and 2. The inductor-current increase can be calculated by using aversion of the familiar relationship:

The inductor current increase during the on state is given by:

The quantity IL(+) is the inductor ripple current. During this period, all of the outputload current is supplied by output capacitor C.

TL

VIdtdiLV LLLL ==

ONLLQi

L TLRIVV

I +=+ )()(

4

The inductor current decrease during the off state is given by:

The quantity IL(-) is also the inductor ripple current.In steady-state conditions, the current increase, IL(+), during the on time and thecurrent decrease, IL(-), during the off time are equal. Therefore, these two equationscan be equated and solved for VO to obtain the continuous conduction mode(CCM)boost voltage conversion relationship:

And,

The steady-state equation for VO is:

*Notice that in simplifying the above, TON+TOFF is assumed to be equal to Ts. This is true only for

CCM mode.

The above voltage conversation relationship for VO illustrates that VO can beadjusted by adjusting the duty cycle, D, and is always greater than the input because Dis a number between 0 and 1. A common simplification is to assume VQ, Vd, andRL are small enough to ignore. The above equation simplifies considerably to :

A simplified, qualitative way to visualize the circuit operation is to consider theinductor as an energy storage element. When Q1 is on, energy is added to the inductor.When Q1 is off, the inductor and the input voltage source deliver energy to the outputcapacitor and load. The output voltage is controlled by setting the on time of Q1. Forexample, by increasing the on time of Q1, the amount of energy delivered to theinductor is increased. More energy is then delivered to the output during the off timeof Q1 resulting in an increase in the output voltage.

OFFiLLdO

L TLVRIVVI ++= )()(

)()1()(OFF

ONQd

OFF

ONLLiO T

TVVTTRIVV +=

S

ON

OFFON

ON

TT

TTTD =+= S

OFF

TTD = )1(

DDVV

DRIVV QdLLiO

=11

DVV iO = 1 iO IDI = )1(

5

To relate the inductor current to the output current, refer to Figure 2 and 3. Note thatthe inductor delivers current to the output only during the off state of the power stage.This current averaged over a complete switching cycle is equal to the output currentbecause the average current in the output capacitor must be equal to zero.The relationship between the average inductor current and the output current for theCCM mode is given by:

Boost Steady-State Discontinuous Conduction Mode (DCM)Figure 4 shows the inductor current condition where the power stage is at theboundary between continuous and discontinuous mode. This is where the inductorcurrent just falls to zero and the next switching cycle begins immediately after thecurrent reaches zero. From the charge and discharge of output capacitor, the outputcurrent is given by:

Figure 4. Boundary Between Continuous and Discontinuous Mode

Further reduction in output load current puts the power stage into discontinuouscurrent conduction mode(DCM). The discontinuous mode power stage input-to-output relationship is quite different from the continuous mode.

=== DIIIDI

TTI OAvgLOAvgL

S

OFFAvgL 1

)1( )()()(

( )DIITITTI OPKOFFPKOFFONO

==+12

2

6

Figure 5. Discontinuous Current Mode

The duration of the on state is TON=DTS, where D is the duty cycle set by thecontrol circuit. The duration of the off state is TOFF=D2TS. The idle time is theremainder of the switching cycle and is given as TS-TON-TOFF= D3TS. Thesetimes are shown with the waveforms in Figure 6.The inductor current increase during the on state is given by:

The ripple current magnitude, IL(+), is also the peak inductor current, Ipk, becausein discontinuous mode. The current starts at zero each cycle.The inductor current decrease during the off state is given by:

As in the continuous conduction mode case, the current increase, IL(+), during theon time and the current decrease during the off time, IL(-), are equal. So,

PKSi

ONi

L ITDLVT

LVI ===+ )(

SiO

OFFiO

L TDLVVT

LVVI == 2)(

22

DDDV

TTTVV i

OFF

OFFONiO

+=+=

7

Figure 6. Discontinuous Mode Boost Power Stage Waveforms

Now calculate the output current. It is the average over the complete switching cycleof the inductor current during the D2 interval.

)221(1 SPK

s

OO TDITR

VI ==

LTDDV

TDTDLVi

TRVI

Si

SSS

OO

=

==

22

2)(211

8

Now solve two equations, IO and VO, the discontinuous conduction mode boostvoltage conversion relationship is given by:

Where K is defined as:

Critical InductanceThe previous analyses for the boost power stage have been for continuous anddiscontinuous conduction modes of steady-state operation. The conduction mode of apower stage is a function of input voltage, output voltage, output current, and thevalue of the inductor. A boost power stage can be designed to operate in continuousmode for load currents above a certain level usually 5 to 10% of full load. Usually, theinput voltage range, output voltage, and load current are defined by the power stagespecification. This leaves the inductor value as the design parameter to maintaincontinuous conduction mode.The minimum value of inductor to maintain continuous conduction mode can bedetermined by the following procedure.First, define IOB as the minimum output current to maintain continuous conductionmode, normally referred to as the critical current. This value is shown in Figure 4. Inboundary between CCM and DCM,

The worst case condition for the boost power stage is at an input voltage equal to one-half of the output voltage because this gives the maximum IL

2

4112

KD

VV iO

++=

STRLK

= 2

)1( DVV Oi = )1(2 DD =

LTDDV

LTDDVI SOSiOB

==

2)1(

22 2

OB

SO

ITDDV

L

2)1( 2

min

OB

SO

ITVL

16min

)1( = MMKD

i

O

VVM =

9

Output CapacitorIn switching power supply power stages, the function of output capacitor is to storeenergy. The output capacitance for a boost power stage is generally selected to limitoutput voltage ripple to the level required by the specification. The series impedanceof the capacitor and the power stage output current determine the output voltage ripple.The three elements of the capacitor that contribute to its impedance (and outputvoltage ripple) are equivalent series resistance (ESR), equivalent series inductance(ESL), and capacitance (C). The voltage variation due to the inductor current flow inthe output capacitor is approximately:

For CCM Mode:

For DCM Mode

)(2

2

INdO

PKO VVVC

LIV +=

OS

O

VfDIC

maxmax

os

sO

VfTRLI

C

21(max)

10

The above equation is based on the assumption that all inductor ripple current flowsthrough the capacitor and the ESR is zero. Now, assuming that the capacitor is verylarge, the ESR needed to Limit the ripple to VOmax is:

For CCM Mode:

For DCM Mode:

*The output filter capacitor should be rated at least 10~20 times the calculatedcapacitance and 30 to 50 percent lower than the calculated ESR.

The RMS value of the ripple current flowing in the output capacitance(CCM) is givenby:

PK

O

O

Max

O

O

IV

ID

IV

ESR max(max)

max

)21

(

=+

PK

O

O

O

IV

IV

ESR maxmax=

DDII OCRMS = 1

11

Synchronous Rectifier

Synchronous rectification allows for high efficiency by reducing the losses associatedwith the Schottky rectifiers.

The Schottky rectifier D1 conducts during the time that MOSFET Q2 is on, whichimproves efficiency by pre-venting the synchronous-rectifier MOSFET Q2 loss bodydiode from conducting.

12

Boost DC/DC Converter Small Signal Model (Transfer Function):

)1

)(()()1

)(()()

1(1)()(

TsZsi

TsGV

sVT

TH

sVsV OUTloadg

grefO ++++=

gainloopV

sGVsGsHsTM

dC == )()()()(

13

For CCM Mode:

* Two Pole fLC , One Zero fESR for GVd(s) and One Right-Half-Plane zero

( )

++

+

= 200

212

1

11

1)(

ws

Qws

ws

ws

DV

sGV ZZgd

( )

++

= 200

2

1

11

1)(

ws

QwsD

sGVg

++

++

= 200

2

111

1

1)(

ws

Qws

ws

Qws

RsZ eqOUT

)(1

0

C

L

RRCLR

wQ

++=

LCD

RRDR

LCw L )1()1(1

2

0+=

CRw

CZ

11 = ( )

LRD

LRRDw LZ

22

2)1(1 =

( ) CLeq RDD

DRR

+= 11 2 Ceq

RR

LCDw = 11

CRRD

LQwC

eq

+=

2

11

)1(

1

14

z From a practical view, at RHP zero frequency, the loop gain starts increasing at a20dB/decade rate but the loop phase decreases by 45 degrees (in a normal, LHPzero, the loop phase will increase by +45 degrees). This imposes the restrictionthat the gain be rolled off to 0dB before encountering the RHP zero.

z The output inductor, capacitor and the capacitors ESR must be selected so thatthe double pole occurs first and then the output capacitor zero and then the RHPzero. This assures that the loop gain crosses 0dB at a slope that is first order(20dB/decade) and that the instability inherently associated with the RHP zero iscircumvented by crossing 0dB before the RHP zero frequency occurs.

For DCM Mode:

+=

P

Od

wsM

MD

VsGV

1

112

12)(

g

O

VV

M =RCM

MwP )1(12

=

Compensate rule:

1. Decrease the double pole influence. LCrcompensatoZ ff 43

)(

2. Crossover frequency fC SCESRC ffff )61~

101(