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Review of IEDM 2010Conference

Susan Felch

February 2, 2011

Ion Beam ServicesRue Gaston Imbert prolongéeZI Peynier Rousset13790 PEYNIERFrance

Ph : +33 4 42 53 89 53Fx : +33 4 42 53 89 59www.ion-beam-services.cominformation@ion-beam-services.fr

2

From The Future Si Technology Perspective:Challenges and Opportunities, Dr. Kinam Kim,Samsung

Key technologies for the future Si CMOS era

Example of vertical NAND structures

3

Non-Planar, Multi-Gate InGaAs Quantum Well Field Effect Transistorswith High-K Gate Dielectric and Ultra-Scaled Gate-to-Drain/Gate-to-Source Separation for Low Power Logic Applications, Intel

4

Self-aligned III-V MOSFETs heterointegrated on a 200 mm Sisubstrate using an industry standard process flow, Sematech

5

Self-aligned metal Source/Drain InxGa1-xAs n-MOSFETs using Ni-InGaAs alloy, University of Tokyo

6

Physical Origin of pFET Threshold Voltage Modulationby Ge Channel Ion Implantation (GC-I/I), Toshiba &IBM

7

Work-function Engineering in Gate First Technologyfor Multi-VT Dual-Gate FDSOI CMOS on UTBOX, CEA-LETI & STMicroelectronics

Ground plane implants are In+

and As+

8

Novel Stress-Memorization-Technology (SMT) for HighElectron Mobility Enhancement of Gate Last High-k/Metal Gate Devices, Samsung

9

Contact Resistance Reduction to FinFET Source/DrainUsing Dielectric Dipole Mitigated Schottky BarrierHeight Tuning, Sematech

10

Strained SiGe and Si FinFETs for High PerformanceLogic with SiGe/Si stack on SOI, Sematech

11

Reliable Single Atom Doping and Discrete DopantEffects on Transistor Performance, Shinada, WasedaUniversity, Japan