reference design irdcip2003a-c - infineon technologies · 2005. 4. 22. · hiccups until short...
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12/03/04
International Rectifier • 233 Kansas Street, El Segundo, CA 90245 USA
RREEFFEERREENNCCEE DDEESSIIGGNN IRDCiP2003A-C
IRDCiP2003A-C: 1MHz, 160A, Synchronous Buck Converter Using iP2003A
Overview This reference design is capable of delivering up to a current of 160A with the enclosed heatsink attached at an ambient temperature of 60ºC with 400LFM or an ambient temperature of 45ºC with 200LFM of airflow. Performance graphs and waveforms are provided in figures 1–9. The figures and table in pages 5 – 8 are provided as a reference design to enable engineers to very quickly and easily design a 4-phase converter. Refer to the data sheet for the controller listed in the bill of materials in order to optimize this design to your specific requirements. A variety of other controllers may also be used, but the design will require layout and control circuit modifications.
Demoboard Quick Start Guide Initial Settings: The output is set to 1.3V, but can be adjusted from 0.8V to 3.3V by changing the voltage divider values of R3 and R32 according to the following formula:
R3 = R32 = (24.9k x 0.8) / (VOUT - 0.8)
The switching frequency per phase is set to 1MHz with the frequency set resistor R4. This creates an effective output frequency of 4MHz. The graph in figure 11 shows the relationship between R4 and the switching frequency per phase. The frequency may be adjusted by changing R4 as indicated; however, extreme changes from the 1MHz set point may require redesigning the control loop and adjusting the values of input and output capacitors. Refer to the SOA graph in the iP2003A datasheet for maximum operating current at different conditions.
Procedure for Connecting and Powering Up Demoboard: 1. Apply input voltage across (+12V) across VIN and PGND. 2. Apply load across VOUT pads and PGND pads. 3. Adjust load to desired level. See recommendations below.
IRDCiP2003A-C Recommended Operating Conditions (refer to the iP2003A datasheet for maximum operating conditions) Input voltage: 5V - 12V1 Output voltage: 0.8 - 3.3V Switching Freq: 1MHz per phase, 4MHz effective output frequency. Output current: This reference design is capable of delivering up to 160A with the enclosed heatsink attached, at an
ambient temperature of 60ºC with 400LFM of airflow, or an ambient temperature of 45ºC with 200LFM of airflow.
1Note: If Vin = 5V, then connect Vin to test point TP3 and Terminal T1 and remove jumper J1. Refer to schematic for details. Additionally, the threshold of the POR circuit should be adjusted to allow the supply to sequence properly.
IRDCiP2003A-C_ ____ _____
www.irf.com 2
0.0
5.0
10.0
15.0
20.0
25.0
30.0
35.0
40.0
45.0
50.0
55.0
0 20 40 60 80 100 120 140 160Output Current (A)
Pow
er L
oss
(W)
70%
71%
72%
73%
74%
75%
76%
77%
78%
79%
80%
81%
82%
83%
84%
85%
86%
0 20 40 60 80 100 120 140 160Output Current (A)
Effic
ienc
y (%
)
Fig. 1: Power Loss vs. Current Fig. 2: Efficiency vs. Current
Fig. 3: Bode Plot
Fig. 4: Input Voltage Ripple Waveform Fig. 5: Output Voltage Ripple Waveform
VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25°C
VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25°C
VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 25°C
Ripple = 90mVp-p Ripple = 7.0mVp-p
Phase Margin = 61° Cross-Over Freq. = 106kHz
VIN = 12V, VOUT = 1.3V IOUT = 160A, fSW = 1MHz TA = 25°C
VIN = 12V, VOUT = 1.3V IOUT = 160A, fSW = 1MHz TA = 25°C
_____________ __IRDCiP2003A-C
3 www.irf.com
98.0%
98.2%
98.4%
98.6%
98.8%
99.0%
99.2%
99.4%
99.6%
99.8%
100.0%
0 20 40 60 80 100 120 140 160
Output Current (A)
Out
put V
olta
ge A
ccur
acy
(%)
Fig. 6: Output Voltage Accuracy vs. Current
Fig. 7: Power Up Waveform Fig. 8: Power Down Waveform
Fig. 9: Short Circuit Condition Waveform
VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25°C
VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 25°C
VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 25°C
Ch. 1: VIN 2V/div
Ch. 2: VOUT 0.5V/div
Ch. 1: VIN 2V/div
Ch. 2: VOUT 0.5V/div
Ch. 1: VOUT 1V/div
Ch. 2: IOUT 50A/div
VIN = 12V VOUT = 1.3V fSW = 1MHz TA = 25°C
Shortcircuit at start-up
Hiccups until short circuit is removed
IRDCiP2003A-C_ ____ _____
www.irf.com 4
Board Temperature @ 1mm from edge of module:
TPCB (U2): 83.4°C TPCB (U3): 82.7°C TPCB (U4): 82.3°C TPCB (U5): 79.2°C
Board Temperature @ 1mm from edge of module:
TPCB (U2): 88.9°C TPCB (U3): 87.5°C TPCB (U4): 87.3°C TPCB (U5): 85.1°C
Fig. 10: Thermal Images With Board and Heatsink Temperatures
*>120.0°C
*<21.3°C
40.0
60.0
80.0
100.0
120.0
*>120.0°C
*<21.3°C
40.0
60.0
80.0
100.0
120.0
VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 45°C
Airflow = 200LFM
Max 70.7°C
Max 78.5°C
VIN = 12V VOUT = 1.3V IOUT = 160A fSW = 1MHz TA = 60°C
Airflow = 400LFM
Airflow direction
Airflow direction
_____________ __IRDCiP2003A-C
5 www.irf.com
Adjusting the Over-Current Limit R5, R7, R8, and R9 are the resistors used to adjust the over-current trip point. The trip point is a function of the controller and corresponds to the per phase output current indicated on the x-axis of Fig. 11. For example, selecting 3.65k resistors will set the trip point of each phase to 66A. (Note: Fig. 11 is based on iP2003A, TJ = 125°C. The trip point will be higher than expected if the reference board is cool and is being used for short circuit testing.)
2.4
2.5
2.6
2.7
2.8
2.9
3.0
3.1
3.2
3.3
3.4
3.5
3.6
3.7
43 45 47 49 51 53 55 57 59 61 63 65 67
Over-Current Trip Point (per Phase)
RIS
EN (k
Ω)
Fig. 11: RISEN vs. Current (per Phase)
10
100
100 1000
Output Frequency (kHz) (per Phase)
R4
(kΩ
)
Fig. 12: R4 vs. Frequency (per Phase)
IRDCiP2003A-C_ ____ _____
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Fig. 13: Component Placement Top Layer
Heatsink Notes:
1) Always use the supplied Berquist Gap PadTM A3000 thermal interface material with heatsink. 2) Torque 5 x #2-56 machine screws to 15 +/-1 in-oz. 3) The heatsink is optimized for 400 LFM with unconfined airflow. Performance will improve with more airflow or confined
airflow. 4) Airflow direction should be parallel to fins for maximum performance.
Fig. 14: Heatsink Specification
_____________ __IRDCiP2003A-C
7 www.irf.com
Fig. 15: Reference Design Schematic
R6 499
1%
C1
560p
F
R1 20k 1
%
R224
.9k 1%
R340
.2k 1%
R4 20k 1
%
C2
10uF
C
15
100uF
C16
100uF
L1
0.3uH
L2
0.3uH
R53.6
5k 1% R7
3.65k
1%
+5V
C3
10uF
C4
10uF
ENA
VSW
1
VSW
2
C5
10uF
TP6
VSW
1
TP7
VSW
2
L3 0.3uH
VSW
3TP
8VS
W3
L4 0.3uH
VSW
4TP
9VS
W4
R93.6
5k 1%R8
3.65k
1%
VOUT
Vin
R10
0 R12 0
R13
0
R11
0
T6 PG
ND
T7 PGND
T8 PGND
TP5
PGOO
D
T5 VOUT
T4 VOUT
T3 VOUT
T1 VIN
TP21
VOUT
S
TP22
PGND
S
VOUT
S
R16
10k 1
%
R17
10k 1
%
R18
10k 1
%
C33
10uF
R19
10k 1
%
VOUT
S
PGND
S
VSEN
6
COMP3
PWM
416
PGOO
D2
ISEN
415
VCC
1
ISEN
114
DROOP4
PWM
113
FB5
PWM
212
FS/E
N7
ISEN
211
GND
8
ISEN
310
PWM
39
U1 ISL6
558C
B
R22
open
+5V
ENA
R24
open
+5V
ENA
R26
open
+5V
ENA
R28
open
R29
openR30
open
+5V
+5V
+5V
C25
15pF
C26
220p
F
Vin
+5V
C34
0.1uF
R31
24.9k
1% R32
40.2k
1%
PRDY
1
PRDY
2
PRDY
3
PRDY
4
C37
0.22u
F
23
1
D1 CMPD
3003
APR
DY3
C38
0.22u
F
PRDY
4
C35
0.22u
F PRDY
1
C36
0.22u
F
PRDY
2
C41
330u
FC
4033
0uF
C39
330u
FT2 PG
ND
23
1
D2 CMPD
3003
A
TP13
VINS
TP17
PGND
S
C42
100uF
C46
10uF
C47
open
R36
open
R35
0
C27
10uF
C28
10uF
Outp
ut2
Adj/Gnd 1
Inpu
t3
U6 LM11
17DT
X-5.0
TP2 A
TP1 B
C64
open
C17
100uF
C18
100uF
C43
100uF
C65
open
C19
100uF
C20
100uF
C44
100uF
C66
open
C21
100uF
C22
100uF
C45
100uF
C67
open
C56
open
C57
open
C48
2.2uF
C49
2.2uF
C6
10uF
C7
10uF
C8
10uF
Vin
C30
10uF
C58
open
C59
open
C50
2.2uF
C51
2.2uF
C9
10uF
C10
10uF
C11
10uF
Vin
C31
10uF
C60
open
C61
open
C52
2.2uF
C53
2.2uF
C12
10uF
C13
10uF
C14
10uF
Vin
C32
10uF
C62
open
C63
open
C54
2.2uF
C55
2.2uF
+5V
+5V
+5V
+5V
21
3D3 LM
431
R38
26.1k
1%
R39
11k 1
%
R37
110k
1%
R41
1k 1%
R40
301
Vin
+5V
ENA
ENA
TP4
PGND
TP3
+5V
J1 Jump
er
VDD
1
ENAB
LE2
PWM
3
PRDY
4
VIN
8
VSW
6
PGND
7PG
ND5
VSWS1 9
VSWS2 10
U2
IP20
03A
VDD
1
ENAB
LE2
PWM
3
PRDY
4
VIN
8
VSW
6
PGND
7PG
ND5
VSWS1 9
VSWS2 10
U3
IP20
03A
VDD
1
ENAB
LE2
PWM
3
PRDY
4
VIN
8
VSW
6
PGND
7PG
ND5
VSWS1 9
VSWS2 10
U4
IP20
03A
VDD
1
ENAB
LE2
PWM
3
PRDY
4
VIN
8
VSW
6
PGND
7PG
ND5
VSWS1 9
VSWS2 10
U5
IP20
03A
2 3
1Q
1IR
LML6
402
IRDCiP2003A-C_ ____ _____
www.irf.com 8
Table 1: Reference Design Bill of Materials
Refer to the following application notes for detailed guidelines and suggestions when implementing iPOWIR Technology products: AN-1028: Recommended Design, Integration and Rework Guidelines for International Rectifier’s iPowIR Technology BGA and LGA and Packages This paper discusses optimization of the layout design for mounting iPowIR BGA and LGA packages on printed circuit boards, accounting for thermal and electrical performance and assembly considerations. Topics discussed includes PCB layout placement, and via interconnect suggestions, as well as soldering, pick and place, reflow, inspection, cleaning and reworking recommendations. AN-1030: Applying iPOWIR Products in Your Thermal Environment This paper explains how to use the Power Loss and SOA curves in the data sheet to validate if the operating conditions and thermal environment are within the Safe Operating Area of the iPOWIR product. AN-1047: Graphical solution for two branch heatsinking Safe Operating Area Detailed explanation of the dual axis SOA graph and how it is derived. Use of this design for any application should be fully verified by the customer. International Rectifier cannot guarantee suitability for your applications, and is not liable for any result of usage for such applications including, without limitation, personal or property damage or violation of third party intellectual property rights. IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
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