pci, system resources, com and lpt ports

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PCI, System Resources, COM and LPT ports. Chipset. Recall that the chipset divides the motherboard traffic into two main categories based on speed. The Northbridge (a.k.a. Memory Bridge or Memory Hub) handles the faster traffic. - PowerPoint PPT Presentation

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CSIT 301 (Blum) 1

PCI, System Resources, COM and LPT ports

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Chipset

• Recall that the chipset divides the motherboard traffic into two main categories based on speed.

• The Northbridge (a.k.a. Memory Bridge or Memory Hub) handles the faster traffic.

• The Southbridge (a.k.a. I/O Bridge or I/O Hub) handles the slower traffic.

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PCI-X

• The PCI bus connects to the Southbridge. • But as devices required more speed than the PCI standard

allowed, a faster version, PCI-X (Peripheral Component Interconnect Extended) was developed by IBM, HP, and Compaq.

• Whereas PCI allows up to 532 MB per second, PCI-X allows up to 1.06 GB per second.

• PCI-X is backward-compatible, – You can install a PCI-X card in a PCI slot (it will operate at the

slower PCI speed).

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AGP• Another faster variation on PCI developed

specifically for displays is AGP, Accelerated Graphics Port. – Came out in 1997– It works with the Northbridge instead of the Southbridge.– It has a special slot (usually brown in color) – Various throughputs: 266 MB/s (1X), 533 MB/s (2X);

and 1.07 GB/s (4X). – Supports pipelining – transmitting many instructions

together instead of one at a time.

• Being replaced by PCI Express.

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AGP slot

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PCI Express

• PCI Express, PCI-E or PCIe • Introduced by Intel in 2004. • Built to be fast like AGP (faster actually) but general

purpose like PCI.• It has point-to-point rather than a (shared) bus structure.

And has full-duplex serial connections called lanes –up to 32 lanes.

• In PCIe 1.1 (the most common for now) each lane carries 250 MB/s (per direction).

• PCIe 2.0 supports 500MB/s and PCIe 3.0 supports 1GB/s PER LANE.

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System Resources

• System Resources are the logical/software way to access various devices. It is a level above the hardware but intimately connected to it – as it helps the processor to locate and interface with the hardware.

• Data is transmitted between the processor and devices using various shared communication channels (the buses). Thus an addressing scheme is required to determine where data is coming from or where it is going, which device is seeking the attention of the processor, and so on.

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System Resources (Cont.)

• I/O Addresses: process talks to device

• IRQ: device tells processor it requires attention

• DMA: device interacts with memory without bothering processor

• Memory Addresses: portion of memory allocated for device instructions

Device Manager – Once place to look at System Resources

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Resource Conflicts

• Addresses must be unique if they are to be used to distinguish various devices.

• If two devices claim the same resource, there is said to be a conflict.

• Certain well established devices use a set IRQ. • Plug-n-Play (PnP) has eliminated a lot of

conflicts since the system assigns its own resources to the devices.

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No conflicts

Advanced System Information – Another place to look at resources

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Forced hardware

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I/O addresses

• Every PC device has an Input/Output (I/O) Address or port address. – Standard devices have standard I/O addresses. – These I/O addresses and the memory locations they

represent are like mail boxes for devices. Data for a device is sent to that devices I/O Address (mailbox).

– It is also a way to control devices, certain addresses correspond to specific actions of the device.

• This scheme of associating memory locations with devices is known as memory-mapped I/O.

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Keyboard’s I/O address range

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A different view of the Device Manager

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Resources by type view (I/O)

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Requesting an interrupt

• Devices cannot get the immediate attention of the processor. Instead the device makes an interrupt request.

• The processor only allows itself to be interrupted at certain times.

• All devices interrupt the processor in the same way, the processor must then trace back to find out which device requested the interrupt.

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IRQ• Devices that interrupt the processor are assigned

an IRQ (Interrupt Request Line). • Typically a device has a set IRQ or finds an

available IRQ, occasionally two devices want the same IRQ and a conflict arises. Older versus newer IRQ

• Older IRQ allowed only up to 16 addresses IRQ lines. The newer version uses IOAPIC – I/O Advanced Programmable Interrupt Controller – and allow for more IRQ lines.

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IRQs in Device Manager

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Stuff to memorize if you plan to take the A+ exam (older standard IRQs)

IRQ Default function0 System timer

1 Keyboard (unless it’s USB)

2/9 Open for use

3 COM2, COM4

4 COM1, COM3

5 LPT2

6 Floppy drive

7 LPT1

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Stuff to memorize if you plan to take the A+ exam

IRQ Default function8 Real-time clock

10 Open for use

11 Open for use

12 Open for use

13 Math coprocessor

14 Primary hard-drive controller

15 Secondary hard-drive controller

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IRQ Table (from PC Guide)

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IRQ Table

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DMA• Normally a device interacts with memory

(reads or writes data) via the processor. • A Direct Memory Access (DMA) channel

allows a device to interact with memory without going through the processor. This speeds up data transfers.

• There are usually fewer conflicts over DMA than over IRQ.

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Floppy Resource with DMA

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Resources by type view (DMA)

DMA Use

• The DMA System Resource is about devices that need a DMA controller as opposed to having their own circuitry for managing memory access.

• More devices use DMA than it looks like.

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COM Port

• The term COM (communications) port is sometimes used instead of serial port.

• COM corresponds to a set of addresses (software instead of hardware) that is associated with the serial port. – In particular COM1 corresponds to IRQ 4 and

I/O address 03F8

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Stuff to memorize if you plan to take the A+ exam

Port I/O Base Address IRQ

COM1 03F8 4

COM2 02F8 3

COM3 03E8 4

COM4 02E8 3

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To look at or change port information, right click on My Computer, choose Properties, go to the Hardware tab. Click on Device manager. (XP)

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Expand the ports item and double click on the port – COM1 in this example. (XP)

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Port Properties dialog boxes.

Look at options for Port Settings.

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LPT

• The term LPT (Line Printer Terminal) port is sometimes used instead of parallel port.

• Like the term COM, LPT corresponds to a set of addresses (software instead of hardware) this time associated with the parallel port. – In particular LPT1 corresponds to IRQ 7 and I/O

address 0378

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Still more stuff to memorize if you plan to take the A+ exam

Port I/O Base Address IRQ

LPT1 0378 7

LPT2 0278 5

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Logical device names• The COM and LPT ports can be located using the

various addresses associated with them. However, they can also be referred to by using their name COM1, COM2, LPT1 or LPT2.

• This logically higher naming scheme (known as the logical name) allows these ports to be found even without knowing their assigned I/O addresses and/or IRQ.

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Memory Addresses and BIOS shadowing

• There is some (ROM) BIOS associated with each device that holds the lowest-level instructions that the PC cannot forget in order to operate.

• But main memory (RAM) is faster than ROM, so commonly used, but slow parts of the BIOS are placed in memory to improve speed. This is known as BIOS shadowing.

• A device’s Memory Range are memory locations associated with a device to hold its shadowed BIOS. They are placed in what is called “upper memory.”

• (Strictly speaking not a system resource.)

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Memory Range for NIC

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Resources by type view (Memory)

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Plug-and-Play

• System configuration (adding cards, assigning resources used to be technical and tedious). Most modern operating systems support Plug-and-Play (PnP).

• With PnP, system resources are assigned automatically and in most cases, conflicts are avoided.

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References• http://pcguide.com/ref/index.htm • http://computer.howstuffworks.com/usb.htm • http://computer.howstuffworks.com/parallel-

port.htm • http://computer.howstuffworks.com/serial-port.htm • http://en.wikipedia.org/wiki/

Northbridge_(computing)• www.intel.com/technology/pciexpress/devnet/

docs/WhatisPCIExpress.pdf

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