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UC Solar Review, October 19, 2018

The Value Proposition of GaN in Rooftop PV Inverters

UC Solar co-Director and Professor ECE, UC Santa Barbara Co-founder and CTO, Transphorm Inc., (a UCSB Start-up)

Umesh K. Mishra

GaN Devices

6

AlGaN Barrier

GaN Buffer

Si Substrate

G S SiN D

GaN

AlGaN Barrier

SiC Substrate

G S SiN D

GaN Buffer

Lateral Devices Vertical Device

Transphorm UCSB

Ga-Polar N-Polar

Evolution of Transistor Technology (600 V)

3

Proprietary & Confidential

Superjunction MOSFET

Conventional Planar MOSFET

Specific On-Resistance Down to 80 mΩ-cm2

Specific On-Resistance 30 to 8 mΩ-cm2

GaN HEMT (~MOSFET)

Specific On-Resistance < <8 mΩ-cm2

The Evolution of the GaN Revolution

GaN’s “True” Value Proposition

4

Automotive EV and charging

Telecom/Industrial Power supplies

Multiple Applications Enables Low Cost

5

Proprietary & Confidential

Size & weight reduction translates to longer distance per charge and lower system

cost

Reduces cable complexity and cost in server motors and makes PV inverters

significantly smaller and lighter.

Improved efficiencies result in lower thermals, improved power density and lower

system cost.

Ability to double available power in standardized server

and telecom form factors

Industrial/Renewable Motor drives/servo and PV Inverter

Consumer/Residential Gaming

Proprietary and Confidential

Industry's First Automotive-Qualified GaN Ensures Reliability in all applications including PV

6

• AEC-Q101 Qualified TPH3205WSBQA GaN FET • 650 V / 49 mΩ in a TO-247

• Demonstrates Quality + Reliability • Meets at minimum all AEC-Q101 qualification tests

• Target Applications • On Board Charger (OBC) • DC to DC (air conditioning, power

steering, heater, oil pumps)

Q101 qualification tests

Proprietary and Confidential

HTDC – High Temperature DC Device Lifetime Test (Important for sealed fan-less PV inverters)

7

• Tested at 360°C • Standard acceleration models give

range of projected mean lifetimes (conservative model)

Projected Lifetime Model

Result: • 6 x 108 hours @ TJ = 150°C • Projected lifetime at 1% failure at

175°C in excess of 100 years

3.0 kW PV Inverter Board Layout (17.27’’ x 9.23’’) CEC Efficiency…….. 97.5%.

Where GaN Resides in Electric Vehicles Emergency Preparedness (using battery power and solar panels)

AC-DC On Board Charger (OBC) (3.3 kW – 6.6 kW)

DC-AC Auxiliary Inverter (1.5 kW – 3 kW)

AC Charging Pole (Level I & II)

Parking brakes using actuated Caliper

Air conditioning (AC Motor)

High Power Drive By Wire Systems

Air conditioning (AC Motor)

High Power Drive By Wire SystemsHigh Power Drive By Wire Systems

Air conditioning (AC Motor)Air conditioning (AC Motor)

High Power Drive By Wire SystemsClimate Control (Heat Pump)

12 V battery charging

Parking brakes using actuated CaliperParking brakes using actuated CaliperParking brakes using actuated CaliperSuspension Control

DC-DC Auxiliary Power Module (APM)(1 kW – 7 kW)

Proprietary & Confidential 9

Ga-Polar N-Polar

AlGaN Barrier

GaN Buffer Ga-Face

N-Polar

N-Polar

AlG

aN B

arrier

GaN

Buffer

Ga-Face

N-Polar

N-Polar AlGaN Barrier

GaN Buffer Ga-Face

N-Face

GaN

AlGaN Barrier

Si, Sapphire or Si Substrate

G S SiN D

GaN Buffer

N-Polar HEMT

Why N-Polar

GaN

AlGaN Barrier

SiC Substrate

G S SiN D

GaN Buffer

AlGaN Barrier

GaN Buffer

Si Substrate

G S SiN D

Ga-Polar

Ga-P

olar

N-Polar

N-Po

lar

Improved gate-control

Natural back-barrier

N-Polar Data

10-6

10-3

100

0 500 1000 1500VDS (V)

I DS

(A/m

m)

LGD = 28 µm

0

0.2

0.4

0.6

0.8

0 5 10

VGS = 0 V to -12 V 2 V steps

VDS(V)

I DS

(A/m

m)

RON = 3.9 mΩ.cm2

VBR = 1300 V

VGS = -15V

Switching Performance

Confidential

Off-state drain bias stress The higher the better

On-resistance increase relative to DC

The lower the better

0%

100%

200%

1 10 100 1000

% In

crea

se in

Res

ista

nce

Rel

ativ

e to

DC

VDS, Q (V)

Preferred corner

Confidential

Off-state drain bias stress The higher the better

On-resistance increase relative to DC

The lower the better ON Semi U. Bristol,

U. Padova, 2015

HRL, 2011 MIT, 2013

Leibniz Inst., 2013

U. Fukui, 2013

Hong Kong U. S&T, 2013

N-Polar 2018

Toshiba, 2007

0%

100%

200%

1 10 100 1000

% In

crea

se in

Res

ista

nce

Rel

ativ

e to

DC

VDS, Q (V) Theoretical

Limit

Switching Performance

Lateral vs Vertical

6

AlGaN

GaN Buffer

Sapphire/SiC/Si

D G S LGD

LGD

$$

LGD VBR

ACHIP

LGD VBR

ACHIP~ $$ ~

For high VBR (>1 kV), vertical devices can potentially provide lower cost

LGD LGD

Vertical design advantages over lateral design

2

-Grow thick GaN layers: High BV >> 1200V -Realize high current (>> 20A) devices -Normally-off operation -Reduced number of defects: Improved Reliability, Large EC -Breakdown occurs in bulk Avalanche capability -GaN on GaN takes less chip area Lowers die cost

*KIZILYALLI et al.: VERTICAL POWER p-n DIODES BASED ON BULK GaN

Vertical Trench MOSFET

• Basic device requirements – Normally-off (VTH > 0 V) – High breakdown voltage (VBR) ) – Low on-resistance (RON)

Best Performance:- 1.6 kV, 2.7 mΩ.cm2 (TG*)

State of the art device design

10

*T. Oka et al., APEX, 2015

VGS,APPLIED = 40 V

High VGS High EOX Reliability issues

New device design OG-FET

μCH

• Basic device requirements – Normally-off (VTH > 0 V) – High breakdown voltage (VBR) ) – Low on-resistance (RON)

Best Performance:- 1.25 kV, 1.8 mΩ.cm2 (TG)

Vertical Trench MOSFET

11

In-situ Oxide, GaN interlayer based vertical trench MOSFET

(UCSB)

VGS ?

OG-FET Data (UCSB)

VGS = 12V

RON = 2 mΩ.cm2

VBR = 1200 V (~70% theoretical breakdown of GaN)

Best unit cell data in vertical GaN trench MOSFETs

RON = 2 mΩ.cm2 (Low on-resistance at significantly lower gate bias)

*C. Gupta et al., IEEE EDL, 2017

Conclusions

Low loss PV inverters continue to improve The goal is to make PV inverters close to 99% efficiency Maybe limited by the passive elements

Science and Technology will drive cost down while maintaining reliability

Examples are High Voltage Devices on GaN substrates and N-polar GaN transistors

N-Polar

AlGaN Barrier

GaN Buffer Ga-Face

AlG

aN B

arrier

GaN

Buffer

Ga-Face

AlGaN Barrier

GaN Buffer Ga-Face

N-Face

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