network communications: chapter 3 introduction to computer architecture

Network Communications:Chapter 3

Introduction to Computer Architecture

Components of a Microcomputer

Control Unit

ArithmeticLogic Unit

ProgrammableI/O Interrupt

MemoryParallel Input/

Output InterfaceSerial Input/

Output Interface

Direct memonryAccess (DMA)

Address Bus

Data Bus

Control Bus

CPU

Registers

Figure 3.1

Microprocessor and CPU Block Diagram

Control Unit

RegisterRegisterRegisterRegister

ALU

Microprocessor

Control Unit

Register

Register

Register

ALU

CPU

Figure 3.2

RAM3 Address Lines, 4 Data Lines

000001

010011

100101

110

111

Address Bus Data Bus

Read/Write

Figure 3.3

RAMBlock Diagram

RAM Data Bus

Address Bus

Read

Write

Chip Select

Figure 3.4

SDRAMBlock Diagram

Control Bus Address Bus Data Bus

Control

Top Bank

Bottom Bank

Output buffer

Figure 3.5

DRAM Simm

Figure 3.6

Centronics Connectors

Figure 3.7

Centronics 36pin male Centronics 34 pin female

Serial PortsRS232

Figure 3.8

DB-9DB-25

Memory Hierarchy

CPU

Cache MemorySRAM

Main MemoryDRAM and SDRAM

Secondary MemoryHard Disk, Tape ,and Floppy Disk

Figure 3.10

SCSI Bus

Hard Drive Floppy Scanner CD-Rom

Figure 3.11

SCSI Connectors

SCSI-1 SCSI-2 SCSI-3

Figure 3.12

ISA Card

16 bit ISA

Figure 3.13

EISA Card(Obsolete)

EISA

Figure 3.14

PCI Card

PC II

Figure 3.15

PCMCIAPC Card

Figure 3.16

USB Architecture

CPU Memory

Serial Interface

Transceiver

HUBSerial Ports

USBController

Computer BUS

Figure 3.17

USB Cable / Expansion

V BusD+D-GND

USBSerialPort

Figure 3.18

HostHub1

P1 P2 P3

Hub2

P4 P5 P6

5 meters

Figure 3.19