industrial testing education at undergraduate level: a datasheet and diagnosis labs approach...

Industrial Testing Education at Undergraduate Level: A Datasheet and Diagnosis Labs Approach

EWME2010

Béatrice Pradarelli / Laurent Latorre / Pascal Nouet

TRCC

Outline

• Introduction to CNFM/CRTC

• Labs oriented approach for industrial testing education of undergraduate students

• Future Developments

CNFM

National Comity for Education in Nano and

Microelectronics

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Micro/Nano-electronic industry CNFM centers

RENATER Network

CNFM Network

• Created 25 years ago to answer to the need of sharing high cost equipments (tester, cleaning room, …) for education

• Sponsored by French government & micro/nano electronic industry

• 12 CNFM centers strategically located

CNFM Missions

• To share equipments dedicated to IC manufacturing and characterization, prototyping, test of IC and SIP/SOC products and design automation tools

• To offer dedicated trainings to academic people (students and teachers)

• To develop collaborations with research labs and companies to promote innovation

CRTC: CNFM Test Resource Center

• Public organization, created in 1998, specialized in the test of microelectronic products. Located in Montpellier, south of FRANCE.

• Owner of an industrial tester, the Verigy V93K PinScale:

• Used for Education at undergraduate and L, M, D levels. • Used for test engineering services (test time, support, consulting) to companies & research labs• Accessible from anywhere

INDUSTRIAL TESTING EDUCATIONAT UNDERGRADUATE LEVEL

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ICs testing in Mass production

• Millions of parts (ICs) tested automatically daily

• Rooms full of test equipments (tester/handler/prober)

• Skilled technicians in charge of the overall process

CRTC Environment and Network

RemoteLogin

VNC

VERIGY_OFF2Linux

Tester

SmarTest®“Offline Mode”SSH & VNC servers

VERIGY_ONLinux

SmarTest®Online & Offline ModeSSH & VNC servers

Classroomwith Terminals

AccountServer

DEVICE UNDER TEST

Optical Link

Lab Oriented Approach

• Pedagogical Objectives

• Initiate undergraduate students to industrial testing• Guide them having a better understanding of the interaction between ICs design, manufacturing & test

Data Sheet

Test Prog.

Test Results

P F

Analysis Diagnosis

Device robustness versus design and

manufacturing

From Data Sheet to Test Program

Test Program

Data Sheet• Block diagram• Pinning• Operating conditions • Truth table• DC characteristics• AC characteristics

Test Program• Test conditions: T (°C), Vcc • Functional test• Parametric tests: Vil/Vih/Vol/Voh and leakage measurements• Timing tests: propagation delay, set

up and hold times measurements

Continuity Test

Fonctional Test

AC TestSTART DC Test

Test Results Analysis

Manufacturing, assembly verification• Industrial test concept• Protection diodes on each pad• ESD damages / wrist strap usage

Continuity Test

Functional Test

AC TestSTART DC Test

Test Results Analysis

Device behavior verification• Go/no Go test

• Test flow execution order, test strategy, cost of test

Continuity Test

Functional Test

AC TestSTART DC Test

Pass (Go)

Fail (No Go)

Fonctional Test @ f1

Fonctional Test @ f2<f1

$

$$$

Test Results Analysis

Electrical and timing parameters verification• Measured values vs data sheet ones

• Product characterization: shmoo plots

• Product robustness versus process

Continuity Test

Functional Test

AC TestSTART DC Test

ma

rgin

ma

rgin

LL UL

Failing Device

• FPGA approach to insert stuck at/delay faults

SWITCHES

MODE

DELAY

Good IC

Schematic

+

new lines

Diagnosis

• Understanding the failures and finding the root cause in the IC using the tester debugger tools

• Interaction between Test, Design, Design for Testability (DFT) and process

Sa1 S1

Summary

• CRTC test activities and organization offer test services and trainings to academic, research lab and industrial people.

• Lab oriented approach to initiate undergraduate students to industrial testing in 8 hours deployed since 2008: 50 students attended.

• Next: develop a new lab using the FPGA platform and addressing the DFT, fault simulations, SCAN test concepts

EWME2010