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Website : www. aceengineeringpublications.com
Instrumentation EngineeringPrevious GATE Questions with Solutions Subject Wise & Chapter wise
(1992 - 2018)
ACEEngineering Publications
(A Sister Concern of ACE Engineering Academy, Hyderabad)
Hyderabad | Delhi | Bhopal | Pune | Bhubaneswar | Bengaluru | Lucknow | Patna | Chennai | Vijayawada | Visakhapatnam | Tirupati | Kukatpally | Kolkata
ACE is the leading institute for coaching in ESE, GATE & PSUsH O: Sree Sindhi Guru Sangat Sabha Association, # 4-1-1236/1/A, King Koti, Abids, Hyderabad-500001.
Ph: 040-23234418 / 19 / 20 / 21, 040 - 24750437
7 All India 1st Ranks in ESE43 All India 1st Ranks in GATE
GATE - 19
Copyright © ACE Engineering Publications 2018
All rights reserved.
Published at :
Authors : Subject experts of ACE Engineering Academy, Hyderabad
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First Edition : 2011Revised Edition : 2018
Printed at :Rowshni Graphics,Hyderabad.
Price : `. 500/-ISBN : 978-1-946581-83-9
ACE Engineering Publications
Sree Sindhi Guru Sangat Sabha Association,# 4-1-1236/1/A, King Koti, Abids, Hyderabad – 500001, Telangana, India.Phones : 040- 23234419 / 20 / 21 www.aceenggacademy.comEmail: info@aceenggpublications.com hyderabad@aceenggacademy.com
No part of this publication may be reproduced, stored in a retrieval system, or transmitted, in any form or by any means, electronic, mechanical, photocopying, digital, recording or otherwise, without the prior permission of the publishers.
ForewordGATE in Instrumentation Engineering
Starting year : 1992 From 1992– 2002 : Objective and Conventional Questions From 2003 – 2013 : Objective Questions with multiple choices 2014 onwards : Objective Questions with multiple choices & Numerical Answer Questions without options
The style, quality and content of the Solutions provided for previous GATE Questions of Instrumentation Engineering, will encourage the readers to learn & understand the concept thoroughly and answer the questions without any difficulty or tension. However, readers comments and suggestions are always welcomed by the Academy.
The student must go through the solutions for conventional questions asked prior to 2003, to bridge up the concepts by solving conventional questions, this will facilitate the students to answer the numerical type questions, and also Common data and Linked questions, easily.
The student is advised to solve the problems without referring the solutions. The student has to analyze the given question carefully, identify the concept on which the question is framed, recall the relevant equations, find out the desired answer, verify the answer with the final key such as (a), (b), (c), (d), then go through the hints to clarify his answer. This will help to face numerical questions, better. The student is advised to have a standard text book ready for reference to strengthen the related concepts, if necessary. The student is advised not to write the solution steps in the space around the question. By doing so, he lose an opportunity of effective revision.
In 2018, for the first time, one single set of question paper is prepared to conduct the online examination for all candidates who are appearing for the exam. In GATE-18, (INST) around 43% of question paper is asked in the form of numerical type. It is expected that this will continue even in 2019. Framing of questions in the forth coming examinations may turn difficult. Because, examiners need to prepare a single set of question paper, covering wide range of topics from the whole syllabus, due to which it turns difficult for students to make any predictions in the examination. Students are strongly advised to cover whole of the syllabus without leaving any topic in any subject while their preparation. It is believed that this book is a valuable aid to the students appearing for competitive exams like ESE, ISRO and Other PSU’s. This book can also be used by fresh Teachers who are into Engineering teaching to improve their teaching Concepts. GATE Previous Questions & Solutions of Mathematics & General Aptitude for all branches are available in separate booklets.
Best wishes to all those who wish to go through the following pages.
Y.V. Gopala Krishna Murthy,M Tech. MIE,
Chairman & Managing Director,ACE Engineering Academy,
ACE Engineering Publications.
Electrical Circuits
Voltage and current sources: independent, dependent, ideal and practical; v-i relationships of resistor, inductor, mutual inductor and capacitor; transient analysis of RLC circuits with dc excitation.Kirchoff’s laws, mesh and nodal analysis, superposition, Thevenin, Norton, maximum power transfer and reciprocity theorems.Peak-, average- and rms values of ac quantities; apparent-, active- and reactive powers; phasor analysis, impedance and admittance; series and parallel resonance, locus diagrams, realization of basic filters with R, L and C elements.One-port and two-port networks, driving point impedance and admittance, open-, and short circuit parameters.
Signals & Systems
Periodic, aperiodic and impulse signals; Laplace, Fourier and z-transforms; transfer function, frequency response of first and second order linear time invariant systems, impulse response of systems; convolution, correlation. Discrete time system: impulse response, frequency response, pulse transfer function; DFT and FFT; basics of IIR and FIR filters.
Control Systems
Feedback principles, signal flow graphs, transient response, steady-state-errors, Bode plot, phase and gain margins, Routh and Nyquist criteria, root loci, design of lead, lag and lead-lag compensators, state-space representation of systems; time-delay systems; mechanical, hydraulic and pneumatic system components, synchro pair, servo and stepper motors, servo valves; on-off, P, P-I, P-I-D, cascade, feed forward, and ratio controllers.
Analog Electronics
Characteristics and applications of diode, Zener diode, BJT and MOSFET; small signal analysis of transistor circuits, feedback amplifiers. Characteristics of operational amplifiers; applications of op amps: difference amplifier, adder, subtractor, integrator, differentiator, instrumentation amplifier, precision rectifier, active filters and other circuits. Oscillators, signal generators, voltage controlled oscillators and phase locked loop.
GATE Syllabus for
(Instrumentation Engineering)
Digital Electronics
Combinational logic circuits, minimization of Boolean functions. IC families: TTL and CMOS. Arithmetic circuits, comparators, Schmitt trigger, multi-vibrators, sequential circuits, flip-flops, shift registers, timers and counters; sample-and-hold circuit, multiplexer, analog-to- digital (successive approximation, integrating, flash and sigma-delta) and digital-to- analog converters (weighted R, R-2R ladder and current steering logic). Characteristics of ADC and DAC (resolution, quantization, significant bits, conversion/settling time); basics of number systems, 8-bit microprocessor and microcontroller: applications, memory and input-output interfacing; basics of data acquisition systems.
MeasurementsSI units, systematic and random errors in measurement, expression of uncertainty - accuracy and precision index, propagation of errors. PMMC, MI and dynamometer type instruments; dc potentiometer; bridges for measurement of R, L and C, Q-meter. Measurement of voltage, current and power in single and three phase circuits; ac and dc current probes; true rms meters, voltage and current scaling, instrument transformers, timer/counter, time, phase and frequency measurements, digital voltmeter, digital multimeter; oscilloscope, shielding and grounding.
Sensors & Industrial Instrumentation
Resistive-, capacitive-, inductive-, piezoelectric-, Hall effect sensors and associated signal conditioning circuits; transducers for industrial instrumentation: displacement (linear and angular), velocity, acceleration, force, torque, vibration, shock, pressure (including low pressure), flow (differential pressure, variable area, electromagnetic, ultrasonic, turbine and open channel flow meters) temperature (thermocouple, bolometer, RTD (3/4 wire), thermistor, pyrometer and semiconductor); liquid level, pH, conductivity and viscosity measurement.
Communication & Optical Instrumentation
Amplitude- and frequency modulation and demodulation; Shannon’s sampling theorem, pulse code modulation; frequency and time division multiplexing, amplitude-, phase-, frequency-, pulse shift keying for digital modulation; optical sources and detectors: LED, laser, photo-diode, light dependent resistor and their characteristics; interferometer: applications in metrology; basics of fiber optic sensing.
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Previous GATE Questions with Solutions
Subjectwise and Chapterwise (1992 - 2018)
MAIN INDEX
S.No. Name of the Subject Page No.
1 Electrical Circuits 1 - 46
2 Signals & Systems 47 - 93
3 Control Systems & Process Control 94 - 179
4 Analog Electronics 180 - 277
5 Digital Electronics 278 - 347
6 Measurements 348 - 416
7 Sensors & Industrial Instrumentation 417 - 503
8 Communication & Optical Instrumentation 504 - 542
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Fig.
10 10V + 10
10
10 A
I
3V 1
6
3
+
R1 R0
+
+
+
+
Vi Vo R 2 AvV V
01. Superposition theorem does not hold for
(GATE-00) (a) R-L-C networks
(b) Networks containing diodes and R-C elements
(c) Linear op-amp circuit
(d) LC networks 02. The root – mean – square value of a voltage
waveform consisting of a superimposition of 2 V dc and a 4 V peak-to-peak square wave is (GATE - 06)
(a) 2 V (b) V6
(c) V8 (d) V12
03. The DC voltage gain i
o
V
V in the following
circuit is given by (GATE - 07)
(a) Av 21
2
RR
R
(b) Av
21
1
RR
R
(c) Av 21
2
RR
R
+ Ro (d) Av 0
21
1 RRR
R
04. Consider the periodic signal
x(t) = (1+0.5cos40t) cos 200t, where t is in seconds. Its fundamental frequency, in Hz, is (GATE - 07)
(a) 20 (b) 40
(c) 100 (d) 200
05. The power supplied by the dc voltage source in the circuit shown below is
(GATE - 08) (a) 0 W (b) 1.0 W (c) 2.5 W (d) 3.0 W 06. The current I supplied by the dc voltage
source in the circuit shown below is (GATE - 08)
(a) 0 A (b) 0.5 A (c) 1 A (d) 2 A 07. A 100, 1 W resistor and a 800 , 2W
resistor are connected in series. The maximum dc voltage that can be applied continuously to the series circuit without exceeding the power limit of any of the resistors is (GATE - 10)
(a) 90 V (b) 50 V (c) 45 V (d) 40V
08. The current I shown in the circuit given
below is equal to (GATE - 11)
(a) 3 A (b) 3.67 A (c) 6 A (d) 9 A
One Mark Questions
+ 1 1A 1V
I
NetworkAnalysis 1Chapter
: 4 : Electrical Circuits
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ib
9k
99 ib
100 1
2
1k
09. The impedance looking into nodes 1 and 2 in the given circuit is (GATE - 12)
(a) 50 (b) 100
(c) 5 k (d) 10.1 k
10. Consider a delta connection of resistors and
its equivalent star connection as shown If all elements of the delta connection are scaled by a factor k, k > 0 the elements of the corresponding star equivalent will be scaled by a factor of (GATE - 13)
(a) k2 (b) k
(c) 1/k (d) k
11. A circuit consisting of dependent and independent sources is shown in the figure. If the voltage at Node-1 is –1V, then the voltage at Node-2 is ____________ V.
(GATE - 17)
01. For the circuit shown in Fig. VR = 20 V
when R = 10 and VR = 30 V when R = 20. For R = 80 VR will read as
(GATE-00)
(a) 48 V (b) 60 V (c) 120 V (d) 160 V 02. For the circuit shown in Fig. R is adjusted
to have maximum power transferred to it. The maximum power transferred is
(GATE-00) (a) 16 W (b) 32 W (c) 64 W (d) 100 W 03. The value of the impedance Zd (S) between a-
b of the circuit shown in Fig as s is (GATE-00)
(a) 0 (b) 1 (c) 5/4 (d) 5 04. In circuit shown in Fig. current through the
5 resistor is (GATE-01)
(a) 0 A (b) 2 A (c) 3 A (d) 7 A
Two Marks Questions
Rb Rc
Ra
RC RB
RA
2 2A 5A 5
10
5
a F
32
F252
4
5
b
1 R
10V
6A
D.C Network R
–
+
VR
+ – I2
I1 I3 4VR1
VR1 2I2 1A
Node-1 Node-2
+
–
0.5
3
1 1
: 5 : Network Analysis
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1
1 1
1 1
1
1
I1
I2
I3
I6
I4
I7
I5 + 5 V
05. An unknown impedance Z is shunted across an ac current source of value 2cos(10t)A. The current source develops a
voltage of 6 2 cos (10t + 450)V. The value of the impedance is (GATE - 04)
(a) 3 resistance in series with 0.3 H inductor
(b) 3 resistance in parallel with 0.3 H inductor
(c) 3 resistance in series with 0.3 F capacitor
(d) 3 resistance in parallel with 0.3 F capacitor
06. Which one of the following equations is
valid for the circuit shown below? (GATE - 08)
(a) I3 + I5 I6 + I7 = 0
(b) I3 I5 + I6 + I7 = 0
(c) I3 + I5 + I6 + I7 = 0
(d) I3 + I5 + I6 I7 = 0
07. The current in amperes through the resistor
R in the circuit shown in the figure is _____A. (GATE – 15)
08. The current Ix in the circuit given below in milliampere is ________. (GATE – 16)
09. For the circuit, shown in the figure, the total
real power delivered by the source to the loads is ____ kW (GATE – 17)
10. In the given circuit, the mesh currents I1, I2
and I3 are (GATE – 18) (a) I1 = 1 A, I2 = 2 A and I3 = 3 A (b) I1 = 2 A, I2 = 3 A and I3 = 4 A (c) I1 = 3 A, I2 = 4 A and I3 = 5 A (d) I1 = 4 A, I2 = 5 A and I3 = 6 A
1V 10mA
Ix
100Ω
100Ω 100Ω
Load - 1 Load - 2
+
Hz50
V0200
A305I2
A05I1
I
– +
5V
6 1
2 1 I1
I1
I3 2A
1V
I
R=1
1
1
1A 1
+ –
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R1 R0
+
+
+
+
Vi Vo
R 2 AvV
Fig.
V
01. (b) 02. (c) 03. (a) 04. (a) 05. (d) 06. (a) 07. (c) 08. (a) 09. (a) 10. (b) 11. (2)
01. (a) 02. (c) 03. (b) 04. (b) 05. (a) 06. (d) 07. (1) 08. (10) 09. (1.866) 10. (a)
01 Ans: (b) Sol: According to superposition theorem it is
applicable to linear network as we know diode is non linear element. So super position theorem is not applicable for non linear networks.
02. Ans: (c) Sol: For d.c voltage of 2 V, M.S.V = 4 For square wave voltage with peak-to-peak
value of 4 V or amplitude = 2 V, M.S.V = 4 For superimposition of the above two
voltages, M.S.V = 4 + 4 = 8
R. M. S. V = V8 03. Ans: (a) Sol: The relevant circuit is shown in Fig.
By Voltage division Rule we can write
21
2i RR
RVV
……. (1)
The output circuit is open as load, RL is not connected. No current flows.
Voltage drop across R0 = 0. V0 = Av V …….(2) From (1) and (2)
21
2iv0 RR
RVAV
D.C voltage gain
21
2v
i
0
RR
RA
V
V
04. Ans: (a) Sol: Given the periodic signal x(t) = [1+0.5cos (40 t)] cos(200 t) Use the identity 2cos AcosB = cos (A+B) +cos (A B)
x(t) = cos(200 t) +4
1[cos(240 t)
+ cos (160 t)] Frequency of 1st term, f1 = 100 Hz,
Frequency of 2nd term, f2 = 120 Hz
Frequency of 3rd term, f3 = 80 Hz
Fundamental frequency of x(t),
f0 = H C F of f1, f2 and f3 = 20 Hz
One Mark Solutions
NetworkAnalysis 1Chapter
One Mark Answers
Two Marks Answers
Solutions
: 7 : Network Analysis
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Fig.2
10 1 A 10 10 10 A
I
Fig. 1
10 10 V + 10
10
10 A
I
A
B
+
Fig. 1
V1
= 3
V
3
6
1
+
Fig. 2
V1
2
1
+
Fig. 3
V1 3
I
05. Ans: (d) Sol: The given circuit in Fig.1 is simplified as
shown in Fig.2 and Fig. 3
From Fig.3, I = 1 A, Power supplied by 3 V d.c source = P = V1 I = 3 1 = 3 W
06. Ans: (a) Sol: The circuit is shown in Fig. Voltage across 1 = 1 V
I1 = 1 A Apply KCL at node, P I + 1 = I1, or I + 1 = 1, I = 0
07. Ans: (c) Sol: In d.c circuit, Power is given by
P = V I = RIR
V 22
or V2 = PR, RPV
Maximum voltage, V1 that can be applied to
100 = V101001
Maximum voltage, V2 that can be applied to
800 = V408002
The maximum input voltage, Vi that can be applied without exceeding the power limit of any of the resistors is Vi = 45V.
08. Ans: (a) Sol: The given circuit is shown in Fig.1. Convert the (10 V, 10 ) voltage source
across A, B to the left into a current source, (1 A, 10). The resultant
circuit is shown in Fig.2.
The circuit is further simplified as shown in Fig. 3 and 4.
+
Fig.
1 1A 1V
I P
I1
: 8 : Electrical Circuits
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Fig.3
5 1 A 10 10 A
I
Fig.4
5 9 A 10
I
99 ib
100
1k 9 k
I
V
+
ib
2
1
Z
Fig.
A315
59I
09. Ans: (a) Sol:
.)FigSee(I
VZ
Voltage across (1 k + 9 k) = V = 10,000 ib….(1) KCL at node 1 gives
Ii100100
Vb .……(2)
From Equations (1) and (2),
I100
V
100
V , Z = 50
10. Ans: (b)
Sol: cba
cbA RRR
RRR
If each value in delta is scaled by a factor K, then,
cba
cb2
A RRRK
RRKR
= cba
cb
RRR
RRK
11. Ans: 2 Sol: Given that V1 = –1 Volts then find V2 By KCL at node (1) 1VV 1R1
5.0
VV4V
1
V1 2RRR 111
2RR V2V6V111
2R V2V511
1 = –5 (–1) –2 V2 4V2
2R
Volts2V2R
01. Ans: (a) Sol: Given that
VR = 20V when R = 10
VR = 30V when R = 20
VR =? When R = 80
Now the given circuit can be redrawn as
RR
RVV
th
thR
i.......20R2V10R
10V20 thth
th
th
Two Marks Solutions
Rth
R VR Vth +
–
+ – I2
I1 I3 4VR1
VR1 2I2 1A
1
+
–
0.5
3
1 1
V2
: 9 : Network Analysis
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Fig.
V Z
I
Vz
+
I1
ii.......60R3V220R
20V30 thth
th
th
By solving equation (i) & (ii) Vth = 60 V, Rth = 20 Now
.V488020
8060VR
02. Ans: (c) Sol: As we know for maximum power transfer to
R The value of R is equal to Rth. For Rth and Vth circuit can be redrawn as. From the above figure Vth = 16 V, Rth = 1 Now the circuit becomes By maximum power transfer theorem
.W644
16
R4
VP
22
max
03. Ans: (b) Sol: Using Laplace transform
S2
35||
4
5
S2
25SZd
S2
3
50S25
250S25SZd
at S we get Zd (S) = 1 04. Ans: (b) Sol: Given circuit Apply KCL to node V1 & V2 5 = I1 + I2
10
VV
2
V5 211
6V1 – V2 = 50 --- (1) and I2 + 2A = I3
20V3V5
V2
10
VV21
221
--- (2)
on solving equation (1) & (2), we get V1= V2 = 10 So current through 5 register is 3I
2V2A
5
05. Ans: (a) Sol:
The circuit is shown in Fig. i1(t) = 2 cos (10 t) A
vz(t) = 6 2 cos(10 t + 45) V = 10 rad/sec
1I
= Phasor or i1(t) = 20 = 2 ej0 A
zV
= Phasor of
–
1
10V
6A Vth
+ +
–
R
1
16 V
5
a S2
3 S2
25
4
5
b
2 2A 5A 5
10
I1
I2 I3 V1 V2
: 10 : Electrical Circuits
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vz(t) = 6 2 45 = 6 245je V
Impedance, 3j3e2
6
I
VZ 45jz
This impedance is realized by 3 resistance in series with 0.3 H inductor becomes
Z = R + j L = R + j 10 0.3 = 3 + j 3, for = 10 rad/sec.
06. Ans: (d) Sol:
The circuit is shown in Fig. marking the
nodes: P, Q, R and S Apply KCL at nodes, At node, P I1 + I2 + I5 = I7 ……………… (1) At node, Q I1 + I2 = I3 + I6 ……………… (2) At node, R I3 + I5 = I4 …………………... (3) At node, S I4 + I6 = I7 …………………… (4) From (3) and (4)
I3 + I5 + I6 I7 = 0
07. Ans: 1A Sol: By super position
Case: I Consider 1V Source alone (Open circuit1A) I1 = 0.5 A
Case ii: Consider 1A source (short circuit 1V
source) I2 = 0.5 A So, I = I1+I2 = 1A 08. Ans: 10 Sol:
Apply KVL in first loop I1 = (10mA – Ix) = –1 – 100I1 + 100 Ix = 0 = –1 – 1 + 100 Ix + 100 Ix = 0 = 200 Ix = 2
200
2Ix = 10 mA
09. Ans: 1.866 Sol: 21 III
oo 30505
2
5j
2
355
2
5j
2
315I
2
5j)866.1(5
So, *VIS 5.2j33.90200 o P + jQ = 1866 – j5000 Real power P = 1866 W = 1.866 kW
1
1 1
1 1
1
1
I1
I2
I3
I6
I4
I7
I5 +
Fig.
5 V
Q R
S P
1V 10mA
ix
100Ω
100Ω 100Ω I1
2000oV 50 Hz
50o
I2=530oA I
I1
Load - 1 Load - 2 I
R=1
1 1
1A 1
1V + –
: 11 : Network Analysis
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10. Ans: (a) Sol: Writing Mesh equation: 0III1II6I2 323211
0I2I7I8 321 …………(1)
0II6II15 1232
5II7I6 321 …………(2)
2II 31 …………(3)
5II2 31
3I3 1 → I1 = 1A → I3 = 3A
→ A27
68I2
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