esd the broad impact and design challenges part1of2
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Part I:Broad Impact of Electrostatic Discharge (ESD) on ProductDischarge (ESD) on Product
Quality and ReliabilityQ y yTed Dangelmayer©2011 ASQ & Presentation TedPresented live on Jul 06th, 2011
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featuring leading international practitioners, academics and consultantsacademics, and consultants.
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Ted Dangelmayer www.dangelmayer.com
Part I: Broad Impact of Electrostatic Discharge (ESD)
on Product Quality and Reliability
Copyright © 2011 Dangelmayer Associates
Outline
• ESD – A Surprisingly Dominant Failure Mechanism • ESD Sensitivity Trend
• HBM & CDM Review
• Failures Beyond Device Level
• ESD Countermeasures - Overview
p2
Copyright © 2011 Dangelmayer Associates
Typical IC Device Defect Analysis
0
50
100
150
200
250
300
350
NTF EOS FAB Asmbly Test ESD
~10% to 80% - ESD(CDE/CBE)
~20% - ESD
100% - ESD
Copyright © 2011 Dangelmayer Associates
ESD Damage: A Surprisingly Dominant Failure Mechanism!
After EOS Misdiagnosis Adjustment: ESD: #1 Assignable Cause of IC Failure!
Copyright © 2011 Dangelmayer Associates
ESD Sensitivity Trends
p5
Copyright © 2011 Dangelmayer Associates
ESDA Technology Roadmap
p6
HBM Roadmap (Min-Max)
1978 1983 1988 1993 1998 2003 2008
4kV
2kV
6kV
ESD Control is becoming increasingly critical!
0V
1kV
ESD Control Methods
2013
HBM Roadmap (Min-Max)
1978 1983 1988 1993 1998 2003 2008
4kV
2kV
6kV
ESD Control is becoming increasingly critical!
0V
1kV
ESD Control Methods
2013
Copyright © 2011 Dangelmayer Associates
ESDA Technology Roadmap
p7
CDM Roadmap (Min-Max)
1978 1983 1988 1993 1998 2003 2008
750V
1000V
ESD Control is becoming increasingly critical!
0VESD Control Methods
2013
500V
250V
125V
CDM Roadmap (Min-Max)
1978 1983 1988 1993 1998 2003 2008
750V
1000V
ESD Control is becoming increasingly critical!
0VESD Control Methods
2013
500V
250V
125V
Copyright © 2011 Dangelmayer Associates
HBM & CDM Review
Copyright © 2011 Dangelmayer Associates
Human Body Model When the air breaks down between the human’s finger and an IC pin, charge is suddenly transferred from the person via the grounded pin of the IC to ground.
HBM
Charged Person Device
Charge “Flow” Ground
Copyright © 2011 Dangelmayer Associates
Charged Device Model
Conductive Surface
CDM Video
Device Contact Resistance Capacitance of
Device
Charge “Flow”
Q
Ground
“99% of ESD Failures are CDM!” Andrew Olney, Analog Devices, Quality Director & Industry Council
Copyright © 2011 Dangelmayer Associates
HBM
CDM
Copyright © 2011 Dangelmayer Associates
Case Study Circuit Board Class 0 Device
• 15 Volt CDM & HBM Withstand Voltage
• 100% Failure Rate: Some Lots
• $1.2B Sales Jeopardy
• $1K Invested in Shunt
• $6.2M/yr Savings Documented
Circuit Pack Production Yield Losses
p12
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CDM Threshold Dependencies
Ref: Industry Council WPII 2009
Larger Device Package Size
Higher Operating Speeds
p13
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ESD Failures Beyond “Device Level” • Charged Board Event (CBE) • Cable Discharged Event (CDE) • Transient Latch-Up (TLU)
• MEMS
• MR Heads
• Automated Handling Equipment
• Wafers • Flat Panels
• Handheld Devices
• System-Level • Hard Failures (Device Damage) • Recoverable Malfunction (Transient Latch-up)
Copyright © 2011 Dangelmayer Associates
Charged Board Event (CBE)
Photograph courtesy: Andrew Olney, Quality Director, Analog Devices
Copyright © 2011 Dangelmayer Associates Courtesy: Andrew Olney, Quality Director, Analog Devices
CBE ESD Damage - A New Discovery! Most FA Experts Misdiagnose as EOS!!!!
Up to 50% of EOS Failures are CBE ESD! (2008)
CDM Device Damage CBE (ESD) Device Damage on Circuit Board
Copyright © 2011 Dangelmayer Associates
FICBM vs. FICDM Discharge Waveformsfor DSP with a 250V Charge Voltage
-2
0
2
4
6
8
10
0.00
0.25
0.50
0.75
1.00
1.25
1.50
Time (nanoseconds)
Peak
Cur
rent
(Am
ps) GND test pad FICBM
GND pin FICDM
CBE vs. CDM Discharge Waveform Comparison
(250 V)
Courtesy: Andrew Olney, Quality Director, Analog Devices
Copyright © 2011 Dangelmayer Associates
Faceplate Field- Induced CBE Failure
Established Code - New Faceplate Supplier
40% Failure Rate - 1.5KV CDM Threshold
Ref: ESD Program Management, 2nd edition, pp59-61
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Cable Discharge Events (CDE)
19
Charge On Cables Can Cause Equipment Damage Or Malfunctions
Copyright © 2011 Dangelmayer Associates
System Level Testing & Latch-Up
• Some tests can trigger latch-up in ICs • IEC 61000-4-2, 4 and 5 • Cable Discharge Events (CDE)
• …even though they pass IC level latch-up testing (JEDEC Std 78)
• JEDEC Std 78 lacks a fast rising edge pulse
• Most field latch-up problems are due to transients
• Supplement with a transient latch-up test
Copyright 2010 - Semitracks, Inc.
Copyright © 2011 Dangelmayer Associates
No ESD Events Detected!
ESD Events Detected! Bonding Tip Not Grounded!
Bonding Tip Properly Grounded!
Event Video
Automation Induced Events
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Class 0 – Wafer Saw Example Unexpected Results!
• CDM Threshold – 35 Volts • 92.2% Defective at Wafer Saw • Failure Analysis
• CDM Damage
Copyright © 2011 Dangelmayer Associates 23
Field Induced Reticle Damage
Voltage Differentials Induced On Traces Of Different Lengths By Movement In An Electric Field
Copyright © 2011 Dangelmayer Associates
MEMS – Microelectromechanical Systems
W. D. Greason, EOS/ESD Symposium 2007
Copyright © 2011 Dangelmayer Associates
MEMS ESD • Micron Scale Moving To
Nanostructures (NEMS) • When Co-integrated Into ICs
• Many IC Protection Strategies Used
• Have Additional Important Failure Mode Due To Small Air Gaps Vulnerable To Air/Dielectric Breakdown
• Typical Air Gap 1-3 Microns And Falling
• Modified Paschen Curve Behavior
• Failure Modes • Melting Due To Discharge Current • Stiction
W. D. Greason, EOS/ESD Sympsium 2007
Copyright © 2011 Dangelmayer Associates
MR Head Lessons Learned
• Conventional ESD Methods Essential but Insufficient! • Below 100 Volts • Ionization - Necessary & Insufficient
• Expect a Paradigm Shift @ 100 volts • Assume Device Still Charged!
• New Control Methods • Eliminate Metal-to-Metal Contact • “Soft Landings” with Dissipative Materials • Advanced Test Methods
• EMI/ESD Event Detection • Discharge Currents Test Methods
p26
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0
5
10
15
20
25
1 5 9 13 17 21 25 29 33 37 41 45 49 1 5 9 13 17 21 25 29 33 37 41 45 49
Week
Case Study Class 0 MR Tape Head
Technical Assessment
& CDM Training
90% EPM Yield Risk Benchmarking™
80% EPM Yield Risk Benchmarking™
22% ESD Yield Loss
S20.20 Program
(39% EPM Benchmarking)
(HBM Focused)
Copyright © 2011 Dangelmayer Associates
Flat Panel Displays
• Large Capacitance – Behaves Like Large Wafer Or Circuit Board
• Manufacturing Process Creates Very High Potentials – Much Lifting, Sliding And Probing Of Panels At Various Stages Of Fabrication
• ESD Control Implementation Very Challenging
Copyright © 2011 Dangelmayer Associates
Panels Vulnerable To ESD Damage
• Electrothermal Damage • Dielectric Breakdown
Between Large Power/Ground Planes
• Technology Roadmaps To Higher Pixel Density And New Materials Will Increase Vulnerability
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Hand-Held Devices – ESD/EMI Issues are Common
Copyright © 2011 Dangelmayer Associates 31
System Level ESD Upsets
• Scrambled Program Instructions and Data
• Microprocessor Lockup • Confusing Error Messages
• “Software Errors”
ESD Generates Radio Waves That Affect Microprocessors
Copyright © 2011 Dangelmayer Associates
Questions? Contact information:
Ted Dangelmayer Terry Welsher 978 282 8888
ted@dangelmayer.com www.dangelmayer.com
Part II: Tomorrow Electrostatic Discharge (ESD) and Electrical
Overstress (EOS) Design Challenges
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