dsp development system speaker: lian-tsung tsai. outline introduction common feature of dsp...
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Introduction Common feature of DSP Processor TI TMS320 Development Kit Philips Trimedia Development Kit
Introduction
What is DSP ? DSP(Digital signal processor) is used to manipulate
real-world signals after they have been converted into a digital form.
Introduction (cont.)
Why is DSP processor? Mathematical calculation vs. data manipulation.
Data Manipulation Math calculation
Typical Application
Word processing, Database Management,spread sheet,O.S etc..
Digital Signal processing,motion control.. Etc.
Main Operations
Data Move:(A=> B)Value testing: IF A=B then …Sorting, searching..
Addtion:A+B=CMultiplication:AxB=CSum of product..
Introduction (cont.)
Off-line processing The entire input signal resides in the computer as the
same time. All of the information is simultaneously available to the
processing program. Example : medical imaging, such as computed
tomography and MRI. PC and mainframes.
Introduction (cont.)
On-line processing The output signal is produced at the same time that the
input signal is being acquired. E.g. telephone, radar, hearing aids.
Real-time applications must be have the information immediately available,although it can be delayed by a short amount.
Real-time applications is input a sample, perform the algorithm, and output a sample, over-and-over.
This is the world of Digital Signal Processors.
Introduction (cont.)
The definition of real-time depends on the applications, for instance, an Audio application
Requires a sampling frequency of 40 KHz. Needing 100 serial instructions to complete and using a DSP
processor with 30 ns cycle time. Then in 3 microseconds the calculation is completed.
Sample n
Time between samples = 1/40KHz =25 microseconds
100 instructions3 microseconds Waiting time Sample n+1
Introduction (cont’d.)
What applications DSP can do? Complex system control. Multimedia processing
(Video,Audio,Speech,Image,etc.) Intelligent signal processing using soft
computing(Fuzzy inference, Neural networks, etc.)
Common feature of DSP Processor
Multiple-access Memory architecture Advance Harvard architecture to achieve separate program and dual
access data memory space. Specialized addressing modes
Circular buffer, bit-reversed addressing. Fast multiply-accumulate(MAC)
High performance interrupt handling. Single and block instructions by pipeline structure to perform one
instruction per cycle. On-chip peripherals and I/O interfaces
Multi-channels direct memory access(DMA). High performance serial and parallel I/O port. High resolution timer.
Common feature of DSP Processor (cont.)
Processor Core
Address Bus
Data Bus
Memory
Processor Core
Address Bus
Data Bus
Data Bus
Address Bus
Memory A Memory B
Von-NeumannHarvard
Common feature of DSP Processor (cont.)
Advance Harvard The processor core can
simultaneously perform two access to memory bank A and one access to memory bank B using three independent sets of buses. Dual-ported data
memory. Single ported program
memory.
Processor Core
Memory A Memory B
Address Bus 1
Data Bus 1
Data Bus 2
Address Bus 2
Data Bus 3
Address Bus 3
Common feature of DSP Processor (cont.) Data address generator(DGA) for
PM and DM Circular buffers, bit-reversed
address for FFT. Data register sets
General purpose registers,special purpose registers.
Math processing units Multiplier. Arithmetic logic unit(ALU). Barrel shifter.
Program sequencer and instruction cache.
System buses.
ProgramMemory
instructions and secondary data
DataMemoryData only
I/OController
(DMA)
shifter
ALU
Multiplier
Data register
Program sequencer
Instruction cahe
Data register
Data register
High speed I/O
Common feature of DSP Processor (cont.)
The difference between DSP and CPU: DSP processor is possible to do several accesses to memory in a
single instruction cycle. i.e., DSP processor have a relatively high bandwidth between their Core CPU and memory.
DSP processor are optimized to cope with repetition or looping of operations common in signal processing applications.
DSP allows specialized addressing modes, such as indirect,circular, and bit reverse addressing. These are efficient addressing mechanisms to implement many signal processing algorithms.
TI TMS320 Development Kit
VLIW architecture Very Long Instruction Word. Parallel processing with multiple function units.
TMS320C6000 family Fixed-Point C6X DSP:
TMS320C62X,TMS320C64X. Floating-Point C6X DSP:
TMS320C67X.
TI TMS320 Development Kit (cont.)
Advantages of VLIW architectures Increased performance. Better compiler targets. Potentially scalable.
Disadvantages of VLIW architectures Increased memory use. High power consumption. Misleading MIPS ratings.
TI TMS320 Development Kit (cont.)
C62x Fixed-PointDSP Generation
C64x Fixed-PointDSP Generation
C67x Floating-PointDSP Generation
Clock Rate(MHz)
MIPS/MFLOPS
16-bit MMACS
8-bit MMACS
BroadbandCommunications
Imaging
150-300 600-1100 150-167
1200-2400 MIPS 4800-8800 MIPS 600-1000 MFLOPS
300-600 3400-4400 300-333
300-600
General
General
4800-8800
Special-purposeInstructions
Special-purposeInstructions
300-333
General
General
TI TMS320 Development Kit (cont.)
EMIF
Host Port
McBSP
McBSP
Timer
Timer
Direct MemoryAccess(DMA)
Controller(4 channels)
Program Memory64K Bytes
C62X/C67XCPU
Data Memory64K Bytes
TMS320C6201/6701 DSP Block Diagram
TI TMS320 Development Kit (cont.)
TMS320C6201/6701 key features: Launched at 200MHz;1600 MIPS. 128 K RAM on-chip (split 64K program/64K data). 32 32-bit registers file. All instructions may be conditional. Efficient compilation of ANSI-C code. Data is byte-addressable (it can be 8-bit,16-bit or 32-
bit).
TI TMS320 Development Kit (cont.)
TextEdit
AssemblerOptimizer
Compiler
Assembler LinkerDebuggerSimulator
.c
.sa
.asm.obj .out
Link.cmd
.c=C source file.sa=linear assembly source file
.asm=assembly source file.obj=object file
.out=executable COFF file.cmd=linker command file
TI TMS320 Development Kit (cont.)
The tools for three stages: 1.Algorithms development:
Textual-based tools: C and Assembly. MATLAB with DSP toolboxes.
2.System-level design: MATLAB and simulink DSP toolboxes. RIDE or VAB rapid tool.
TI TMS320 Development Kit (cont’d.)
3.Hardware and embedded software implementation: Code Composer Studio (CCS) with developer’s kit for TI C6x
EVM. RIDE with DSP board from third-party of DSP venders. VAB with TI or third-party DSP board.
Philips Trimedia Development Kit
This is a software and hardware supported development environment. Hardware architecture
Combine A/D, D/A, Memory, ASIC, VLIW CPU to build up a multimedia development platform.
Software operation environment Support different program langrage for developer High performance compiler, scheduler, analyzer,
optimizer, even a GUI debugger.
Philips Trimedia Development Kit (cont.)
TM1300 feature: Implements popular multimedia standards such as MPEG-1 and
MPEG-2, Operations from C and C++ source code. Frequency up 166 MHz. Memory 8 MB SDRAM. Immediate, Floating-Point Compute and Multimedia
Operations. 5 operations each clock cycle.
Philips Trimedia Development Kit (cont.)
All of executable tools was stored under install_path/bin…., in our system as below
Philips Trimedia Development Kit (cont.)
Free UNIX-like environment , and make tool is compatible with UNIX.
Cygwin tool
Trimedia GUIRunning tool
Trimedia GUI debugger
Philips Trimedia Development Kit (cont.)
NO!! we can use MS-DOS mode to compile our program, when you put tmcc.exe or tmCC.exe in the the same directory.
Using “Bash”, Cygwin’s environment, is easy to compile and run, even debug our program.
Philips Trimedia Development Kit (cont.) Makefile example: # usage: make TCS=<path> # HOST = Win95 ENDIAN = el CC = $(TCS)/bin/tmcc -host $(HOST) -$
(ENDIAN) vivot.out: CHECK vivot.c $(CC) $(CFLAGS) -o $@ vivot.
c $(LDFLAGS) CHECK: @if [ x$(TCS) = x ]; then \ echo "Usage: make
TCS=<path>"; false; \ fi clean: rm -rf vivot.out vivot.o
Philips Trimedia Development Kit (cont.)
tmcc -p fdct.c -o fdct.out tmsim -ns -nomm fdct.out /* ge
nerates dtprof.out */ tmcc -r fdct.c -o fdct.out tmsim -mm -ns -statfile fdct.stat f
dct.out tmprof >fdctrpt -scale 1 -thresho
ld 0.01 -detail -func fdct.stat fdct.out
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