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DYNAMIC POSITIONING CONFERENCEOctober 14-15, 2014

DESIGN AND CONTROL

Approach for Advance Testing of DP Control System

Return to Session Menu

Elena Ambrosovskaya & Petr OpekunovNavis Engineering/Beier Radio

Approach for advcontrocontro

By - PhD Mrs. E- Petr Opeku

October 14 15, 20Design & Control SES

vanced testing of DP ol systemol systemElena Ambrosovskayaunov

Different requiremensub-system

Cl ifi ti

y

System Classification society

ntrol systemABS

y

wer system

BV

CCSwer system CCS

DNV\GL

nsor system LR

RSRS system

Others..

nts and configurations, ms interaction

DP class Deliver

Non classNew system

Class 0New system

Class 1

Class 2HW upgrad

Class 2

Class 3

Advanced sub-classSW upgrad

e product with fast very for different figurations, how g ,

Newbuild

W AdvRetrofitW

e DP Control system

Adv

system

Internal testinSW

upgradeHW

pgrade

Bug-free and stablevanced testing

High-quality

vanced testing

Cost effective

quality

Cost effective

ng Factory testing Commissioning

ailable ready to use solutioon?

ntrol system, common set very:very:C’s with preinstalled SW ore SW and customized

essel configuration data);isplays and Control panels ith firmware/SW;ith firmware/SW;ontrollers (PLC) with reinstalled SW (core SW (nd vessel specifics onfiguration);terface boxes;terface boxes;et of installation\operation nd user documentation;;

Class 2 DP control system

Core software

• DoClaCla

• Int(in

Vessel configuration (

• Intcus

configuration

• Fac• Do

• Internal testing of SW (debugginInternal testing of SW (debugginverification , custom functions testing);

• Internal testing of Documentatio

ocumentation review and approval bassification society;assification society;ternal testing of every HW componecluding internal wiring)g g)

ternal testing of algorithms and stomized vessel configuration data;ctory acceptance testing;

ock and sea trials;

“F ll i i ” t“Full mission” teconnections o

th timathematic

“Light” and easyHW compoHW compo

“Simple, ready-any vessels wft isoftware version

t b h li ti HW l test-bench replicating HW electf particular project and providi

l d l f i t d lcal model of associated vessel.

test-bench able partly test systnents without real equipmentnents without real equipment.

-to-use test-bench able to simuwith associated systems to do fu

t bili ti d b ifi tn stabilization and bug verificat

plied test-bench family• Test and simulation SW (simulator) run on• PLC with embedded SW and analog I/O si

systems signals handshaking• HW for simulation custom interfaces (e.g

- Large dware)

( gModbus\Profibus interface)

• RS 232\422 COM-ports for simulation of sconnection

• Test and simulation SW (simulator) run on

– Medium ardware)

• Test and simulation SW (simulator) run on• PLC with embedded SW• Ethernet virtual ports for data communic

ardware)

– Small

• Test and simulation SW (simulator) run oncomputer.

Small ware)

n standalone PC’s.imulating sub-

EPP Task S M

sensors\PRS data SW development + +

SW version stabilization\release +

n standalone PC’s

Release documentation check +

FAT of class\non-class system

n standalone PC s.

ation between PC’s.

FAT of upgrades + +

Debugging + +

Troubleshooting + +

n the same

ype Lurpose Testing of core SW

Testing of all HW\ Testing of all HW\ Factory acceptanc DP familiarization

Wiring Wiring reproduce rea

ro Close to real system;

ontra Requires all HW c Difficult in connec Time consuming f

W functionality;\SW components of the system (including internal wiring)\SW components of the system (including internal wiring)ce testing

n and maintenance trainingsl vessels configuration;

components available. Limited in configuration. ction. for up and running

pose Testing of core Testing of PLC

ype M Testing of PLC Testing of algo Testing of SW u

ring Ethernet connectioAmple opport nitiAmple opportuniti

ntra Not all functions an

e SW functionality;HW\SW component;HW\SW component;rithms and configuration data;upgrades;on;es for config rationes for configuration;

nd parts able to be verified.

pose Testing of core Testing of algo

ype S Testing of algo Troubleshootin

ring Virtual interfaces(P Available for a

d Fast ready to u Can be installe

ntra Impossible to t HW faults emu

e SW functionality;rithms and configuration data;rithms and configuration data;ng;PC memory)ny specific vessel and configuration;

use;ed at any PC;test PLC SW;ulated with the simulator SW;

• Realistic vessels dynamic;• 6 DOF (including roll and pitch);• Ship displacement\draft (constant or variab

el modelp p (

• Proper thrusters forces in bollard-pull and f• Realistic environmental disturbance – wind,

ruster ystem

• Proper dynamics;• Faults simulation: control failure, noise in fe

Ci it b k t l t/di t

ower ystem

• Circuit breakers control connect/disconnect• Load sharing between buses;• Additional load on buses (external consume• Faults of breakers (signals), generators;ystem• Specific interface, if necessary;

• Real model of measurements;• PRS antenna position depending on roll pit

nsors, PRS’

• PRS antenna position depending on roll, pit• Roll\pitch sensor;• Gyro\Magnetic compass with deviation mo• Hydroacoustic system and associated beaco

L \ i d i h i d fPRS’s • Laser\ microwave radar with associated ref• Configurable data output – NMEA, or other• Faults simulation: data drift, data jump, dat

ble);)free-run (for AP);, wave, current;

eedback, dead-band, low speed, feedback loss, time-delay, etc

tt;

ers);

tch;tch;

del;ons;llectors;

r formatta noise, data corruption, no data, etc

ware: CotMACS-JDPWin XP\ Win 7

diagnostic

Signal monitor function constantly checking availability and health of data flow

establishing auxiliary Ethernetestablishing auxiliary Ethernet communication between DP and Simulator

Computer

Signals data window

Sensor faults window

Environments settingsg

Thrusters control window

ically, implementation of mentionedcation and troubleshooting finally alg yme for troubleshooting and fault finn-board time for system commissioyervice calls in regard to DP control s

Bug-freeBug-freestable

High-qualityquality

Time effe

d test-bench family for QA control, llows to significantly reduce:g yding (up to couple of minutes);

oning (up to couple of hours);g ( p p );system;

e ande and e

Cost effectiveeffective

ective

Sorensen. DP Overview and TreTor A. Johansen and Asgeir J. Sø

esting of Power Management SysteØyvind Smogeli Introduction toØyvind Smogeli Introduction toTor A. Johansen, Thor I. Fossen,

f DP systems, 2005 Luca Pivano EXPERIENCES FR

ESTING 2013DNV 2013 PART 6 CHAPTER 2DNV 2013, PART 6 CHAPTER 2NavDP4000 Operational ManualNavDP4000 Testbench Operatio

nds, 2013ørensen. Experiences with HIL Simems 2009o third- party HIL testing 2010o third- party HIL testing 2010 , Bjørnar Vik Hardware-in-the-loop

ROM SEVEN YEARS OF DP SOFT

22 Enhanced System Verification22, Enhanced System Verificationl, 2002-2014nal Manual, 2002-2014

Thanks for YoThanks for Yoour attention!our attention!

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