a new scheduling problem motivated by quantum computation

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A New Scheduling Problem Motivated by Quantum Computation. Robert Carr Anand Ganti Cynthia A. Phillips Sandia National Laboratories. Quantum Computation. Use a machine motivated by quantum mechanics to solve problems that are difficult for traditional computers - PowerPoint PPT Presentation

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Sandia is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company,for the United States Department of Energy’s National Nuclear Security Administration

under contract DE-AC04-94AL85000.

A New Scheduling Problem Motivated by Quantum

ComputationRobert CarrAnand Ganti

Cynthia A. PhillipsSandia National Laboratories

Slide 2

Quantum Computation

Use a machine motivated by quantum mechanics to solve problems that are difficult for traditional computers

Known benefits include faster:• Factoring• Search• Simulating quantum physics

To date, theoretical algorithms and a few early physical experiments

Slide 3

Sandia National Laboratories Project

• Sandia basic quantum information sciences– Advanced computing architectures– Future engineered systems will require increased

understanding of quantum effects.

• Current three-year project to– Build physical qubit

•Will test current understanding of quantum mechanics

– Design a logical qubit•There are scheduling problems critical for quantum

architecture design

Slide 4

Quantum Bits

• Classical bits: 0 or 1• Quantum bits (qubits):

• Superposition

• Measurement destroys superposition, makes

0 or 1

0 1

, complex numbers

2 2 1

2 * Probability of finding in state 0

2 * Probability of finding in state 1

0 or 1

Slide 5

Gates (examples)

1-bit gates:

2-bit gates:

preparation - create 0 or 1

X (not) : X 0 1 , X 1 0

Z : Z 0 0 , Z 1 1

Y : Y 0 i1 , Y 1 i 0measurement

swap : s xy yx

CNOT : c xy c x y x

if x 0 , y unchanged

if x 1 , y flipped

Slide 6

Quantum Errors

Interaction with environment decoherence

Errors act like X,Y,Z gates

Errors are continuous

X bit flip 0 1 1 0Z phase flip 0 1 0 1Y phase and bit flip

Slide 7

Quantum Error Correction

• Consider just flip errors• Idea similar to classical error correction

– Encode a single bit with more bits– Define a set of legal codewords– Ensure that all illegal codewords that result from a single

error are closest to unique legal codeword• Simple example:

• Use majority to correct any single flip error.• Real Example Steane [7,3,3], Calderbank-Shor-Steane codes

0 000

1 111

Slide 8

Quantum Complication 1

• Have to encode as without knowing or .

– Only 2 of the 8 possible states have positive probability• This circuit creates the appropriate (entangled) states:

0 1

000 111

0 1

0

0

000 111}

Slide 9

Quantum Complication 2

• Measurement destroys information• Ancilla bits

– Interact with real qbits– Pattern of ancilla values encodes single errors uniquely– Measure the ancilla

Slide 10

Quantum Error Correction

• Critical for quantum computing– Cannot completely isolate qubits from the world (e.g.

components of the computer itself)• Error correction happens often

– Essentially after every operation– Error correction vastly dominates operations

• Error correction is worth doing quickly/well– Throughput– Error threshold

• Burn error correction into silicon, kind of like microcode• The precise nature depends on

– General quantum architecture– Precise code

Slide 11

Our Architecture: Bilinear Array

Hollenberg et al

Rail

} Gate

Gate entry node

Gate node

Measurement Gate

= location that can hold a qubit/information

Slide 12

Bilinear Array: Legal Movement

• Move wherever there is an edge, including across gate• Multiple possible transport mechanisms such at CTAP (teleportation)• One edge per step (full to empty)• Bits cannot pass through each other

Slide 13

Error Correction is a Program

Three types of operations• Single bit• 2 bit• Measurement

PREPAREPLUS 7CNOT(7,9)MEASUREX 8MEASUREZ 9CNOT (0,3)CNOT (3,8)…

} Executed in gates

Slide 14

Scheduling Problem

• Select initial placement (cyclic)• Schedule location and timing of operations• Schedule legal movements• Obey precedence constraints

– (Usually) two operations that share a bit done serially• Possible parallelism limits

• Minimize makespan• Avoid unnecessary movement

Slide 15

Example

• 3 encoding bits, 2 ancilla• 4 measurements, 4 CNOTs (2-bit gates)

Slide 16

Example

m

Step 0

Slide 17

Example

Step 1m

CNOT

Slide 18

Example

Step 2

CNOT

Slide 19

Example

Step 3

Slide 20

Example

CNOT

Step 4

Slide 21

Example

CNOT

Step 5

Slide 22

Example

Step 6

Slide 23

Example

Step 7

Slide 24

Example

Step 8

m

m

Slide 25

Integer Programming Variables

• xbnt, binary, 1 if bit b in node n at start of time t• y(1)

git binary, 1 if 1-bit instruction i executes in gatenode g, time t

• y(2)git binary, 1 if 2-bit instruction i executes at full gate g,

time t• y(2f)

git same as y(2)git but flip control bit top to bottom

• y(m)mit binary, 1 if measurement instruction executes in

measurement gate m at time t• fbvwt implicit binary flow variables. Bit b moves v->w during

time t

Slide 26

Some simple Special Ordered Sets

• Bit locations (0 is empty)• Performing all operations

xbntn 1, b0,t

xbntb 1, n, t

ygit(m ) 1, i Im

gt

ygit(1)

gt 1, i I1

ygit(2) ygit

(2 f ) gt , i I2

Slide 27

Movement Control

• Flow conservation• Full->empty• Cyclic

fbuvtu,v E fbvvt xbv,t1 v, t

fbuvtu,v E fbuut xbut u, t

fbuvtb0u,v E

x0vt v, t

xbnT xbn1 b,n

Slide 28

Precedence Constraints

• 9 sets depending on i,j in I1, I2, Im• = minimum time between operations (usually 1)• Enforce only for nearest neighbors• EST = earliest start time• LAST = last start time

ygjEST j

t

g ygi

EST j

min(LAST (i),t )

g

i, j I1 : i j,EST j t LAST j

Slide 29

Matching Computation with Transportation

• ci = control bit• di = data bit• g1 = top gatenode of gate g• g2 = bottom gatenode of gate g

ygit(1) xd i gt g,i I1, t

ymit(m ) xd imt m,i Im,t

ygit(2) xci g1t

g,i I2, t

ygit(2) xd i g2t

g,i I2, t

ygit(2 f ) xd i g1t

g,i I2, t

ygit(2 f ) xci g2t

g,i I2,t

Slide 30

Stronger Transportation/Computation Coupling• If a bit is not in a gatenode at the proper time, none of the

associated gate-firing variables can be 1.

• Over 20x faster

(similar constraints for bottom gates and measurement gates)

ygit(1) ygit

(2)

g=ci

bd i

ygit(2 f )

gd i

xbgt b,g topgates, t

Slide 31

Objective

Generally none.Can add a relaxation variable z, relaxing all coupling

constraints:

Minimize z

Strange phenomenon: When z is integral, cplex 11 can require 4x as long to solve as when z and y’s are continuous.

When y’s are integral, having no z is better (tiny examples)

ygit(1) ygit

(2)

g=ci

bd i

ygit(2 f )

gd i

xbgt - z b,g topgates,t

Slide 32

LP cheating

• Half-bits can pass each other

m

m

CNOTCNOT

Steps 0 and 3 Steps 1 and 2

Slide 33

Comments and Issues

• LP example motivates forcing initial placements– Considerably faster– Have to enumerate over placements

•Need to understand structure• How to determine time? Number of rails

– Recursive doubling– Better to understand/compute bounds– LP time grows quickly with both

• Heuristics– LP based?– Constraint programming?

Slide 34

Extra Slides

Slide 35

Error Corrected Logical Qubit

Slide 36

Example

m

m

CNOT CNOT

Step 0 Step 1 Step 2

Slide 37

Example

CNOT CNOT

Step 3 Step 4 Step 5

Slide 38

Example

Step 6 Step 7 Step 8

m

m

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